CN204559531U - PWM type equipment and output power limit circuit thereof - Google Patents
PWM type equipment and output power limit circuit thereof Download PDFInfo
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- CN204559531U CN204559531U CN201520081294.5U CN201520081294U CN204559531U CN 204559531 U CN204559531 U CN 204559531U CN 201520081294 U CN201520081294 U CN 201520081294U CN 204559531 U CN204559531 U CN 204559531U
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Abstract
The utility model discloses a kind of PWM type equipment and output power limit circuit thereof, wherein the output power limit circuit of PWM type equipment comprises: resistive switch network circuit, with reference to wave generation circuit, maximum pulse produces circuit, reference generating circuit, maximum pulse limiting circuit, output pulse width testing circuit and PWM output circuit, the width of PWM output circuit output pulse signal is detected by output pulse width testing circuit, then detection signal is sent to maximum pulse limiting circuit, if be greater than specific pulse width, then carry out the pulse duration of regulation output.PWM type equipment of the present utility model and output power limit circuit thereof, without the need to sampling with high precision resistance, only need common electronic device can complete, so with low cost; Without the need to designing sample circuit, so circuit structure is simple; Because output power limit circuit is without the need to being connected with feedback control loop, the stability of device systems can also be improved.
Description
Technical field
The utility model relates to PWM type equipment and exports control field, particularly relates to a kind of PWM type equipment and output power limit circuit thereof.
Background technology
PWM type equipment such as D-type audio power amplifier and the DC-DC converter chip of middle low power (power output is 5 watts to 50 watts) are widely used in consumer electronics product.As power stage type device, its inside is generally integrated with multiple protection mechanism, and as overheat protector, overcurrent protection, overvoltage protection etc., the top priority of these protective circuits is the safety of protect IC self.The mode of restriction power output is adopted to protect the circuit of load less, and major part needs the circuit feature such as sampled output current and input voltage index, circuit structure is complicated, and the sampling resistor etc. needing precision higher realizes high-precision control, and cost is higher; Because D-type audio power amplifier and DC-DC converter all have feedback control loop, if the improper meeting of optimum configurations causes the instability of system; And the device such as sampling with high precision resistance cannot be integrated into the inside such as D-type audio power amplifier and DC-DC converter chip, complex structure.
Utility model content
Main purpose of the present utility model, for providing a kind of with low cost, is convenient to integrated PWM type equipment and output power limit circuit thereof.
In order to realize foregoing invention object, first the utility model provides a kind of output power limit circuit of PWM type equipment, comprising: resistive switch network circuit, reference wave generation circuit, maximum pulse produce circuit, reference generating circuit, maximum pulse limiting circuit, output pulse width testing circuit and PWM output circuit;
The input of described resistive switch network circuit connects power supply, and earth terminal connects ground, and output output voltage produces circuit to described maximum pulse;
Described reference wave generation circuit exports reference wave respectively and produces circuit and maximum pulse limiting circuit to described maximum pulse;
Described maximum pulse produces circuit and exports maximum pulse signal to described maximum pulse limiting circuit;
Described reference generating circuit output offset electric current and bias voltage are to described maximum pulse limiting circuit;
Described maximum pulse limiting circuit exports the pulse signal extremely described PWM output circuit being less than specified width, which width;
Described PWM output circuit output pulse signal is to described output pulse width testing circuit and external electrical load;
The output detection signal of described output pulse width testing circuit is to maximum pulse limiting circuit, and maximum pulse limiting circuit controls the width of output pulse signal according to described detection signal.
Further, described maximum pulse generation circuit comprises: the first capacitor and the first comparator;
One end of described first capacitor connects the earth terminal of described electronic switch network circuit, and the other end connects the input of described first comparator;
Described first comparator receives the described reference wave with reference to wave generation circuit, and exports pulse digital signal to sequential control circuit.
Further, described output pulse width testing circuit comprises: level shifting circuit and sequential logical circuit;
The signal that the level translation of the pulse signal that described PWM output circuit exports by described level shifting circuit becomes sequential logical circuit to need inputs to sequential logical circuit;
Described sequential logical circuit exports the first switching signal, second switch signal and the 3rd switching signal extremely described maximum pulse limiting circuit with the pulse signal width of PWM output circuit output.
Further, described maximum pulse limiting circuit comprises: the first Signal-controlled switch, secondary signal control switch, the 3rd Signal-controlled switch, the 4th Signal-controlled switch, the first resistance and the second capacitor, the 3rd capacitor and the second comparator;
Described first Signal-controlled switch receives described first switching signal, and secondary signal control switch receives described second switch signal, and the 3rd Signal-controlled switch receives described 3rd switching signal;
Described 3rd Signal-controlled switch connects described first resistance, and the first resistance connects the first Signal-controlled switch, and the first Signal-controlled switch is contacted described secondary signal control switch, and secondary signal control switch connects described second comparator; Second comparator also receives the described reference wave with reference to wave generation circuit;
One end that described first Signal-controlled switch is connected with the first resistance connects described second capacitor, the second capacitor grounding; One end that described secondary signal control switch is connected with comparator connects the 3rd capacitor, the 3rd capacitor grounding; Described first Signal-controlled switch contact described secondary signal control switch connecting line on connect described 4th Signal-controlled switch, the 4th Signal-controlled switch ground connection.
Further, described first Signal-controlled switch, secondary signal control switch, the 3rd Signal-controlled switch and the 4th Signal-controlled switch all can comprise: PMOS, NMOS tube, transmission gate and triode.
Further, described reference wave generation circuit comprises: circuit for generating triangular wave, sawtooth wave generating circuit or sine wave generation circuit.
Further, described resistive switch network circuit comprises: the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the first switch and second switch;
Described second resistance, the 3rd resistance, the 4th resistance and the 5th resistance are connected successively; First switch and described 3rd resistor coupled in parallel, second switch and described 4th resistor coupled in parallel;
Between described 3rd resistance and the 4th resistance, outconnector connects described maximum pulse generation circuit.
The utility model also provides a kind of PWM type equipment, comprises PWM chip and output power limit circuit; Described output power limit circuit is integrated on described PWM chip;
Described output power limit circuit comprises: resistive switch network circuit, reference wave generation circuit, maximum pulse produce circuit, reference generating circuit, maximum pulse limiting circuit, output pulse width testing circuit and PWM output circuit;
The input of described resistive switch network circuit connects power supply, and earth terminal connects ground, and output output voltage produces circuit to described maximum pulse;
Described reference wave generation circuit exports reference wave respectively and produces circuit and maximum pulse limiting circuit to described maximum pulse;
Described maximum pulse produces circuit and exports maximum pulse signal to described maximum pulse limiting circuit;
Described reference generating circuit output offset electric current and bias voltage are to described maximum pulse limiting circuit;
Described maximum pulse limiting circuit exports the pulse signal extremely described PWM output circuit being less than specified width, which width;
Described PWM output circuit output pulse signal is to described output pulse width testing circuit and external electrical load;
The output detection signal of described output pulse width testing circuit is to maximum pulse limiting circuit, and maximum pulse limiting circuit controls the width of output pulse signal according to described detection signal.
Further, described maximum pulse generation circuit comprises: the first capacitor and the first comparator;
One end of described first capacitor connects the earth terminal of described electronic switch network circuit, and the other end connects the input of described first comparator;
Described first comparator receives the described reference wave with reference to wave generation circuit, and exports pulse digital signal to sequential control circuit.
Further, described output pulse width testing circuit comprises: level shifting circuit and sequential logical circuit;
The signal that the level translation of the pulse signal that described PWM output circuit exports by described level shifting circuit becomes sequential logical circuit to need inputs to sequential logical circuit;
Described sequential logical circuit exports the first switching signal, second switch signal and the 3rd switching signal extremely described maximum pulse limiting circuit with the pulse signal width of PWM output circuit output.
Further, described maximum pulse limiting circuit comprises: the first Signal-controlled switch, secondary signal control switch, the 3rd Signal-controlled switch, the 4th Signal-controlled switch, the first resistance and the second capacitor, the 3rd capacitor and the second comparator;
Described first Signal-controlled switch receives described first switching signal, and secondary signal control switch receives described second switch signal, and the 3rd Signal-controlled switch receives described 3rd switching signal;
Described 3rd signaling switch connects described first resistance, and the first resistance connects the first Signal-controlled switch, and the first Signal-controlled switch is contacted described secondary signal control switch, and secondary signal control switch connects described second comparator; Second comparator also receives the described reference wave with reference to wave generation circuit;
One end that described first Signal-controlled switch is connected with the first resistance connects described second capacitor, the second capacitor grounding; One end that described secondary signal control switch is connected with comparator connects the 3rd capacitor, the 3rd capacitor grounding; Described first Signal-controlled switch contact described secondary signal control switch connecting line on connect described 4th Signal-controlled switch, the 4th Signal-controlled switch ground connection.
Further, described first Signal-controlled switch, secondary signal control switch, the 3rd Signal-controlled switch and the 4th Signal-controlled switch all can comprise: PMOS, NMOS tube, transmission gate and triode.
Further, described reference wave generation circuit comprises: circuit for generating triangular wave, sawtooth wave generating circuit or sine wave generation circuit.
Further, described resistive switch network circuit comprises: the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the first switch and second switch;
Described second resistance, the 3rd resistance, the 4th resistance and the 5th resistance are connected successively; First switch and described 3rd resistor coupled in parallel, second switch and described 4th resistor coupled in parallel;
Between described 3rd resistance and the 4th resistance, outconnector connects described maximum pulse generation circuit.
The output power limit circuit of PWM type equipment of the present utility model, without the need to sampling with high precision resistance, only needs common electronic device can complete, so with low cost; Without the need to designing sample circuit, so circuit structure is simple.And use the PWM type equipment of this output power limit circuit, because output power limit circuit is without the need to being connected with feedback control loop, the stability of device systems can be improved, output power limit circuit is integrated on PWM chip, circuit be connected more simple and convenient.
Accompanying drawing explanation
Fig. 1 is the structure chart of the output power limit circuit of PWM type equipment in the utility model one embodiment;
Fig. 2 is that in the utility model one embodiment, resistive switch network circuit connects the physical circuit figure that maximum pulse produces circuit;
Fig. 3 is the physical circuit figure that in the utility model one embodiment, output pulse width testing circuit connects maximum pulse limiting circuit;
Fig. 4 is the structured flowchart of PWM type equipment in the utility model one embodiment.
The realization of the utility model object, functional characteristics and advantage will in conjunction with the embodiments, are described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
With reference to Fig. 1, first propose a kind of output power limit circuit of PWM type equipment in one's duty utility model embodiment, comprising: resistive switch network circuit 10, reference wave generation circuit 20, maximum pulse produce circuit 30, reference generating circuit 40, maximum pulse limiting circuit 50, output pulse width testing circuit 60 and PWM output circuit 70;
The input of described resistive switch network circuit 10 connects power supply, and earth terminal connects ground, and output output voltage produces circuit 30 to described maximum pulse; Described resistive switch network circuit 10 can export different voltage and produce circuit 30 to maximum pulse, makes it produce pulse signal;
Described reference wave generation circuit 20 exports reference wave respectively and produces circuit 30 and maximum pulse limiting circuit 50 to described maximum pulse; Described reference wave generation circuit 20 mainly produces the reference wave for comparing, and maximum pulse produces circuit 30 and maximum pulse limiting circuit 50 all can produce the pulse signal identical with its frequency according to reference wave;
Described maximum pulse produces circuit 30 and exports maximum pulse signal to described maximum pulse limiting circuit 50; Maximum pulse produces circuit 30 can produce maximum pulse width signal, so that utilize energy fully, and facilitates maximum pulse limiting circuit 50 pairs of maximum pulse signals to carry out restriction process;
Described reference generating circuit 40 output offset electric current and bias voltage are to described maximum pulse limiting circuit 50; Bias current and bias voltage provide bias current and bias voltage can to each circuit, enable the work that each circuit is stable;
Described maximum pulse limiting circuit 50 exports the pulse signal extremely described PWM output circuit 70 being less than specified width, which width; The pulse signal of described specified width, which width refers to electronic load 80 acceptable width-pulse signal, when being greater than the width-pulse signal of specifying, maximum pulse limiting circuit 50 will work, the pulse signal being greater than specified width, which width is adjusted to specified width, which width pulse signal, electronic load 80 can be prevented to damage.
Described PWM output circuit 70 output pulse signal is to described output pulse width testing circuit 60 and external electrical load 80;
The output detection signal of described output pulse width testing circuit 60 is to maximum pulse limiting circuit 50, and maximum pulse limiting circuit 50 controls the width of output pulse signal according to described detection signal.Output pulse width testing circuit 60, mainly for detection of the width of PWM output circuit 70 output pulse signal, after the pulse signal being greater than specified width, which width being detected, if this pulse signal life period being greater than specified width, which width is greater than setting-up time, maximum pulse limiting circuit 50 can carry out restriction process to the width of output pulse signal.
With reference to Fig. 2, in the present embodiment, above-mentioned maximum pulse produces circuit 30 and comprises: the first capacitor 31 and the first comparator 32; One end of above-mentioned first capacitor 31 connects the earth terminal of described electronic switch network circuit, and the other end connects the input of described first comparator 32; First capacitor 31 plays the effect of filtering, makes the first comparator 32 obtain stable voltage.Above-mentioned first comparator 32 also receives the described reference wave with reference to wave generation circuit 20, and exports pulse digital signal to sequential control circuit 33.The voltage analog signal received combines with reference to wave frequency by the first comparator 32, produce corresponding pulse digital signal and flow to sequential control circuit 33, sequential control circuit 33 pulse signals carries out clock synchronous, prevents sequential chaotic, can also carry out the delays time to control etc. of specifying.
With reference to Fig. 3, in the present embodiment, above-mentioned output pulse width testing circuit 60 comprises: level shifting circuit 61 and sequential logical circuit 62; The signal that the level translation of the pulse signal that described PWM output circuit 70 exports by described level shifting circuit 61 becomes sequential logical circuit 62 to need inputs to sequential logical circuit 62; Described sequential logical circuit 62 exports the first switching signal, second switch signal and the 3rd switching signal extremely described maximum pulse limiting circuit 50 with the pulse signal width of PWM output circuit 70 output.It mainly detects the width of the pulse signal that PWM output circuit 70 exports, and the result of detection is sent to maximum pulse limiting circuit 50, when the result detected is not greater than specified pulse width, maximum pulse limiting circuit 50 does not work, when the result detected is greater than specified pulse width, maximum pulse limiting circuit 50 carries out width restriction process to the pulse signal exported.
With reference to Fig. 3, in the present embodiment, above-mentioned maximum pulse limiting circuit 50 comprises: the first Signal-controlled switch 52, secondary signal control switch 53, the 3rd Signal-controlled switch 51, the 4th Signal-controlled switch 54, first resistance 55 and the second capacitor 56, the 3rd capacitor 57 and the second comparator 58; Described first Signal-controlled switch 52 receives described first switching signal, and secondary signal control switch 53 receives described second switch signal, and the 3rd Signal-controlled switch 51 receives described 3rd switching signal; Described 3rd Signal-controlled switch 51 connects described first resistance 55, first resistance 55 and connects the first Signal-controlled switch 52, first Signal-controlled switch 52 and to contact described secondary signal control switch 53, and secondary signal control switch 53 connects described second comparator 58; Second comparator 58 also receives the described reference wave with reference to wave generation circuit 20; One end that described first Signal-controlled switch 52 is connected with the first resistance 55 connects described second capacitor 56, second capacitor 56 ground connection; One end that described secondary signal control switch 53 is connected with the second comparator 58 connects the 3rd capacitor the 57, three capacitor 57 ground connection; Described first Signal-controlled switch 52 contact described secondary signal control switch 53 connecting line on connect described 4th Signal-controlled switch the 54, four Signal-controlled switch 54 ground connection.In the present embodiment, 3rd Signal-controlled switch 51 also connects the first reference current source 591, 4th Signal-controlled switch 54 be connected the second reference current source 592 between ground, first reference current source 591 and the second reference current source 592 control the charging and discharging of maximum pulse limiting circuit 50, in conjunction with the first resistance 55 and the second electric capacity 56, 3rd electric capacity 57 and the 4th Signal-controlled switch 54 etc. detect the time span that the width of pulse signal that PWM output circuit 70 exports exceeds designated value jointly, to determine that whether testing result is effective, if testing result is effective, then start the width controlling adjustment pulse signal.The pulse signal that described second comparator 58 receives also combines with reference to wave frequency, produces corresponding pulse digital signal conveying and produces corresponding pulse digital signal conveying PWM output circuit 70.
In the present embodiment, above-mentioned first Signal-controlled switch 52, secondary signal control switch 53, the 3rd Signal-controlled switch 51 and the 4th Signal-controlled switch 54 all can include but not limited to: P ?metal-oxide-semiconductor, N ?metal-oxide-semiconductor, transmission gate or triode etc., as the first Signal-controlled switch 52 in the present embodiment be P ?metal-oxide-semiconductor, secondary signal control switch 53, the 3rd Signal-controlled switch 51 and the 4th Signal-controlled switch 54 all N ?metal-oxide-semiconductor.In the present embodiment, the first Signal-controlled switch 52 and the 4th Signal-controlled switch 54 also can receive bias current, make the work that the first Signal-controlled switch 52 and the 4th Signal-controlled switch 54 can be stable.
In the present embodiment, above-mentioned reference wave generation circuit 20 includes but not limited to: circuit for generating triangular wave, sawtooth wave generating circuit or sine wave generation circuit.Also can be that other generation continuous print change regular analog signal wave generation circuit etc.
In the present embodiment, above-mentioned resistive switch network circuit 10 comprises: the second resistance 11, the 3rd resistance 12, the 4th resistance 13, the 5th resistance 14, first switch 15 and second switch 16; Described second resistance 11, the 3rd resistance 12, the 4th resistance 13 and the 5th resistance 14 are connected successively; First switch 15 is in parallel with described 3rd resistance 12, and second switch 16 is in parallel with described 4th resistance 13; Between described 3rd resistance 12 and the 4th resistance 13, outconnector connects described maximum pulse generation circuit 30.
The output power limit circuit of the PWM type equipment of the present embodiment, without the need to sampling with high precision resistance, only needs common electronic device can complete, so with low cost; Without the need to designing sample circuit, so circuit structure is simple.
With reference to Fig. 4 and Fig. 1, the utility model also provides a kind of PWM type equipment 1, comprises PWM chip 3 and output power limit circuit 2; Described output power limit circuit 2 is integrated on described PWM chip 3;
Above-mentioned output power limit circuit 2 comprises: resistive switch network circuit 10, reference wave generation circuit 20, maximum pulse produce circuit 30, reference generating circuit 40, maximum pulse limiting circuit 50, output pulse width testing circuit 60 and PWM output circuit 70;
The input of described resistive switch network circuit 10 connects power supply, and earth terminal connects ground, and output output voltage produces circuit 30 to described maximum pulse; Described resistive switch network circuit 10 can export different voltage and produce circuit 30 to maximum pulse, makes it produce pulse signal;
Described reference wave generation circuit 20 exports reference wave respectively and produces circuit 30 and maximum pulse limiting circuit 50 to described maximum pulse; Described reference wave generation circuit 20 mainly produces the reference wave for comparing, and maximum pulse produces circuit 30 and maximum pulse limiting circuit 50 all can produce the pulse signal identical with its frequency according to reference wave;
Described maximum pulse produces circuit 30 and exports maximum pulse signal to described maximum pulse limiting circuit 50; Maximum pulse produces circuit 30 can produce maximum pulse width signal, so that utilize energy fully, and facilitates maximum pulse limiting circuit 50 pairs of maximum pulse signals to carry out restriction process;
Described reference generating circuit 40 output offset electric current and bias voltage are to described maximum pulse limiting circuit 50; Bias current and bias voltage provide bias current and bias voltage can to each circuit, enable the work that each circuit is stable;
Described maximum pulse limiting circuit 50 exports the pulse signal extremely described PWM output circuit 70 being less than specified width, which width; The pulse signal of described specified width, which width refers to electronic load 80 acceptable width-pulse signal, when being greater than the width-pulse signal of specifying, maximum pulse limiting circuit 50 will work, the pulse signal being greater than specified width, which width is adjusted to specified width, which width pulse signal, electronic load 80 can be prevented to damage.
Described PWM output circuit 70 output pulse signal is to described output pulse width testing circuit 60 and external electrical load 80;
The output detection signal of described output pulse width testing circuit 60 is to maximum pulse limiting circuit 50, and maximum pulse limiting circuit 50 controls the width of output pulse signal according to described detection signal.Output pulse width testing circuit 60, mainly for detection of the width of PWM output circuit 70 output pulse signal, after the pulse signal being greater than specified width, which width being detected, if this pulse signal life period being greater than specified width, which width is greater than setting-up time, maximum pulse limiting circuit 50 can carry out restriction process to the width of output pulse signal.
With reference to Fig. 2, in the present embodiment, above-mentioned maximum pulse produces circuit 30 and comprises: the first capacitor 31 and the first comparator 32; One end of above-mentioned first capacitor 31 connects the earth terminal of described electronic switch network circuit, and the other end connects the input of described first comparator 32; First capacitor 31 plays the effect of filtering, makes the first comparator 32 obtain stable voltage.Above-mentioned first comparator 32 also receives the described reference wave with reference to wave generation circuit 20, and exports pulse digital signal to sequential control circuit 33.The voltage analog signal received combines with reference to wave frequency by the first comparator 32, produce corresponding pulse digital signal and flow to sequential control circuit 33, sequential control circuit 33 pulse signals carries out clock synchronous, prevents sequential chaotic, can also carry out the delays time to control etc. of specifying.
With reference to Fig. 3, in the present embodiment, above-mentioned output pulse width testing circuit 60 comprises: level shifting circuit 61 and sequential logical circuit 62; The signal that the level translation of the pulse signal that described PWM output circuit 70 exports by described level shifting circuit 61 becomes sequential logical circuit 62 to need inputs to sequential logical circuit 62; Described sequential logical circuit 62 exports the first switching signal, second switch signal and the 3rd switching signal extremely described maximum pulse limiting circuit 50 with the pulse signal width of PWM output circuit 70 output.It mainly detects the width of the pulse signal that PWM output circuit 70 exports, and the result of detection is sent to maximum pulse limiting circuit 50, when the result detected is not greater than specified pulse width, maximum pulse limiting circuit 50 does not work, when the result detected is greater than specified pulse width, maximum pulse limiting circuit 50 carries out width restriction process to the pulse signal exported.
With reference to Fig. 3, in the present embodiment, above-mentioned maximum pulse limiting circuit 50 comprises: the first Signal-controlled switch 52, secondary signal control switch 53, the 3rd Signal-controlled switch 51, the 4th Signal-controlled switch 54, first resistance 55 and the second capacitor 56, the 3rd capacitor 57 and the second comparator 58; Described first Signal-controlled switch 52 receives described first switching signal, and secondary signal control switch 53 receives described second switch signal, and the 3rd Signal-controlled switch 51 receives described 3rd switching signal; Described 3rd Signal-controlled switch 51 connects described first resistance 55, first resistance 55 and connects the first Signal-controlled switch 52, first Signal-controlled switch 52 and to contact described secondary signal control switch 53, and secondary signal control switch 53 connects described second comparator 58; Second comparator 58 also receives the described reference wave with reference to wave generation circuit 20; One end that described first Signal-controlled switch 52 is connected with the first resistance 55 connects described second capacitor 56, second capacitor 56 ground connection; One end that described secondary signal control switch 53 is connected with the second comparator 58 connects the 3rd capacitor the 57, three capacitor 57 ground connection; Described first Signal-controlled switch 52 contact described secondary signal control switch 53 connecting line on connect described 4th Signal-controlled switch the 54, four Signal-controlled switch 54 ground connection.In the present embodiment, 3rd Signal-controlled switch 51 also connects the first reference current source 591, 4th Signal-controlled switch 54 be connected the second reference current source 592 between ground, first reference current source 591 and the second reference current source 592 control the charging and discharging of maximum pulse limiting circuit 50, in conjunction with the first resistance 55 and the second electric capacity 56, 3rd electric capacity 57 and the 4th Signal-controlled switch 54 etc. detect the time span that the width of pulse signal that PWM output circuit 70 exports exceeds designated value jointly, to determine that whether testing result is effective, if testing result is effective, then start the width controlling adjustment pulse signal.Described second comparator 58 also combines with reference to wave frequency according to the pulse signal received, and produces corresponding pulse digital signal and carries PWM output circuit 70.
In the present embodiment, above-mentioned first Signal-controlled switch 52, secondary signal control switch 53, the 3rd Signal-controlled switch 51 and the 4th Signal-controlled switch 54 all can include but not limited to: P ?metal-oxide-semiconductor, N ?metal-oxide-semiconductor, transmission gate or triode etc., as the first Signal-controlled switch 52 in the present embodiment be P ?metal-oxide-semiconductor, secondary signal control switch 53, the 3rd Signal-controlled switch 51 and the 4th Signal-controlled switch 54 all N ?metal-oxide-semiconductor.In the present embodiment, the first Signal-controlled switch 52 and the 4th Signal-controlled switch 54 also can receive bias current, make the work that the first Signal-controlled switch 52 and the 4th Signal-controlled switch 54 can be stable.
In the present embodiment, above-mentioned reference wave generation circuit 20 includes but not limited to: circuit for generating triangular wave, sawtooth wave generating circuit or sine wave generation circuit.Also can be that other generation continuous print change regular analog signal wave generation circuit etc.
In the present embodiment, above-mentioned resistive switch network circuit 10 comprises: the second resistance 11, the 3rd resistance 12, the 4th resistance 13, the 5th resistance 14, first switch 15 and second switch 16; Described second resistance 11, the 3rd resistance 12, the 4th resistance 13 and the 5th resistance 14 are connected successively; First switch 15 is in parallel with described 3rd resistance 12, and second switch 16 is in parallel with described 4th resistance 13; Between described 3rd resistance 12 and the 4th resistance 13, outconnector connects described maximum pulse generation circuit 30.
In the present embodiment, above-mentioned output power limit circuit 2 is integrated on described PWM chip 3, makes the structure of PWM type equipment 1 simpler.
In the present embodiment, said PWM modulation type equipment 1 includes but not limited to the equipment such as D-type audio power amplifier and DC-DC converter.
The PWM type equipment 1 of the present embodiment, is provided with output power limit circuit 2, without the need to sampling with high precision resistance, only needs common electronic device can complete, so with low cost; Without the need to designing sample circuit, so circuit structure is simple; Output power limit circuit 2 is integrated on described PWM chip 3, makes the structure of PWM type equipment 1 simpler.
The foregoing is only preferred embodiment of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model specification and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (9)
1. the output power limit circuit of a PWM type equipment, it is characterized in that, comprising: resistive switch network circuit, reference wave generation circuit, maximum pulse produce circuit, reference generating circuit, maximum pulse limiting circuit, output pulse width testing circuit and PWM output circuit;
The input of described resistive switch network circuit connects power supply, and earth terminal connects ground, and output output voltage produces circuit to described maximum pulse;
Described reference wave generation circuit exports reference wave respectively and produces circuit and maximum pulse limiting circuit to described maximum pulse;
Described maximum pulse produces circuit and exports maximum pulse signal to described maximum pulse limiting circuit;
Described reference generating circuit output offset electric current and bias voltage are to described maximum pulse limiting circuit;
Described maximum pulse limiting circuit exports the pulse signal extremely described PWM output circuit being less than specified width, which width;
Described PWM output circuit output pulse signal is to described output pulse width testing circuit and external electrical load;
The output detection signal of described output pulse width testing circuit is to maximum pulse limiting circuit, and maximum pulse limiting circuit controls the width of output pulse signal according to described detection signal.
2. the output power limit circuit of PWM type equipment according to claim 1, is characterized in that, described maximum pulse produces circuit and comprises: the first capacitor, the first comparator and sequential control circuit;
One end of described first capacitor connects the earth terminal of described electronic switch network circuit, and the other end connects the input of described first comparator;
Described first comparator also receives the described reference wave with reference to wave generation circuit, and exports pulse digital signal to sequential control circuit.
3. the output power limit circuit of PWM type equipment according to claim 1, is characterized in that, described output pulse width testing circuit comprises: level shifting circuit and sequential logical circuit;
The signal that the level translation of the pulse signal that described PWM output circuit exports by described level shifting circuit becomes sequential logical circuit to need inputs to sequential logical circuit;
Described sequential logical circuit exports the first switching signal, second switch signal and the 3rd switching signal extremely described maximum pulse limiting circuit with the pulse signal width of PWM output circuit output.
4. the output power limit circuit of PWM type equipment according to claim 3, it is characterized in that, described maximum pulse limiting circuit comprises: the first Signal-controlled switch, secondary signal control switch, the 3rd Signal-controlled switch, the 4th Signal-controlled switch, the first resistance, the second capacitor, the 3rd capacitor and the second comparator;
Described first Signal-controlled switch receives described first switching signal, and secondary signal control switch receives described second switch signal, and the 3rd Signal-controlled switch receives described 3rd switching signal;
Described 3rd Signal-controlled switch connects described first resistance, and the first resistance connects the first Signal-controlled switch, and the first Signal-controlled switch is contacted described secondary signal control switch, and secondary signal control switch connects described second comparator; Second comparator also receives the described reference wave with reference to wave generation circuit;
One end that described first Signal-controlled switch is connected with the first resistance connects described second capacitor, the second capacitor grounding; One end that described secondary signal control switch is connected with comparator connects the 3rd capacitor, the 3rd capacitor grounding; Described first Signal-controlled switch contact described secondary signal control switch connecting line on connect described 4th Signal-controlled switch, the 4th Signal-controlled switch ground connection.
5. the output power limit circuit of PWM type equipment according to claim 4, it is characterized in that, described first Signal-controlled switch, secondary signal control switch, the 3rd Signal-controlled switch and the 4th Signal-controlled switch all can comprise: P ?metal-oxide-semiconductor, N ?metal-oxide-semiconductor, transmission gate or triode.
6. the output power limit circuit of the PWM type equipment according to any one of claim 1 ?5, is characterized in that, described reference wave generation circuit comprises: circuit for generating triangular wave, sawtooth wave generating circuit or sine wave generation circuit.
7. according to claim 1 ?the output power limit circuit of PWM type equipment according to any one of 5, it is characterized in that, described resistive switch network circuit comprises: the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the first switch and second switch;
Described second resistance, the 3rd resistance, the 4th resistance and the 5th resistance are connected successively; First switch and described 3rd resistor coupled in parallel, second switch and described 4th resistor coupled in parallel;
Between described 3rd resistance and the 4th resistance, outconnector connects described maximum pulse generation circuit.
8. a PWM type equipment, is characterized in that, comprises PWM chip and output power limit circuit; Described output power limit circuit is integrated on described PWM chip;
Described output power limit circuit comprises: resistive switch network circuit, reference wave generation circuit, maximum pulse produce circuit, reference generating circuit, maximum pulse limiting circuit, output pulse width testing circuit and PWM output circuit;
The input of described resistive switch network circuit connects power supply, and earth terminal connects ground, and output output voltage produces circuit to described maximum pulse;
Described reference wave generation circuit exports reference wave respectively and produces circuit and maximum pulse limiting circuit to described maximum pulse;
Described maximum pulse produces circuit and exports maximum pulse signal to described maximum pulse limiting circuit;
Described reference generating circuit output offset electric current and bias voltage are to described maximum pulse limiting circuit;
Described maximum pulse limiting circuit exports the pulse signal extremely described PWM output circuit being less than specified width, which width;
Described PWM output circuit output pulse signal is to described output pulse width testing circuit and external electrical load;
The output detection signal of described output pulse width testing circuit is to maximum pulse limiting circuit, and maximum pulse limiting circuit controls the width of output pulse signal according to described detection signal.
9. PWM type equipment according to claim 8, is characterized in that, the output power limit circuit of described output power limit circuit according to any one of the claims 2 to 7.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520081294.5U CN204559531U (en) | 2015-02-04 | 2015-02-04 | PWM type equipment and output power limit circuit thereof |
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| CN201520081294.5U CN204559531U (en) | 2015-02-04 | 2015-02-04 | PWM type equipment and output power limit circuit thereof |
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| CN204559531U true CN204559531U (en) | 2015-08-12 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104660229A (en) * | 2015-02-04 | 2015-05-27 | 深圳市甲木科技有限公司 | PWM modulation device and output power limiting circuit thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104660229A (en) * | 2015-02-04 | 2015-05-27 | 深圳市甲木科技有限公司 | PWM modulation device and output power limiting circuit thereof |
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