CN220271766U - Visual management system of integration platform - Google Patents
Visual management system of integration platform Download PDFInfo
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- CN220271766U CN220271766U CN202322326475.7U CN202322326475U CN220271766U CN 220271766 U CN220271766 U CN 220271766U CN 202322326475 U CN202322326475 U CN 202322326475U CN 220271766 U CN220271766 U CN 220271766U
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- 230000000007 visual effect Effects 0.000 title claims abstract description 22
- 230000010354 integration Effects 0.000 title claims description 4
- 230000000087 stabilizing effect Effects 0.000 claims abstract description 30
- 230000005540 biological transmission Effects 0.000 claims abstract description 20
- 239000003990 capacitor Substances 0.000 claims description 38
- 238000012800 visualization Methods 0.000 claims 6
- 101150090280 MOS1 gene Proteins 0.000 description 5
- 101100401568 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) MIC10 gene Proteins 0.000 description 5
- 238000001914 filtration Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
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Abstract
The utility model relates to the technical field of visual management, in particular to an integrated platform visual management system which comprises a power management circuit, a signal acquisition circuit, a voltage stabilizing transmission circuit and an MCU (micro control unit), wherein the power management circuit provides stable voltage for each circuit, and the signal acquisition circuit acquires platform information and stably transmits the platform information to the MCU module for centralized visual display through the voltage stabilizing transmission circuit. According to the integrated platform visual management system, the power supply signals are filtered, so that stable power supply signals are provided for the circuit, meanwhile, the accuracy and stability of the acquired signals are guaranteed through the stable signal acquisition circuit and the voltage-stabilizing transmission circuit, stable and accurate signals are provided for the MCU, and the visual supervision efficiency of the system is improved.
Description
Technical Field
The utility model relates to the technical field of visual management, in particular to an integrated platform visual management system.
Background
The existing system integrated construction mode is formed by stacking equipment of various factories, is huge in size, poor in audio and video data fusion among the equipment, diversified in transmission protocol, and difficult in management among platforms, the unified visual supervision of the system is achieved through an integrated platform in the prior art, the requirement on stability of signals is high in visual supervision, but the signals are easily interfered by the outside in the acquisition and transmission processes, so that the signals reaching the MCU have deviation under disturbance, and errors exist in the signals accepted by the visual supervision.
Disclosure of Invention
The utility model aims to solve the defects in the background technology by providing an integrated platform visual management system.
The technical scheme adopted by the utility model is as follows:
the utility model provides an integration platform visual management system, including power management circuit, signal acquisition circuit, steady voltage transmission circuit and MCU, power management circuit provides stable voltage for each circuit, signal acquisition circuit gathers platform information to carry out stable transmission through steady voltage transmission circuit and carry out concentrated visual display to the MCU module.
As a preferred technical scheme of the utility model: the power management circuit comprises a first capacitor, a first resistor, a first switching tube, a second capacitor and a first voltage stabilizing tube; the first end of the first capacitor is connected with a power supply, the first end of the first resistor and the drain electrode of the first switching tube, the second end of the first capacitor is grounded, the second end of the first resistor is connected with the grid electrode of the first switching tube and the first end of the first voltage stabilizing tube, the source electrode of the first switching tube is connected with the first end and the output end of the second capacitor, the second end of the second capacitor is connected with the second end of the first voltage stabilizing tube, and the third end of the second voltage stabilizing tube is grounded.
As a preferred technical scheme of the utility model: the first voltage stabilizing tube is an NMOS tube.
As a preferred technical scheme of the utility model: the signal acquisition circuit comprises a second resistor, a third resistor, a first control chip, a fourth resistor, a third capacitor, a first amplifier, a fifth resistor, a second amplifier and a sixth resistor; the first end of the second resistor and the first end of the third resistor are connected with the output end of the power management circuit, the second end of the second resistor is connected with the first end of the first control chip, the fourth end of the first control chip is grounded, the fifth end of the first control chip is connected with the output end of the power management circuit, the seventh end of the first control chip is connected with the first end of the fourth resistor, the second end of the fourth resistor is connected with the first end of the third capacitor, the eighth end of the first control chip is connected with the second end of the third capacitor and the first end of the first amplifier, the second end of the first amplifier is grounded, the third end of the first amplifier is connected with the power cathode, the fifth end of the first amplifier is connected with the second end of the fourth resistor and the first end of the fifth resistor, the second end of the second amplifier is grounded, the third end of the second amplifier is connected with the power cathode, the fourth end of the second amplifier is connected with the power cathode, and the fifth end of the second amplifier is connected with the sixth end of the sixth resistor.
As a preferred technical scheme of the utility model: the power supply negative electrode is a power supply output end connected through a voltage inverter.
As a preferred technical scheme of the utility model: the voltage stabilizing transmission circuit comprises a seventh resistor, an eighth resistor, a second switching tube, a ninth resistor, a tenth resistor, a third switching tube, an eleventh resistor and a twelfth resistor; the first end of the seventh resistor is connected with the second end of the sixth resistor, the second end of the seventh resistor is connected with the first end of the eighth resistor and the base electrode of the second switching tube, the collector electrode of the second switching tube is connected with the first end of the ninth resistor, the second end of the eighth resistor and the emitter electrode of the second switching tube are grounded, the second end of the ninth resistor is connected with the first end of the tenth resistor and the third switch Guan Jiji, the second end of the tenth resistor is connected with the collector electrode of the third switching tube, the emitter electrode of the third switching tube is connected with the first end of the eleventh resistor and the first end of the twelfth resistor, the second end of the eleventh resistor is grounded, and the second end of the twelfth resistor is connected with the MCU.
As a preferred technical scheme of the utility model: the second switching tube and the third switching tube are NPN type triodes.
Compared with the prior art, the integrated platform visual management system provided by the utility model has the beneficial effects that:
according to the integrated platform visual management system, the power supply signals are filtered, so that stable power supply signals are provided for the circuit, meanwhile, the accuracy and stability of the acquired signals are guaranteed through the stable signal acquisition circuit and the voltage-stabilizing transmission circuit, stable and accurate signals are provided for the MCU, and the visual supervision efficiency of the system is improved.
Drawings
FIG. 1 is a diagram of a power management circuit and a signal acquisition circuit according to a preferred embodiment of the present utility model;
fig. 2 is a circuit diagram of a regulated transmission according to a preferred embodiment of the present utility model.
Detailed Description
It should be noted that, under the condition of no conflict, the embodiments of the present embodiments and features in the embodiments may be combined with each other, and the technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the drawings in the embodiments of the present utility model, and obviously, the described embodiments are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
Referring to fig. 1 and 2, a preferred embodiment of the present utility model provides an integrated platform visual management system, which includes a power management circuit, a signal acquisition circuit, a voltage stabilizing transmission circuit and an MCU, where the power management circuit provides stable voltages for each circuit, and the signal acquisition circuit acquires platform information and stably transmits the platform information to the MCU module for centralized visual display through the voltage stabilizing transmission circuit.
The power management circuit comprises a first capacitor, a first resistor, a first switching tube, a second capacitor and a first voltage stabilizing tube; the first end of the first capacitor is connected with a power supply, the first end of the first resistor and the drain electrode of the first switching tube, the second end of the first capacitor is grounded, the second end of the first resistor is connected with the grid electrode of the first switching tube and the first end of the first voltage stabilizing tube, the source electrode of the first switching tube is connected with the first end and the output end of the second capacitor, the second end of the second capacitor is connected with the second end of the first voltage stabilizing tube, and the third end of the second voltage stabilizing tube is grounded.
The first voltage stabilizing tube is an NMOS tube.
The signal acquisition circuit comprises a second resistor, a third resistor, a first control chip, a fourth resistor, a third capacitor, a first amplifier, a fifth resistor, a second amplifier and a sixth resistor; the first end of the second resistor and the first end of the third resistor are connected with the output end of the power management circuit, the second end of the second resistor is connected with the first end of the first control chip, the fourth end of the first control chip is grounded, the fifth end of the first control chip is connected with the output end of the power management circuit, the seventh end of the first control chip is connected with the first end of the fourth resistor, the second end of the fourth resistor is connected with the first end of the third capacitor, the eighth end of the first control chip is connected with the second end of the third capacitor and the first end of the first amplifier, the second end of the first amplifier is grounded, the third end of the first amplifier is connected with the power cathode, the fifth end of the first amplifier is connected with the second end of the fourth resistor and the first end of the fifth resistor, the second end of the second amplifier is grounded, the third end of the second amplifier is connected with the power cathode, the fourth end of the second amplifier is connected with the power cathode, and the fifth end of the second amplifier is connected with the sixth end of the sixth resistor.
The power supply negative electrode is a power supply output end connected through a voltage inverter.
The voltage stabilizing transmission circuit comprises a seventh resistor, an eighth resistor, a second switching tube, a ninth resistor, a tenth resistor, a third switching tube, an eleventh resistor and a twelfth resistor; the first end of the seventh resistor is connected with the second end of the sixth resistor, the second end of the seventh resistor is connected with the first end of the eighth resistor and the base electrode of the second switching tube, the collector electrode of the second switching tube is connected with the first end of the ninth resistor, the second end of the eighth resistor and the emitter electrode of the second switching tube are grounded, the second end of the ninth resistor is connected with the first end of the tenth resistor and the third switch Guan Jiji, the second end of the tenth resistor is connected with the collector electrode of the third switching tube, the emitter electrode of the third switching tube is connected with the first end of the eleventh resistor and the first end of the twelfth resistor, the second end of the eleventh resistor is grounded, and the second end of the twelfth resistor is connected with the MCU.
The second switching tube and the third switching tube are NPN type triodes.
In this embodiment, referring to fig. 1, the power management circuit includes a first capacitor C1, a first resistor R1, a first switching tube MOS1, a second capacitor C2, and a first voltage stabilizing tube D1; the first end of the first capacitor C1 is connected with a power supply, the first end of the first resistor R1 and the drain electrode of the first switching tube MOS1, the second end of the first capacitor C1 is connected with the first end of the first switching tube MOS1 grid electrode and the first end of the first voltage stabilizing tube D1, the source electrode of the first switching tube MOS1 is connected with the first end and the output end of the second capacitor C2, the second end of the second capacitor C2 is connected with the second end of the first voltage stabilizing tube D1, and the third end of the second voltage stabilizing tube D1 is connected with the ground.
In the power management circuit, a primary filtering circuit formed by a first capacitor C1 and a first resistor R1 performs primary filtering processing, high-frequency alternating current in an input power supply is led into the ground, so that current entering the voltage stabilizing circuit is direct current, and then a secondary filtering circuit formed by a first switching tube MOS1, a second capacitor C2 and a first voltage stabilizing tube D1 performs secondary filtering processing, so that high-frequency current still existing in the current is filtered, and a power supply signal output by the power management circuit is filtered, so that a stable power supply is provided for each module circuit.
The signal acquisition circuit comprises a second resistor R2, a third resistor R3, a first control chip U1, a fourth resistor R4, a third capacitor C3, a first amplifier A1, a fifth resistor R5, a second amplifier A2 and a sixth resistor R6; the first end of the second resistor R2 and the first end of the third resistor R3 are connected with the output end of the power management circuit, the second end of the second resistor R2 is connected with the first end of the first control chip U1, the fourth end of the first control chip U1 is grounded, the fifth end of the first control chip U1 is connected with the output end of the power management circuit, the seventh end of the first control chip U1 is connected with the first end of the fourth resistor, the second end of the fourth resistor R4 is connected with the first end of the third capacitor C3, the eighth end of the first control chip U1 is connected with the second end of the third capacitor C3 and the first end of the first amplifier A1, the second end of the first amplifier A1 is grounded, the third end of the first amplifier A1 is connected with the power anode, the fourth end of the first amplifier A1 is connected with a power supply cathode, the power supply cathode can realize voltage inversion through a voltage inverter, for example, a DC/DC charge pump voltage inverter with the model of ME7660 is arranged, the fifth end of the first amplifier A1 is connected with the second end of the fourth resistor R4 and the first end of the fifth resistor R5, the second end of the fifth resistor R5 is connected with the second end of the third resistor R3, the first end of the sixth resistor R6 and the first end of the second amplifier A2, the second end of the second amplifier A2 is grounded, the third end of the second amplifier A2 is connected with the power supply cathode, the fourth end of the second amplifier A2 is connected with the second end of the power supply cathode, and the fifth end of the second amplifier A2 is connected with the second end of the sixth resistor R6.
In the signal acquisition circuit, a first control chip U1 can adopt a core component with the model of AD5453 to acquire and control signals, and the two-stage amplifier circuit formed by the first amplifier A1 and the second amplifier A2 respectively realizes the conversion from current to voltage and provides twice gain, and the measurement precision is improved by correspondingly processing the acquired dynamic signals.
Referring to fig. 2, the regulated transmission circuit includes a seventh resistor R7, an eighth resistor R8, a second switching tube Q1, a ninth resistor R9, a tenth resistor R10, a third switching tube Q2, an eleventh resistor R11, and a twelfth resistor R12; the first end of the seventh resistor R7 is connected with the second end of the sixth resistor R6, the second end of the seventh resistor R7 is connected with the first end of the eighth resistor R8 and the base electrode of the second switching tube Q1, the collector electrode of the second switching tube Q1 is connected with the first end of the ninth resistor R9, the second end of the eighth resistor R8 and the emitter electrode of the second switching tube Q1 are grounded, the second end of the ninth resistor R9 is connected with the first end of the tenth resistor R10 and the base electrode of the third switching tube Q2, the second end of the tenth resistor R10 is connected with the collector electrode of the third switching tube Q2, the emitter electrode of the third switching tube Q2 is connected with the first end of the eleventh resistor R11 and the first end of the twelfth resistor R12, the second end of the eleventh resistor R11 is grounded, and the second end of the twelfth resistor R12 is connected with the MCU.
The voltage stabilizing transmission circuit is used for filtering noise interference, preventing signal distortion, realizing signal amplification and stable transmission, providing stable signal source for MCU, and realizing stable supervision of the integrated platform.
It will be evident to those skilled in the art that the utility model is not limited to the details of the foregoing illustrative embodiments, and that the present utility model may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the utility model being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment is provided with a separate embodiment, and that this description is provided for clarity only, and that the disclosure is not limited to the embodiments described in detail below, and that the embodiments described in the examples may be combined as appropriate to form other embodiments that will be apparent to those skilled in the art.
Claims (7)
1. The utility model provides an integration platform visual management system, includes power management circuit, signal acquisition circuit, steady voltage transmission circuit and MCU, its characterized in that: the power management circuit provides stable voltage for each circuit, and the signal acquisition circuit acquires platform information and stably transmits the platform information to the MCU module for centralized visual display through the voltage stabilizing transmission circuit.
2. The integrated platform visualization management system of claim 1, wherein: the power management circuit comprises a first capacitor, a first resistor, a first switching tube, a second capacitor and a first voltage stabilizing tube; the first end of the first capacitor is connected with a power supply, the first end of the first resistor and the drain electrode of the first switching tube, the second end of the first capacitor is grounded, the second end of the first resistor is connected with the grid electrode of the first switching tube and the first end of the first voltage stabilizing tube, the source electrode of the first switching tube is connected with the first end and the output end of the second capacitor, the second end of the second capacitor is connected with the second end of the first voltage stabilizing tube, and the third end of the second voltage stabilizing tube is grounded.
3. The integrated platform visualization management system of claim 2, wherein: the first voltage stabilizing tube is an NMOS tube.
4. The integrated platform visualization management system of claim 3, wherein: the signal acquisition circuit comprises a second resistor, a third resistor, a first control chip, a fourth resistor, a third capacitor, a first amplifier, a fifth resistor, a second amplifier and a sixth resistor; the first end of the second resistor and the first end of the third resistor are connected with the output end of the power management circuit, the second end of the second resistor is connected with the first end of the first control chip, the fourth end of the first control chip is grounded, the fifth end of the first control chip is connected with the output end of the power management circuit, the seventh end of the first control chip is connected with the first end of the fourth resistor, the second end of the fourth resistor is connected with the first end of the third capacitor, the eighth end of the first control chip is connected with the second end of the third capacitor and the first end of the first amplifier, the second end of the first amplifier is grounded, the third end of the first amplifier is connected with the power cathode, the fifth end of the first amplifier is connected with the second end of the fourth resistor and the first end of the fifth resistor, the second end of the second amplifier is grounded, the third end of the second amplifier is connected with the power cathode, the fourth end of the second amplifier is connected with the power cathode, and the fifth end of the second amplifier is connected with the sixth end of the sixth resistor.
5. The integrated platform visualization management system of claim 4, wherein: the power supply negative electrode is a power supply output end connected through a voltage inverter.
6. The integrated platform visualization management system of claim 5, wherein: the voltage stabilizing transmission circuit comprises a seventh resistor, an eighth resistor, a second switching tube, a ninth resistor, a tenth resistor, a third switching tube, an eleventh resistor and a twelfth resistor; the first end of the seventh resistor is connected with the second end of the sixth resistor, the second end of the seventh resistor is connected with the first end of the eighth resistor and the base electrode of the second switching tube, the collector electrode of the second switching tube is connected with the first end of the ninth resistor, the second end of the eighth resistor and the emitter electrode of the second switching tube are grounded, the second end of the ninth resistor is connected with the first end of the tenth resistor and the third switch Guan Jiji, the second end of the tenth resistor is connected with the collector electrode of the third switching tube, the emitter electrode of the third switching tube is connected with the first end of the eleventh resistor and the first end of the twelfth resistor, the second end of the eleventh resistor is grounded, and the second end of the twelfth resistor is connected with the MCU.
7. The integrated platform visualization management system of claim 6, wherein: the second switching tube and the third switching tube are NPN type triodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322326475.7U CN220271766U (en) | 2023-08-29 | 2023-08-29 | Visual management system of integration platform |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322326475.7U CN220271766U (en) | 2023-08-29 | 2023-08-29 | Visual management system of integration platform |
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| Publication Number | Publication Date |
|---|---|
| CN220271766U true CN220271766U (en) | 2023-12-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202322326475.7U Active CN220271766U (en) | 2023-08-29 | 2023-08-29 | Visual management system of integration platform |
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| CN (1) | CN220271766U (en) |
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2023
- 2023-08-29 CN CN202322326475.7U patent/CN220271766U/en active Active
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