CN220256455U - Wearable remote heart rate pulse monitoring system - Google Patents

Abstract

Discloses a wearable remote heart rate and pulse monitoring system, which belongs to the technical field of heart rate and pulse monitoring. The heart rate and pulse monitoring system comprises a central processing unit, a signal acquisition module, a peripheral module, a storage module for storing heart rate and pulse data, a communication module and a power module for supplying power to the remote heart rate and pulse monitoring system, wherein the signal acquisition module, the peripheral module, the storage module and the communication module are connected with the central processing unit through an I/O interface; the signal acquisition module comprises a heart rate acquisition circuit, a pulse acquisition module, a filtering and amplifying circuit and an analog-to-digital conversion circuit, wherein the filtering and amplifying circuit and the analog-to-digital conversion circuit are connected with the pulse acquisition module; the peripheral module comprises a clock circuit, a display circuit and a key control circuit; the communication module comprises a wireless communication circuit, an upper computer and/or a client. The method has the advantages of simple operation, convenient carrying, low power consumption and the like, can continuously monitor electrocardio and pulse with long-time low load, and is more suitable for home cardiovascular monitoring of arrhythmia patients such as atrial fibrillation and the like.

Description

Wearable remote heart rate pulse monitoring system

Technical Field

The utility model belongs to the technical field of heart rate and pulse monitoring, relates to a heart rate and pulse monitoring system, and particularly relates to a wearable remote heart rate and pulse monitoring system.

Background

Cardiovascular diseases have become important diseases in China and even worldwide, and heart rate carry abundant information of human health conditions. The electrocardio and pulse wave signals are closely related to bioelectricity and biomechanics respectively. The heart rate is the first heart sound generated after the mitral valve is closed by the left ventricular systole, is heard with a stethoscope at the apex beat position 1-1.5 cm inside the intersection of the left collarbone midline and the fifth intercostal space, or is obtained by an electrocardiogram. The heart rate is the first heart sound count accumulated over 1 minute. The pulse is the contraction of the left ventricle and the pressure generated by the blood in the aorta is transferred to the peripheral arterial pulse along with the vessel wall. The pulse is the number of pulse beats accumulated in 1 minute. Common locations for pulse measurement are the cerebral artery on the radial side of the wrist joint, the carotid artery on both sides of the neck, the brachial artery near the fossa of the elbow, the abdominal aorta on the abdomen, and the dorsum manus et pedis artery on the back side of the medial and lateral malleoli. The heart rate and the number of pulses are substantially uniform for sinus rhythms. However, there are differences in pathological conditions such as a short pulse of ventricular premature beat, atrial fibrillation, atrial flutter, ectopic heart rhythm, impulse from a non-sinus node, etc., and the pulse rate is less than the heart rate. Therefore, the simultaneous detection of heart rate and pulse is of great importance for diagnosing and monitoring diseases.

The frequency range of the electrocardiosignal of the human body is 0-250 Hz, the main frequency range is concentrated at 0.05-150 Hz, and the amplitude is about 10 mu V-4 mV. The main energy of the pulse signal of the human body is distributed at 0.5-5 Hz. The electrocardio and pulse signals acquired by the sensor are within microvolts to millivolts, and the signals are weak and the interference is strong. The signals are amplified to the volt level by proportion and can be processed by the central processing unit. The utility model measures pulse using photoplethysmography (PPG). The light beam irradiates the skin surface and is transmitted to the photoelectric receiver in a transmission or reflection mode. Absorption decay of skin muscles and blood weakens the light intensity monitored by the photo-receiver. Wherein the absorption of light by the skin, muscle, tissue, etc. is constant throughout the blood circulation, and the blood pressure volume within the skin varies in terms of pulsatility under the action of the heart. The peripheral blood volume is the most when the heart contracts, the light absorption capacity is the most, and the detected light intensity is the least; the detected light intensity is greatest at diastole, and therefore the light intensity detected by the light receiver varies in pulses. The light intensity change signal is converted into an electric signal to obtain pulse information. The sensor used consists of a light source and a photoelectric transducer. The detection part is finger, wrist or earlobe. The light source is generally an array of light sources for oxygenated hemoglobin (HbO) in arterial blood ₂ ) And a Light Emitting Diode (LED) of a specific wavelength selected selectively from hemoglobin (Hb) (generally, red light near 660nm and infrared light near 900nm are selected). The traditional heart rate detection equipment mostly adopts red light or infrared light as a light source, the pulsation component is detected through veins and capillaries below the skin surface layer, and green light has stronger penetrating capacity than red light, so that more light reaches below the skin surface layer and returns, and therefore, the utility model adopts green light as a light source.

The traditional pulse rate measurement method mainly comprises three steps: firstly, extracting from electrocardiosignals; secondly, calculating pulse rate from fluctuation measured by the pressure sensor when measuring blood pressure; thirdly, a photoelectric volumetric method. Both of the first two methods extract signals that limit the patient's activity and increase the patient's physiological and psychological discomfort if used for prolonged periods of time. The photoplethysmography pulse measurement is one of the most common methods in monitoring measurement, and has the advantages of simple structure, convenient wearing, high reliability, no damage, high accuracy and reusability.

There are three methods of heart rate detection: first, the green PPG is closer to the data acquired by the electrocardiogram. Secondly, by arterial blood pressure method, both sides of wrist or neck can feel regular fluctuation of arterial pressure, and the signals are changed into heart rate by pressure sensors in the wearable equipment. Thirdly, by means of electrocardio signal method, heart rate change is detected through electrode plate collecting point change, and accuracy of measuring results is higher than that of photoelectric method. However, in arrhythmia patients whose pulse and heart rate are inconsistent, such wearable heart rate pulse monitoring systems are unable to reflect the patient's actual heart rate and pulse.

The utility model adopts PPG mode to design pulse information monitoring and causes chest point position change through heart beating, and acquires electrocardiosignals to obtain heart rate information, including resting heart rate, exercise heart rate, maximum heart rate and heart rate reserve. The user detects both data simultaneously. The pulse sensor is worn at the radial artery pulsation of the wrist; the lower edges (negative levels) of the middle points of the right collarbones and the fourth intercostal space (positive electrode) of the left anterior axillary line are respectively placed at the positions of the 3 electrode plates for collecting electrocardiograms, and the lower part of the xiphoid process is deviated to the right (grounding electrode). The multi-sensor fusion mode can effectively reduce the influence of body temperature on heart rate estimation, compared with the traditional heart rate pulse monitoring equipment, the multi-sensor fusion mode has the advantages of being simple to operate, convenient to carry, low in power consumption and the like, can continuously monitor electrocardio and pulse under a low load for a long time, and is more suitable for home cardiovascular monitoring of arrhythmia patients such as atrial fibrillation.

Disclosure of Invention

The wearable remote heart rate and pulse monitoring system is characterized by comprising a central processing unit, a signal acquisition module, a peripheral module, a storage module for storing heart rate and pulse data, a communication module and a power module for supplying power to the remote heart rate and pulse monitoring system, wherein the signal acquisition module, the peripheral module, the storage module and the communication module are connected with the central processing unit through an I/O interface; the signal acquisition module comprises a heart rate acquisition circuit for acquiring heart rate signals, a pulse acquisition module for acquiring pulse signals, a filtering and amplifying circuit and an analog-to-digital conversion circuit, wherein the filtering and amplifying circuit and the analog-to-digital conversion circuit are connected with the pulse acquisition module; the peripheral module comprises a clock circuit for providing clock signals and time information for the heart rate and pulse monitoring system, a display circuit for displaying heart rate and pulse monitoring results, and a key control circuit for sending control instructions to the remote heart rate and pulse monitoring system; the communication module comprises a wireless communication circuit and an upper computer and/or a client which communicate and interact with the wireless communication circuit.

Further, the signal acquisition module further comprises a body temperature acquisition sensor circuit for detecting body temperature.

Further, the peripheral module further comprises an alarm circuit for giving out sound and/or light alarm when the detection value of the remote heart rate pulse monitoring system is not in the set range.

Further, the peripheral module further comprises a status light circuit for monitoring the working status of the remote heart rate and pulse monitoring system.

Further, the storage module comprises a FLASH memory circuit and a serial FLASH circuit, wherein the FLASH memory circuit is used for FLASH memory storage of heart rate and pulse data monitored by the remote heart rate and pulse monitoring system, and the serial FLASH circuit is used for temporary storage of heart rate and pulse data monitored by the remote heart rate and pulse monitoring system.

Further, the power module comprises a battery charging circuit, an electric quantity detection circuit, a 5V boosting circuit, a 1.8V voltage stabilizing circuit and a 3.3V voltage stabilizing circuit, wherein the battery charging circuit is connected with the electric quantity detection circuit through a VBAT interface and is connected with the 5V boosting circuit through the VBAT interface.

Further, the key control circuit at least comprises a heart rate monitoring switching key, a pulse monitoring switching key and more than one self-defined function key.

Further, the light source emitting circuit emits light sources with wavelengths ranging from 515nm to 600 nm.

Further, the wireless communication circuit comprises a transmitting part and a receiving part, wherein the transmitting part transmits heart rate and pulse data in the central processing unit to the client and/or the upper computer, and the receiving part receives instructions of the client and/or the upper computer and transmits the instructions to the central processing unit

Still further, the status light circuit is an LED light, and includes a power status light and at least one other status light capable of being customized.

Still further, the 3.3V voltage stabilizing circuit has two groups, one group of circuits is independently supplied with power for the heart rate acquisition circuit and the analog-to-digital conversion circuit, and the other group of circuits is supplied with power for other circuits with working voltage of 3.3V, so as to isolate the possible interference of the other circuits with working voltage of 3.3V on the heart rate acquisition circuit, the power supply and the ground wire of the analog-to-digital conversion circuit.

The beneficial effects are that: the utility model provides a solution of wearable long-range heart rate pulse monitoring system adopts wrist wearing, 3 electrode slices of chest subsides mode, utilizes signal acquisition modules such as heart rate acquisition circuit, pulse acquisition module, body temperature acquisition sensor circuit to acquire the person's heart rate and pulse information, carries out data filtering amplification and analog-to-digital conversion, and central processing unit accomplishes electrocardiosignal, heart rate, pulse wave, automatic generation of pulse, comprehensive analysis, data storage, result display, transmission interaction, electrocardio and pulse waveform display; finally, parameters of characteristic properties of the heart rate and the pulse are obtained, including waveforms, resting heart rate, exercise heart rate, maximum heart rate, heart rate reserves and pulse, and audible and visual alarm is carried out under abnormal conditions of the heart rate or the pulse, and alarm time and times are recorded. The remote client can ensure that continuous, stable and high-precision heart rate and pulse signal data are always output by monitoring. Compared with the traditional heart rate pulse monitoring system, the system is convenient to wear, simple to operate, accurate in measurement and suitable for home cardiovascular monitoring of patients suffering from arrhythmia, such as atrial fibrillation and the like.

Drawings

Fig. 1 is a schematic diagram of the overall structure design of the novel structure.

Fig. 2 is a schematic diagram of a cpu circuit.

Fig. 3 is a schematic diagram of a heart rate acquisition circuit.

Fig. 4 is a schematic diagram of a pulse acquisition module connection.

Fig. 5 is a schematic circuit diagram of a body temperature acquisition sensor.

Fig. 6 is a schematic diagram of a filtering and amplifying circuit.

Fig. 7 is a schematic diagram of an analog-to-digital conversion circuit.

Fig. 8 is a schematic diagram of a wireless communication circuit.

Fig. 9 is a schematic diagram of a flash memory circuit.

Fig. 10 is a serial Flash circuit schematic.

Fig. 11 is a schematic diagram of a clock circuit.

Fig. 12 is a schematic diagram showing a circuit.

Fig. 13 is a schematic diagram of a status light circuit.

Fig. 14 is a schematic diagram of an alarm circuit.

Fig. 15 is a schematic diagram of a key control circuit.

Fig. 16 is a schematic diagram of a power detection circuit.

Fig. 17 is a schematic diagram of a battery charging circuit.

Fig. 18 is a 5V boost circuit schematic.

Fig. 19 is a schematic diagram of a 1.8V voltage regulator circuit.

Fig. 20 is a schematic diagram of a 3.3V voltage regulator circuit.

Detailed Description

In order to more clearly illustrate the technical solution in the embodiments of the present utility model, the following will describe the technical solution in the embodiments of the present utility model in detail and in complete with reference to the accompanying drawings in the embodiments of the present utility model.

Fig. 1 is a schematic diagram of the overall structure of a wearable remote heart rate and pulse monitoring system, which comprises a central processing unit, a signal acquisition module, a peripheral module, a storage module for storing heart rate and pulse data, a communication module and a power module for supplying power to the remote heart rate and pulse monitoring system, wherein the signal acquisition module, the peripheral module, the storage module and the communication module are connected with the central processing unit through an I/O interface; the signal acquisition module comprises a heart rate acquisition circuit for acquiring heart rate signals, a pulse acquisition module for acquiring pulse signals, a filtering and amplifying circuit and an analog-to-digital conversion (ADC) circuit, wherein the pulse acquisition module comprises a light source transmitting circuit and a receiving feedback circuit; the peripheral module comprises a clock circuit for providing clock signals and time information for the heart rate and pulse monitoring system, a display circuit for displaying heart rate and pulse monitoring results, and a key control circuit for sending control instructions to the remote heart rate and pulse monitoring system; the communication module comprises a wireless communication circuit and an upper computer and/or a client which communicate and interact with the wireless communication circuit. In order to expand the system function, a circuit for measuring the body temperature by a body temperature acquisition sensor can be added in a signal acquisition module of the remote heart rate pulse monitoring system; an alarm circuit can be added in the peripheral module so as to give out sound and/or brightness alarm when the detection value of the remote heart rate pulse monitoring system is not in the set range; a status light circuit for monitoring the working state of the remote heart rate pulse monitoring system can be added; the storage module can be provided with a FLASH memory circuit and a serial FLASH circuit which are respectively used for monitoring the FLASH memory storage and temporary storage of heart rate and pulse data. The power supply module comprises a battery charging circuit, an electric quantity detection circuit, a 5V voltage boosting circuit, a 1.8V voltage stabilizing circuit and a 3.3V voltage stabilizing circuit.

Fig. 2 is a schematic diagram of a cpu circuit. The central processor chip is preferably an STM32F407ZGT6 chip. The STM32F407ZGT6 chip is an ARM Cortex-M4 32 bit RISC kernel, has 168MHz working frequency, and supports a floating point arithmetic unit (FPU) and a complete set of Digital Signal Processing (DSP) instructions. The system comprises a Memory Protection Unit (MPU), 3 12-bit analog-to-digital converters, 2 12-bit digital-to-analog converters, 1 low-power RTC and 12 general 16-bit timers. 144 pins, 114 IO interfaces, support SWD and JTAG debugging. With 1024KFLASH and 192ksram,17 communication interfaces, 16 DMA channels. The power supply and IO voltage of 1.8-3.6V are supported, and the power-on reset, the power-off reset and the programmable voltage control are realized. The high-speed oscillator has 4-26M external high-speed crystal oscillator, 32.768K external low-speed crystal oscillator, 16MHz internal high-speed RC oscillator and 32KHz internal low-speed oscillator. The system has three low power consumption modes of sleep, stop and standby, and can supply power for the RTC and the backup register by using a battery. The requirements of the monitor on the electrocardio, heart rate and pulse data processing can be met. And receiving the digital body temperature signal and the heart rate signal output by the electrocardiosignal acquisition and processing module, and the pulse signal subjected to filtering amplification and analog-to-digital conversion, uploading the pulse signal to a heart rate and pulse acquisition client through a wireless communication circuit, and displaying the pulse signal at the acquisition client.

The STM32F407ZGT6 microcontroller is connected with each circuit through an I/O interface as follows: the heart rate acquisition circuit is connected with the heart rate acquisition circuit through a PWDN PB6 pin, a DRDY PB7 pin, a CS3 PB8 pin, an SCLK PB3 pin, a MISO PB4 pin and a MOSI PB5 pin; the analog-to-digital conversion circuit is connected with the analog-to-digital conversion circuit through an SCL PB10 pin, an SDA PB11 pin and an ALERT PB9 pin; the DOUT PA3 pin is connected with the body temperature acquisition sensor; the clock circuit is connected with the clock circuit through a CLK PA5 pin, an IO PA6 pin and a CE PA7 pin; the serial FLASH is connected with the serial FLASH through an SCLK PB3 pin, a MISO PB4 pin, a MOSI PB5 pin and a CS2 PB6 pin; the LED1 PC0 pin, the LED2 PC1 pin, the LED3 PC2 pin and the LED4 PC3 pin are connected with the status lamp circuit; the touch control panel is connected with a touch control screen circuit through a DB0 PE0 pin, a DB1 PE1 pin, a DB2 PE2 pin, a DB3 PE3 pin, a DB4 PE4 pin, a DB5 PE5 pin, a DB6 PE6 pin, a DB7 PE7 pin, a DB8 PE8 pin, a DB9 PE9 pin, a DB10 PE10 pin, a DB11 PE11 pin, a DB12 PE12 pin, a DB13 PE13 pin, a DB14 PE14 pin, a DB15 PE15 pin, a BTRL PF7 pin, a CS4 PF8 pin, a BUSYPF 9 pin, a TP-INT PF10 pin, a TFT-RSPF 11 pin, a TFT-CS PF12 pin, a TFT-RS PF13, a TFT-WRPF 14 pin and a TFT-RD PF15 pin; the alarm circuit is connected with the alarm circuit through a BEEL PG0 pin; the key control circuit is connected with the key control circuit through an S1 PG1 pin, an S2 PG2 pin, an S3 PG3 pin and an S4 PG4 pin; the U4 RX PA1 pin is connected with the wireless communication circuit through U4 TX PA 0; and the power supply is connected with the electric quantity detection circuit through an ADC PF4 pin.

FIG. 3 is a schematic diagram of a heart rate acquisition circuit, optionally ADS1921/T. ADS1921/T is a multi-channel synchronous sampled 24-bit delta-sigma analog-to-digital converter with built-in programmable gain amplifier, internal reference and on-board oscillator. The power consumption is as low as 335 mu W/channel,the input reference noise is 8 mu VPP,150Hz bandwidth, the input bias current is 200pA, the data rate is 125 SPS-8 kSPS, the CMRR is 120dB, the programmable gain is 1, 2, 3, 4, 6, 8 or 12, the monopole or bipolar power supply, the analog voltage is 2.7-5.25V, the digital voltage is 1.7-3.6V, the built-in right leg driving amplifier can continuously detect and test signals, and the power-off and standby modes and SPI are flexible ^TM The serial interface is compatible, and the working temperature range is-40 to +85 ℃. A 5mm×5mm, 32-pin thin quad flat package and a 4mm×4mm, 32-pin leadless quad flat package are employed. The ADS1291 chip is an ECG-type dedicated chip with EMI filters for each ECG signal input channel and differential inputs for signal input to reduce common mode interference. The gain program control system amplifies the electrocardiosignal. The electrode plate is connected with the ADS1291 chip, and only direct current filtering of the capacitor is needed.

Fig. 4 is a schematic diagram of a pulse acquisition module connection. The light source transmitting circuit in the pulse acquisition module selects an AM2520ZGC09 type LED transmitter. The 560nm wave can reflect the information of the superficial micro-pulse of the skin, the green light LED with the peak wavelength of 515nm enables more light to reach the lower part of the epidermis of the skin and return, the system is suitable for extracting pulse signals, and the system adopts 515 nm-600 nm light as a light source. The signal is amplified 331 times (g=1+r13/R10) using a high-pass filter and an amplifier constituted by the op-amp MCP6001 in the latter.

The receiving feedback circuit in the pulse acquisition module is used for receiving the light reflected after the light emitted by the light source emitting circuit is absorbed by skin, soft tissues, blood and the like. The receiving feedback circuit is connected with an INTRARED-OUT of the signal filtering and amplifying circuit through an INTRARED-OUT 6 pin, and the signal filtering and amplifying circuit is connected with the analog-to-digital conversion circuit through an Amplifier output. And the APDS-9008 chip is selected as the receiving feedback circuit in the pulse acquisition module. The APDS-9008 chip integrates a well matched light sensor, has excellent response capability, 0.55X1.60deg.C 1.50mm, and has the advantages of LED lead-free surface mounting packaging, operating temperature of-40-85deg.C, operating power supply voltage range of 1.6-5.5V, output linearity in a wide illumination range, and high output saturation voltage.

Fig. 5 is a schematic circuit diagram of a body temperature acquisition sensor, which uses a CT1711MCR chip. The resolution of the CT1711MCR chip is 0.00390625 ℃ (1/256), the temperature accuracy error of measurement at 30-45 ℃ is less than +/-0.1 ℃, the temperature digital expression is higher than 128 ℃, the temperature response time is about 2S, and the temperature output adopts an S-Wire interface protocol. 17 bits ADS. The working voltage is 1.8-5.5V, the average working current of temperature collection is 4.5uA (1 time/second), and the standby current is as low as 10nA. 3.0X1.0X1.0mm, MCLGA3X3-4 package. Can directly contact skin, and is especially suitable for clinical thermometer application. The utility model mainly cooperates with heart rate part collecting electrode to measure the temperature of human body surface, and eliminates temperature interference.

Fig. 6 is a schematic diagram of a filtering and amplifying circuit. The filtering and amplifying circuit is an MCP6001T chip. The MCP6001T chip has a 1MHz gain bandwidth product (GBWP) and a 90 ° phase margin. 45 deg. phase margin under 500pF capacitive load. 1.8-6V single power supply working voltage, 100 muA static current. The rail-to-rail input and output swing is supported, with common mode input voltages ranging from V-DD+300mV to V-SS-300mV. The industrial temperature range is-40 to +85 ℃, and the expansion temperature range is-40 to +125 ℃. There is a 3.1X1.8X1.3 mm, 5 core SOT-23 package, surface mount. The interference of low-frequency noise of 1.6Hz is eliminated by RC high-pass filters of C9 (4.7 uF), C10 (2.2 uF), R10 (10K) and R12 (100K), and the cutoff frequency f=1/[ 2 pi ((C9C 10)/(0.5)) ((R10R 12)/(0.5) ]=1.6 Hz; the DC component and the high frequency spike signal in the signal are filtered out by the series capacitor. Finally, the amplification factor is approximately 331 times of the fixed non-adjustable mode through the operational amplifier chip and the operational amplifier circuit formed by the R13 and the R10, and G= (1+R13/R10) = 331.

Fig. 7 is a schematic diagram of an analog-to-digital conversion circuit. The analog-to-digital conversion circuit adopts an ADS1115 chip. ADS1115 chip operating voltage is 2.0-5.5V, current consumption is 150 μA, programming data rate is 8-860 SP, single cycle subsidence, internal low drift voltage reference, internal oscillator, four-pin selectable address I2C interface, four single-ended or two differential inputs, programmable comparator. The obtained digital quantity is transmitted to a central processing unit for data calculation and processing.

Fig. 8 is a schematic diagram of a wireless communication circuit. The wireless communication circuit adopts an AP6212 chip. The AP6212 chip is a WiFi+BT4.2 module with low power consumption and high performance, and accords with the 802.11b/g/n standard, wherein the WiFi function adopts an SDIO interface, the Bluetooth adopts a UART/I2S/PCM interface, and the Bluetooth has StationMode, softAP, P2P functions and the like.

Fig. 9 is a schematic diagram of a flash memory circuit. The flash memory circuit is a W25N01 GVGZEIG chip. The W25N01GVZEIG chip integrates the SPI interface and NAND nonvolatile memory space. The working voltage is 2.7-3.6V, the working current consumption is as low as 25mA, and the standby current consumption is as low as 10 mu A. The bit memory array is organized into 65,536 programmable pages of 2,048 bytes each. The entire page may be programmed at one time with data in a 2,048 byte internal buffer. Pages may be erased in 128KB blocks, with 1,024 erasable blocks. Support standard Serial Peripheral Interface (SPI), dual/quad I/O SPI. SPI clock frequencies up to support 104MHz, allowing equivalent clock rates for dual I/O to 208MHz and 416MHz. With a sequential read mode, the entire memory array with a single read command is effectively accessed. 1 unique ID page of 2,048 bytes, one parameter page of 2,048 bytes, and ten OTP pages of 2,048 bytes are supported. Flash memory storage for heart rate and pulse data.

Fig. 10 is a serial Flash circuit schematic. The serial FLASH circuit adopts a W25Q64 chip. The single power supply with 2.7-3.6V consumes current and power as low as 1 mu A and the working range of-40 to +85 ℃. The array is divided into 32,768 programmable pages of 256 bytes each. One time programming can be 1-256 bytes. May be erased in 4KB sectors, 32 or 64KB blocks or whole chip. Support standard Serial Peripheral Interface (SPI), dual/quad I/O SPI, quad Peripheral Interface (QPI) and Dual Transfer Rate (DTR): supporting SPI clock frequencies up to 133MHz, double I/O equivalent clock rates of 266MHz, four-way I/O equivalent clocks of 532MHz, use fast read double/four I/O and QPI instructions. These 3 transfer rates may exceed standard asynchronous 8-bit and 16-bit parallel flash memories. Memory access with 8 instruction overhead can read 24-bit addresses, supporting SFDP registers, 64-bit unique sequence numbers and 3 256-byte security registers. 8-pin SOIC 208-mil, 8-pad WSON 8X 6-mm, etc. For temporary storage of heart rate and pulse data.

Fig. 11 is a schematic diagram of a clock circuit. The clock circuit is selected from a model DS1302. Including real time clock/calendar and 31 bytes of static RAM, the real time clock counts seconds, minutes, hours, months, days, years. For months less than 31 days, the end of month date will automatically adjust, including correction of leap years. The clock operates in 24 hour or 12 hour format and carries an AM/PM indicator. The low power operation prolongs the battery backup running time, 2.0-5.5V working voltage, uses less than 300nA of current at 2.0V voltage, 8-pin DIP, and keeps data and clock information under the condition of less than 1 mu W. Only CE, I/O and SCLK are needed to communicate with clock/RAM. Each heart rate and pulse monitoring time was recorded.

Fig. 12 is a schematic diagram showing a circuit. The display circuit is a type 2.8 inch LCD touch screen. The resolution is 240 x 320 and the display portion is driven by ILI 9341. A Thin Film Transistor (TFT) is provided for each pixel of the liquid crystal display. The display size is 43.2 x 57.6mm, the parallel voltage of 4 LED lamps is 3.3V, the current is 60mA, and the power consumption is 0.2W.

To display the device status of the remote heart rate pulse monitoring system, a status light circuit is also provided. Fig. 13 is a schematic diagram of a status light circuit. The status lamp circuit selects the LED lamp, including the power status lamp and other three status lamps which can be customized, such as the status lamp of the CPU, and the status lamp is lighted when the CPU works through the program definition instruction. The other two are also defined by programs, and the central processing unit gives instructions under specific conditions, such as receiving a certain signal, insufficient voltage, lighting when the network works normally, and the like.

Fig. 14 is a schematic diagram of an alarm circuit. The alarm circuit is S8050. S8050 is a low-power NPN silicon tube, the maximum voltage of a collector-base electrode is 40V, and the collector current is 0.5A. The collector dissipated power was 0.625W (patch: 0.3W), the collector-emitter voltage was 25V, the emitter-base voltage was 6V, and the minimum characteristic frequency was 150MHz. When the pulse measured value is more than or equal to the highest warning value or the pulse measured value is less than or equal to the lowest warning value, the alarm gives an alarm.

Fig. 15 is a schematic diagram of a key control circuit. The key control circuit mainly performs trigger type instruction control on the circuit function part, and the key is used for triggering a low-level signal to an IO port of the singlechip, so that the function circuit part is indirectly controlled. The system parameter adjustment device can be used as trigger instructions of system parameter adjustment setting, system menu and the like, and the pulse detection and heart rate detection modes are refreshed and the display standard is set through an external key.

Fig. 16 is a schematic diagram of a power detection circuit. The electric quantity detection circuit is directly connected with the voltage dividing resistor through the battery voltage, calculates the voltage dividing proportion through the voltage dividing value, and gives the acquired voltage to the ADC interface of the central processing unit, so that the electric quantity information of the battery can be detected.

Fig. 17 is a schematic diagram of a battery charging circuit. The battery charging circuit selects TP4056X linear battery charger. TP4056X has positive and negative reverse connection protection function, input power supply voltage is-6.5-12V, programmable charging current up to 1000mA, 2.9V trickle charge, 4.2V preset charging voltage with accuracy +/-1%, charging current controller output for battery electric quantity detection, charging state double output, no battery and fault state display. Automatic recharging, soft start limits the inrush current and the supply current in standby mode is 70 mua. An 8-pin ESOP/EMSOP package is used. The entire circuit is powered by 1.8V, 3.3V and 3V 3 voltage regulation.

Fig. 18 is a 5V boost circuit schematic. The 5V booster circuit is a SY7088DGC chip. The input voltage of the SY7088DGC chip is 2.3-5.0V, the output current (maximum value) is 1MHz, the 3A peak current is limited, the input undervoltage locking is realized, the load is disconnected during the shutdown period, and the output overvoltage protection function is realized. At an output of 5.0V, the resistance was 70/85. OMEGA. DFN, 2 x 3-8 package. The 4.2V voltage of the battery is boosted to 5V voltage which can be used by the system, and the system adopts a battery power supply mode, so that the battery voltage is too low and has under-voltage condition in the continuous use process, so that the battery voltage needs to be boosted to 5V by adopting a boosting chip, and is stabilized to other needed voltages of the system.

Fig. 19 is a schematic diagram of a 1.8V voltage regulator circuit. The 1.8V voltage stabilizing circuit adopts RT9013-18GB. Low voltage difference of 2.2-5.5V working voltage: 250mV at 500mA, ultra-low noise for radio frequency applications, ultra-fast response in line/load transients, current limiting protection, thermal shutdown protection, high power supply rejection ratio, output only 1 μF capacitor required for stability, TTL logic control shutdown input, roHS compliance and 100% lead free. The heart rate acquisition circuit is used for supplying power to the reference electrode.

Fig. 20 is a schematic diagram of a 3.3V voltage regulator circuit. The 3.3V voltage stabilizing circuit is formed by fixing a positive electrode output by using a RT9013-33GB chip, outputting 3.3V voltage by using a RT9013-33GB chip, outputting 500mA current, outputting 1 voltage stabilizer number, outputting the highest voltage of 5.5V, packaging SC-74A, SOT-753 and SOT-23-5 at the working temperature of-40-85 ℃, and surface mounting. Two groups of 3.3V voltage stabilizing circuits are used for respectively and independently supplying power to the ADC analog-digital conversion circuit, the MCU and other 3.3V circuit parts, namely, the heart rate acquisition circuit analog-to-digital chip ADS1921/T and the pulse analog-to-digital chip ADS1115 are subjected to power isolation and are independently supplied with power, so that the interference of other parts of the circuit to the power supply and ground wire isolation parts of the ADC chip is reduced.

In a wearable remote pulse rate monitoring system, 5V voltage supply is required: an alarm circuit; the circuits that require 3.3V power supply are: heart rate acquisition circuit, pulse acquisition module, body temperature acquisition sensor circuit, filter and amplifier circuit, analog-to-digital conversion circuit, central processing unit circuit, clock circuit, wireless communication circuit, display circuit, serial Flash circuit, 1G Flash circuit, status light circuit, button control circuit.

Claims (11)

1. The wearable remote heart rate and pulse monitoring system is characterized by comprising a central processing unit, a signal acquisition module, a peripheral module, a storage module for storing heart rate and pulse data, a communication module and a power module for supplying power to the remote heart rate and pulse monitoring system, wherein the signal acquisition module, the peripheral module, the storage module and the communication module are connected with the central processing unit through an I/O interface; the signal acquisition module comprises a heart rate acquisition circuit for acquiring heart rate signals, a pulse acquisition module for acquiring pulse signals, a filtering and amplifying circuit and an analog-to-digital conversion circuit, wherein the filtering and amplifying circuit and the analog-to-digital conversion circuit are connected with the pulse acquisition module; the peripheral module comprises a clock circuit for providing clock signals and time information for the heart rate and pulse monitoring system, a display circuit for displaying heart rate and pulse monitoring results, and a key control circuit for sending control instructions to the remote heart rate and pulse monitoring system; the communication module comprises a wireless communication circuit and an upper computer and/or a client which communicate and interact with the wireless communication circuit.

2. The remote heart rate pulse monitoring system of claim 1, wherein the signal acquisition module further comprises a body temperature acquisition sensor circuit for detecting body temperature.

3. The remote heart rate pulse monitoring system of claim 1, wherein the peripheral module further comprises an alarm circuit that sounds and/or lights an alarm when the detected value of the remote heart rate pulse monitoring system is not within a set range.

4. The remote heart rate pulse monitoring system of claim 1, wherein the peripheral module further comprises a status light circuit that monitors an operational status of the remote heart rate pulse monitoring system.

5. The remote heart rate pulse monitoring system of claim 1, wherein the memory module comprises a FLASH memory circuit for FLASH memory storage of heart rate and pulse data monitored by the remote heart rate pulse monitoring system and a serial FLASH circuit for temporary storage of heart rate and pulse data monitored by the remote heart rate pulse monitoring system.

6. The remote heart rate pulse monitoring system of claim 1, wherein the power module comprises a battery charging circuit, an electrical quantity detection circuit, a 5V boost circuit, a 1.8V voltage stabilizing circuit, and a 3.3V voltage stabilizing circuit, wherein the battery charging circuit is connected with the electrical quantity detection circuit through a VBAT interface, and is connected with the 5V boost circuit through a VBAT interface.

7. The remote heart rate pulse monitoring system of claim 1, wherein the key control circuit comprises at least a heart rate monitor switch key, a pulse monitor switch key, and one or more custom function keys.

8. A remote heart rate pulse monitoring system as claimed in claim 1, wherein the light source emitting circuitry emits light sources having wavelengths in the range of 515nm to 600 nm.

9. The remote heart rate pulse monitoring system according to claim 1, wherein the wireless communication circuit comprises a transmitting part and a receiving part, the transmitting part transmits heart rate and pulse data in the central processing unit to the client and/or the upper computer, and the receiving part receives instructions of the client and/or the upper computer and transmits the instructions to the central processing unit.

10. The remote heart rate pulse monitoring system of claim 4, wherein the status light circuit is an LED light comprising a power status light and at least one other customizable status light.

11. The remote heart rate pulse monitoring system of claim 6, wherein the 3.3V voltage stabilizing circuit has two groups, one group of circuits independently supplies power to the heart rate acquisition circuit and the analog-to-digital conversion circuit, and the other group of circuits supplies power to other circuits with 3.3V operating voltage to isolate possible interference of other circuits with the heart rate acquisition circuit, the power supply and the ground of the analog-to-digital conversion circuit caused by other circuits with 3.3V operating voltage.