CN220235015U - Wave-suppressing dimming circuit - Google Patents
Wave-suppressing dimming circuit Download PDFInfo
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- CN220235015U CN220235015U CN202321495066.3U CN202321495066U CN220235015U CN 220235015 U CN220235015 U CN 220235015U CN 202321495066 U CN202321495066 U CN 202321495066U CN 220235015 U CN220235015 U CN 220235015U
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- 238000006243 chemical reaction Methods 0.000 claims abstract description 29
- 239000003990 capacitor Substances 0.000 claims description 94
- 238000001514 detection method Methods 0.000 claims description 31
- 230000001629 suppression Effects 0.000 claims description 17
- 238000002955 isolation Methods 0.000 claims description 15
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 230000003287 optical effect Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
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- 230000008569 process Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Abstract
The utility model relates to a wave-suppressing dimming circuit, which comprises: the operational amplifier integrated chip is connected with the current loop; the current loop reference source is connected with the operational amplifier integrated chip; the analog-to-digital conversion circuit is connected with the current loop reference source; the modulation circuit is connected with the analog-to-digital conversion circuit; wherein the current loop comprises at least: the current detecting resistor and the suppressing circuit are connected in parallel in the current loop.
Description
Technical Field
The utility model relates to the technical field of current detection circuits, in particular to a wave-suppression dimming circuit.
Background
Along with the rapid progress of the dimming power supply technology, most dimming power supplies are required to have higher dimming precision and smooth linearity. In the PWM/0-10V,10% -100% dimming signal injection, namely, pulse width modulation and 0-10V voltage signal are used, so that the dimming control technology of the brightness range from 10% to 100% is realized, the power supply is required to automatically follow the change of the signal proportion, and the power supply cannot be interfered by ripple voltage and ripple current. Once the device is interfered, stroboscopic phenomenon can occur, feedback is abnormal, the whole device is unstable, even the frying machine is used, and the like, so that the problem of detecting flow is needed to be solved. Therefore, it is necessary to provide a ripple-suppressing dimming circuit capable of effectively avoiding various signal interferences such as ripple voltage, noise, ripple current and the like outputted from the secondary side of the power supply, thereby improving the current detection precision and the loop feedback stability.
Disclosure of Invention
The utility model aims to provide a ripple-voltage-ripple-current-suppressing dimming circuit capable of effectively avoiding various signal interferences such as ripple voltage, noise, ripple current and the like output by a secondary power supply, so that the current detection precision and the loop feedback stability are improved.
According to an aspect of the present utility model, there is provided a wave-suppressing dimming circuit including:
the operational amplifier is integrated into a chip,
the current loop is connected with the operational amplifier integrated chip;
the current loop reference source is connected with the operational amplifier integrated chip;
the analog-to-digital conversion circuit is connected with the current loop reference source;
the modulation circuit is connected with the analog-to-digital conversion circuit;
wherein the current loop comprises at least: the current detecting resistor and the suppressing circuit are connected in parallel in the current loop.
More preferably, the wave-suppressing dimming circuit further comprises an optocoupler isolation feedback circuit, one end of the current loop is connected with a negative feedback pin of the operational amplifier integrated chip, and the other end of the current loop is connected with the optocoupler isolation feedback circuit.
More preferably, the current loop further comprises:
one end of the first capacitor is respectively connected with the optical coupling isolation feedback circuit and the output pin of the operational amplifier integrated chip, and the other end of the first capacitor is connected with the negative feedback pin of the operational amplifier integrated chip;
a second capacitor connected in parallel with the first capacitor, wherein one end of the second capacitor is respectively connected with the optocoupler isolation feedback circuit and the output pin of the operational amplifier integrated chip,
and the second resistor is connected in series with the second capacitor, one end of the second resistor is connected with the other end of the second capacitor, and the other end of the second resistor is respectively connected with the negative feedback pin, the current detection resistor and the suppression circuit of the operational amplifier integrated chip.
More preferably, the suppression circuit includes:
a first diode having an anode grounded,
and the second diode is connected with the first diode in parallel and opposite in polarity, the cathode of the second diode is connected with a power supply, and the anode of the second diode is respectively connected with the cathode of the first diode and the negative feedback pin of the operational amplifier integrated chip.
More preferably, one end of the current detection resistor is connected with a negative feedback pin of the operational amplifier integrated chip, and the other end of the current detection resistor is grounded.
More preferably, the current loop reference source comprises:
a seventh one of the capacitors is provided with a capacitor,
a ninth resistor connected in parallel with the seventh capacitor,
the sixth resistor is respectively connected with the seventh capacitor and the ninth resistor in series, and one end of the sixth resistor, which is respectively connected with the seventh capacitor and the ninth resistor, is connected with a positive feedback pin of the operational amplifier integrated chip;
one end of the seventh capacitor connected with the sixth resistor is connected with a positive feedback pin of the operational amplifier integrated chip, and the other end of the seventh capacitor is grounded;
and one end of the ninth resistor connected with the sixth resistor is connected with a positive feedback pin of the operational amplifier integrated chip, and the other end of the ninth resistor is grounded.
More preferably, the current loop reference source further comprises:
a third capacitor connected in series with the sixth resistor;
the fourth resistor is connected with the third capacitor in series, one end of the fourth resistor is connected with the third capacitor, and the other end of the fourth resistor is connected with the analog-to-digital conversion circuit;
a seventh resistor connected in series with the sixth resistor and connected in parallel with the third capacitor and the fourth resistor respectively, wherein one end of the seventh resistor is connected with the sixth resistor, and the other end of the seventh resistor is connected with the analog-to-digital conversion circuit;
and one end of the variable resistor is connected with the sixth resistor, and the other end of the variable resistor is connected with the analog-to-digital conversion circuit.
More preferably, the current loop reference source further comprises:
and one end of the fourth capacitor is respectively connected with the third capacitor, the fourth resistor, the seventh resistor, the variable resistor and the analog-to-digital conversion circuit, and the other end of the fourth capacitor is grounded.
More preferably, the analog-to-digital conversion circuit includes: a first triode, an eighth capacitor, a tenth resistor, an eleventh resistor, a second triode, a fifth resistor, an eighth resistor, a twelfth resistor, a thirteenth resistor, a third diode and a fourth diode; wherein,
the base electrode of the first triode is connected with the current loop reference source, the emitter electrode of the first triode is connected with the base electrode to form common emitter connection, the collector electrode of the first triode is respectively connected with the eighth capacitor and the tenth resistor,
one end of the eighth capacitor is connected with the collector electrode of the first triode and one end of the tenth resistor respectively, and the other end of the eighth capacitor is grounded;
the other end of the tenth resistor is connected with the collector electrode of the second triode and one end of the eleventh resistor respectively;
one end of the eleventh resistor is connected with one end of the twelfth resistor, one end of the thirteenth resistor, the nonpolar pin of the third diode and the negative electrode of the third triode respectively;
the emitter of the second triode is grounded, and the base is respectively connected with one end of the fifth resistor and one end of the eighth resistor;
the positive electrode of the third diode is grounded;
the other end of the eighth resistor is connected with the modulating circuit and the other end of the twelfth resistor respectively, and the other end of the fifth resistor is grounded;
the other end of the thirteenth resistor is connected with the cathode of the fourth diode, and the cathode of the fourth diode is connected with a power supply.
More preferably, the modulation circuit is a PWM/0-10V dimming driving circuit.
The utility model has the following beneficial effects:
by introducing the current detection resistor into the current loop to detect the current signal, the current signal passing through the current detection resistor is recorded as the current detection signal, and the current detection signal is injected onto the negative feedback pin of the operational amplifier integrated chip, so that the interference in the current signal can be suppressed. Meanwhile, a suppression circuit is introduced into the current loop and used for suppressing the interference of ripple voltage, ripple current and noise so as to protect the stability and dimming precision of the whole wave-suppressing dimming circuit.
Drawings
In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the utility model, and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
Fig. 1 is a circuit diagram of a wave-suppressing dimming circuit according to an embodiment of the utility model;
FIG. 2 is a circuit diagram of an optocoupler isolation feedback circuit according to an embodiment of the utility model;
FIG. 3 is a circuit diagram of an analog-to-digital conversion circuit according to an embodiment of the utility model;
FIG. 4 is a circuit diagram of a modulation circuit according to an embodiment of the present utility model;
reference numerals illustrate: 100. a wave-suppressing dimming circuit; 10. an operational amplifier integrated chip; 20. a current loop; 30. a current loop reference source; 40. an analog-to-digital conversion circuit; 50. a modulation circuit; 60. an optocoupler isolation feedback circuit; 21. a current detecting resistor; 22. a suppression circuit; c1, a first capacitor; c2, a second capacitor; r2, a second resistor; c7, a seventh capacitor; r9, ninth resistor; r6, a sixth resistor; c3, a third capacitor; r4, a fourth resistor; r7, a seventh resistor; VR1, variable resistance; c4, a fourth capacitor; U1A, a first triode; c8, an eighth capacitor; r10, tenth resistor; r11, eleventh resistor; q2, a second triode; r5, a fifth resistor; r8, eighth resistor; r12, twelfth resistor; r13, thirteenth resistance; r32, third diode; r42, fourth diode;
Detailed Description
In order that the utility model may be readily understood, a more complete description of the utility model will be rendered by reference to the appended drawings. The drawings illustrate preferred embodiments of the utility model. This utility model may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. The terminology used herein in the description of the utility model is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1 to 4, an embodiment of the present utility model provides a wave-suppressing dimming circuit 100, where the wave-suppressing dimming circuit 100 includes: the operational amplifier integrated chip 10, the current loop 20, the current loop reference source 30, the analog-to-digital conversion circuit 40, the modulation circuit 50 and the optocoupler isolation feedback circuit 60.
The current loop 20 is connected to the op-amp integrated chip 10, the current loop reference source 30 is connected to the op-amp integrated chip 10, the analog-to-digital conversion circuit 40 is connected to the current loop reference source 30, and the modulation circuit 50 is connected to the analog-to-digital conversion circuit 40.
The current loop 20 is an important part for detecting a current signal and performing feedback control, and is connected with the operational amplifier integrated chip 10 to realize accurate control and adjustment of current. The current loop reference source 30 is a signal source for providing reference current for the current loop, and is connected with the operational amplifier integrated chip 10 to realize comparison and feedback control of a reference source signal and a current detection signal. The analog-to-digital conversion circuit 40 is used to convert the dimming signal to an analog voltage signal suitable for current control and is connected to the current loop reference source 30 to provide a reference source signal for comparison with the current sense signal. The modulation circuit 50 is responsible for receiving the analog voltage signal and generating a PWM (pulse width modulation) or 0-10V dimming signal for controlling the brightness of the light source or device. The current detection resistor 21 is used for detecting a current signal and injecting the current detection signal onto a negative feedback pin of the operational amplifier integrated chip 10 so as to realize accurate control of the current signal and interference suppression. The suppression circuit 22 is used for suppressing the interference of ripple voltage, ripple current and noise, and protecting the stability and dimming accuracy of the whole ripple-suppression dimming circuit 100.
Further, the current loop 20 includes at least: the current loop 20 is connected in parallel with the current detection resistor 21 and the suppression circuit 22, the current loop 20 is connected with the current detection resistor 21 to detect a current signal, the current signal passing through the current detection resistor 21 is recorded as a current detection signal, and the current detection signal is injected to a negative feedback pin of the operational amplifier integrated chip 10, so that interference in the current signal can be suppressed. Meanwhile, a suppression circuit 22 is introduced in the current loop 20 for suppressing the interference of ripple voltage, ripple current and noise to protect the stability and dimming accuracy of the entire ripple-suppression dimming circuit 100.
Referring to fig. 4, the modulation circuit 50 is a PWM/0-10V dimming driving circuit. When the power supply is started, the power supply works normally and provides the maximum power output capability, in this case, a PWM/0-10V dimming driving circuit is used for outputting a dimming signal to control the brightness of the light source or the equipment, the dimming signal ranges from 10% to 100%, and the brightness degree can be adjusted according to the requirement. Referring to fig. 3, in order to convert the dimming signal into an analog voltage signal suitable for current control, the dimming signal of 0-10V is converted into an analog voltage signal of 0-2.5V through the analog-to-digital conversion circuit 40. Referring to fig. 1, the analog voltage signal is introduced into the current loop reference source 30 as a reference source signal, which is injected onto the positive feedback pin of the op-amp integrated chip 10, and the current sensing signal is injected onto the negative feedback pin of the op-amp. This forms a negative feedback power loop for comparing the magnitude of the current sense signal with the reference source signal. In the whole current loop working process, if the current detection signal is larger than the reference source signal, the actual current exceeds the set target value, and the operational amplifier integrated chip 10 can generate negative feedback at the moment, and the current is reduced by controlling the output. Conversely, if the current detection signal is smaller than the reference source signal, the op-amp integrated chip 10 will generate positive feedback to increase the output current. By introducing the current detection resistor 21 and the suppression circuit 22 in the current loop, the influence of ripple voltage, ripple current and noise on negative feedback and positive feedback can be reduced, thereby improving dimming accuracy and ensuring stability of the power supply.
One end of the current loop 20 is connected to the negative feedback pin of the op-amp integrated chip 10, and the other end is connected to the optocoupler isolation feedback circuit 60. The optocoupler isolation feedback circuit 60 is used to isolate and protect the current loop 20, ensure stable transmission of signals and prevent interference.
Further, the current loop 20 further includes: a first capacitor C1, a second capacitor C2, and a second resistor R2.
One end of the first capacitor C1 is connected to the optocoupler isolation feedback circuit 60 and the output pin of the op-amp integrated chip 10, and the other end is connected to the negative feedback pin of the op-amp integrated chip 10. The first capacitor C1 provides a feedback path to introduce the output signal into the current loop 20. Secondly, the first capacitor C1 is connected with the negative feedback pin of the op-amp integrated chip 10 to participate in forming a negative feedback loop, so as to help stabilize the operation of the current loop 20.
The second capacitor C2 is connected in parallel with the first capacitor C1, and one end of the second capacitor C2 is connected to the optocoupler isolation feedback circuit 60 and the output pin of the op-amp integrated chip 10 respectively. The parallel connection of the second capacitor C2 and the first capacitor C1 helps to further filter and stabilize the current loop 20. The second capacitor C2 and the first capacitor C1 together form a capacitor network, which together filter the signal and remove high frequency noise.
The second resistor R2 is connected in series with the second capacitor C2, and one end of the second resistor R2 is connected with the other end of the second capacitor C2, and the other end of the second resistor R2 is connected with the negative feedback pin of the op-amp integrated chip 10, the current detection resistor 21, and the suppression circuit 22. The second resistor R2 is connected in series with the second capacitor C2 to form an RC filter network for further filtering high frequency noise and ripple, and ensuring stability of the current loop 20. In addition, the second resistor R2 is further connected to the negative feedback pin of the op-amp integrated chip 10, the current detection resistor 21 and the suppression circuit 22, and participates in the process of negative feedback control and interference suppression.
Further, the suppression circuit 22 includes: a first diode and a second diode.
The positive electrode of the first diode is grounded, the positive electrode of the first diode is connected to the ground or zero potential of the circuit to play a role of a reference potential, signals in the circuit can be ensured to operate in a correct potential range, and a reference standard is provided.
The second diode is connected in parallel with the first diode so that the second diode and the first diode share the same voltage signal, and the polarities of the second diode and the first diode are opposite, namely, one is positive electrode upwards, the other is negative electrode upwards, and the parallel connection is used for providing reverse protection. When a reverse voltage exists in the circuit, the second diode is conducted, and the reverse voltage is led to the power supply to protect other elements from damage.
The negative electrode of the second diode is connected with a power supply, and the positive electrode of the second diode is respectively connected with the negative electrode of the first diode and the negative feedback pin of the operational amplifier integrated chip 10. The cathode of the second diode is connected to the power supply, where the second diode acts as a guide for the supply voltage to the other parts.
The positive pole of the second diode is respectively connected with the negative pole of the first diode and the negative feedback pin of the operational amplifier integrated chip 10. This connection introduces the signal in the current loop 20 into the negative feedback loop of the op-amp integrated chip 10, thereby participating in negative feedback control, helping to stabilize the operation of the current loop 20 and the amplifying circuit.
Further, one end of the current detection resistor 21 is connected to the negative feedback pin of the op-amp integrated chip 10, and the other end is grounded. The current sensing resistor 21 is connected to the negative feedback pin of the op-amp integrated chip 10 to make it part of the feedback loop. The operation of the circuit is regulated and stabilized by returning a portion of the output signal to the input. By sensing the current and transmitting it as a feedback signal to the op-amp integrated chip 10, precise control and regulation of the current loop 20 can be achieved. The op-amp integrated chip 10 can adjust its gain or output according to the measured current value to meet the required current requirement.
Further, the current loop reference source 30 includes: seventh capacitor C7, ninth resistor R9, sixth resistor R6, third capacitor C3, fourth resistor R4, seventh resistor R7, variable resistor VR1, and fourth capacitor C4.
The ninth resistor R9 is connected in parallel with the seventh capacitor C7, the sixth resistor R6 is connected in series with the seventh capacitor C7 and the ninth resistor R9, and one end of the sixth resistor R6 connected with the seventh capacitor C7 and the ninth resistor R9 is connected with a positive feedback pin of the op-amp integrated chip 10. One end of the seventh capacitor C7 connected with the sixth resistor R6 is connected with the positive feedback pin of the op-amp integrated chip 10, and the other end of the seventh capacitor C7 connected with the sixth resistor R6 is grounded. One end of the ninth resistor R9 connected with the sixth resistor R6 is connected with a positive feedback pin of the op-amp integrated chip 10, and the other end of the ninth resistor R9 connected with the sixth resistor R6 is grounded. The third capacitor C3 is connected in series with said sixth resistor R6. The fourth resistor R4 is connected in series with the third capacitor C3, one end of the fourth resistor R4 is connected to the third capacitor C3, and the other end of the fourth resistor R4 is connected to the analog-to-electric conversion circuit 40. A seventh resistor R7 is connected in series with the sixth resistor R6, and the seventh resistor R7 is connected in parallel with the third capacitor C3 and the fourth resistor R4, respectively. One end of the seventh resistor R7 is connected to the sixth resistor R6, and the other end of the seventh resistor R7 is connected to the analog-to-electric conversion circuit 40. The variable resistor VR1 is connected in series with the sixth resistor R6, and the variable resistor VR1 is connected in parallel with the third capacitor C3, the fourth resistor R4, and the seventh resistor R7, respectively. One end of the variable resistor VR1 is connected to the sixth resistor R6, and the other end of the variable resistor VR1 is connected to the analog-to-digital conversion circuit 40. The fourth capacitor C4 is connected in series with the third capacitor C3, the fourth resistor R4, the seventh resistor R7, the variable resistor VR1, and the analog-to-digital conversion circuit, respectively. One end of the fourth capacitor C4 is connected to the third capacitor C3, the fourth resistor R4, the seventh resistor R7, the variable resistor VR1, and the analog-to-digital conversion circuit, and the other end of the fourth capacitor C4 is grounded.
More preferably, the analog-to-digital conversion circuit 40 includes: the first triode U1A, the eighth capacitor C8, the tenth resistor R10, the eleventh resistor R11, the second triode Q2, the fifth resistor R5, the eighth resistor R8, the twelfth resistor R12, the thirteenth resistor R13, the third diode R32 and the fourth diode R42.
The base electrode of the first triode U1A is connected with the current loop reference source 30, the emitter electrode of the first triode U1A is connected with the base electrode to form a common emitter connection, and the collector electrode of the first triode U1A is respectively connected with the eighth capacitor C8 and the tenth resistor R10. One end of the eighth capacitor C8 is connected to the collector of the first triode U1A and one end of the tenth resistor R10, respectively, and the other end of the eighth capacitor C8 is grounded. The other end of the tenth resistor R10 is connected to the collector of the second triode Q2 and one end of the eleventh resistor R11, respectively. One end of the eleventh resistor R11 is connected to one end of the twelfth resistor R12, one end of the thirteenth resistor R13, the nonpolar pin of the third diode R32, and the negative electrode of the third triode, respectively. The emitter of the second triode Q2 is grounded, and the base is respectively connected with one end of the fifth resistor R5 and one end of the eighth resistor R8. The positive electrode of the third diode R32 is grounded. The other end of the eighth resistor R8 is connected to the other ends of the modulation circuit 50 and the twelfth resistor R12, and the other end of the fifth resistor R5 is grounded. The other end of the thirteenth resistor R13 is connected to the cathode of the fourth diode R42, and the cathode of the fourth diode R42 is connected to a power supply.
By this, by introducing the current detection resistor 21 into the current loop 20 to detect the current signal, the current signal passing through the current detection resistor 21 is recorded as the current detection signal, and the current detection signal is injected to the negative feedback pin of the op-amp integrated chip 10, so that the disturbance in the current signal can be suppressed. Meanwhile, a suppression circuit 22 is introduced in the current loop 20 for suppressing the interference of ripple voltage, ripple current and noise to protect the stability and dimming accuracy of the entire ripple-suppression dimming circuit 100.
The above embodiments represent only a few embodiments of the present utility model, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit of the utility model, which are within the scope of the utility model. Accordingly, the scope of protection of the present utility model is to be determined by the appended claims.
Claims (10)
1. A wave-suppressing dimming circuit, the wave-suppressing dimming circuit comprising:
the operational amplifier is integrated into a chip,
the current loop is connected with the operational amplifier integrated chip;
the current loop reference source is connected with the operational amplifier integrated chip;
the analog-to-digital conversion circuit is connected with the current loop reference source;
the modulation circuit is connected with the analog-to-digital conversion circuit;
wherein the current loop comprises at least: the current detecting resistor and the suppressing circuit are connected in parallel in the current loop.
2. The wave-suppressing dimming circuit as recited in claim 1, further comprising an optocoupler isolation feedback circuit, wherein one end of the current loop is connected to the negative feedback pin of the op-amp integrated chip, and the other end is connected to the optocoupler isolation feedback circuit.
3. The wave-suppressing dimmer circuit as defined in claim 2, wherein the current loop further comprises:
one end of the first capacitor is respectively connected with the optical coupling isolation feedback circuit and the output pin of the operational amplifier integrated chip, and the other end of the first capacitor is connected with the negative feedback pin of the operational amplifier integrated chip;
a second capacitor connected in parallel with the first capacitor, wherein one end of the second capacitor is respectively connected with the optocoupler isolation feedback circuit and the output pin of the operational amplifier integrated chip,
and the second resistor is connected in series with the second capacitor, one end of the second resistor is connected with the other end of the second capacitor, and the other end of the second resistor is respectively connected with the negative feedback pin, the current detection resistor and the suppression circuit of the operational amplifier integrated chip.
4. A wave-suppressing dimming circuit as claimed in claim 3, wherein the suppression circuit comprises:
a first diode having an anode grounded,
and the second diode is connected with the first diode in parallel and opposite in polarity, the cathode of the second diode is connected with a power supply, and the anode of the second diode is respectively connected with the cathode of the first diode and the negative feedback pin of the operational amplifier integrated chip.
5. The wave suppression dimming circuit according to claim 3, wherein one end of the current detection resistor is connected with a negative feedback pin of the operational amplifier integrated chip, and the other end of the current detection resistor is grounded.
6. A ripple-reduction dimming circuit according to claim 3, wherein the current loop reference source comprises:
a seventh one of the capacitors is provided with a capacitor,
a ninth resistor connected in parallel with the seventh capacitor,
the sixth resistor is respectively connected with the seventh capacitor and the ninth resistor in series, and one end of the sixth resistor, which is respectively connected with the seventh capacitor and the ninth resistor, is connected with a positive feedback pin of the operational amplifier integrated chip;
one end of the seventh capacitor connected with the sixth resistor is connected with a positive feedback pin of the operational amplifier integrated chip, and the other end of the seventh capacitor is grounded;
and one end of the ninth resistor connected with the sixth resistor is connected with a positive feedback pin of the operational amplifier integrated chip, and the other end of the ninth resistor is grounded.
7. The wave-suppressing dimmer circuit as recited in claim 6, wherein said current loop reference source further comprises:
a third capacitor connected in series with the sixth resistor;
the fourth resistor is connected with the third capacitor in series, one end of the fourth resistor is connected with the third capacitor, and the other end of the fourth resistor is connected with the analog-to-digital conversion circuit;
a seventh resistor connected in series with the sixth resistor and connected in parallel with the third capacitor and the fourth resistor respectively, wherein one end of the seventh resistor is connected with the sixth resistor, and the other end of the seventh resistor is connected with the analog-to-digital conversion circuit;
and one end of the variable resistor is connected with the sixth resistor, and the other end of the variable resistor is connected with the analog-to-digital conversion circuit.
8. The wave-suppressing dimmer circuit as recited in claim 7, wherein said current loop reference source further comprises:
and one end of the fourth capacitor is respectively connected with the third capacitor, the fourth resistor, the seventh resistor, the variable resistor and the analog-to-digital conversion circuit, and the other end of the fourth capacitor is grounded.
9. A wave-suppressing dimming circuit as claimed in claim 3, wherein the analogue-to-digital conversion circuit comprises: a first triode, an eighth capacitor, a tenth resistor, an eleventh resistor, a second triode, a fifth resistor, an eighth resistor, a twelfth resistor, a thirteenth resistor, a third diode and a fourth diode; wherein,
the base electrode of the first triode is connected with the current loop reference source, the emitter electrode of the first triode is connected with the base electrode to form common emitter connection, the collector electrode of the first triode is respectively connected with the eighth capacitor and the tenth resistor,
one end of the eighth capacitor is connected with the collector electrode of the first triode and one end of the tenth resistor respectively, and the other end of the eighth capacitor is grounded;
the other end of the tenth resistor is connected with the collector electrode of the second triode and one end of the eleventh resistor respectively;
one end of the eleventh resistor is connected with one end of the twelfth resistor, one end of the thirteenth resistor, the nonpolar pin of the third diode and the cathode of the third diode respectively;
the emitter of the second triode is grounded, and the base is respectively connected with one end of the fifth resistor and one end of the eighth resistor;
the positive electrode of the third diode is grounded;
the other end of the eighth resistor is connected with the modulating circuit and the other end of the twelfth resistor respectively, and the other end of the fifth resistor is grounded;
the other end of the thirteenth resistor is connected with the cathode of the fourth diode, and the cathode of the fourth diode is connected with a power supply.
10. The wave-suppressing dimmer circuit as claimed in claim 1, wherein the modulation circuit is a PWM/0-10V dimming driver circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321495066.3U CN220235015U (en) | 2023-06-12 | 2023-06-12 | Wave-suppressing dimming circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321495066.3U CN220235015U (en) | 2023-06-12 | 2023-06-12 | Wave-suppressing dimming circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220235015U true CN220235015U (en) | 2023-12-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321495066.3U Active CN220235015U (en) | 2023-06-12 | 2023-06-12 | Wave-suppressing dimming circuit |
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| Country | Link |
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| CN (1) | CN220235015U (en) |
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2023
- 2023-06-12 CN CN202321495066.3U patent/CN220235015U/en active Active
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