CN220234638U - 8-12GHz low-noise amplifier - Google Patents
8-12GHz low-noise amplifier Download PDFInfo
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- CN220234638U CN220234638U CN202321775922.0U CN202321775922U CN220234638U CN 220234638 U CN220234638 U CN 220234638U CN 202321775922 U CN202321775922 U CN 202321775922U CN 220234638 U CN220234638 U CN 220234638U
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Abstract
The utility model discloses an 8-12GHz low-noise amplifier, which comprises an input matching network, a first-stage amplifier, an interstage matching network, a second-stage amplifier, an output matching circuit and a direct current feed network, wherein the input end of the input matching network is a radio frequency input port of the whole low-noise amplifier, the output port of the input matching network is connected with the input end of the first-stage amplifier, the output end of the first-stage amplifier is connected with the input end of the second-stage amplifier through the interstage matching network, the output end of the second-stage amplifier is connected with the output matching circuit, the output end of the output matching network is a radio frequency output port of the whole low-noise amplifier, and the input port of the direct current feed network is a direct current input port of the whole low-noise amplifier. The low-noise amplifier adopts a two-stage self-bias current multiplexing circuit topological structure, simplifies the circuit structure, effectively reduces the total current and reduces the power consumption while realizing low noise coefficient.
Description
Technical Field
The utility model relates to the technical field of low-noise amplifiers, in particular to an 8-12GHz low-noise amplifier.
Background
At present, a low-noise amplifier is generally composed of a multi-stage triode, and each stage is independently powered, so that a feed network inside a chip is complex, and the total current is high; if a depletion mode design is used, negative bias voltages need to be provided, complicating the chip peripheral feed circuitry.
Disclosure of Invention
The utility model aims to provide an 8-12GHz low-noise amplifier to solve the problems in the background technology.
In order to achieve the above purpose, the utility model provides an 8-12GHz low noise amplifier, which comprises an input matching network, a first-stage amplifier, an interstage matching network, a second-stage amplifier, an output matching circuit and a direct current feed network; the input port of the input matching network is a signal input end of the low-noise amplifier, and the output port of the input matching network is connected with the input end of the first-stage amplifier; the first-stage amplifier comprises a first-stage triode, a resistance-capacitance network, a first series network and a second series network, wherein the resistance-capacitance network is connected with a source electrode of the first-stage triode and grounded, the first series network is connected with a grid electrode of the first-stage triode and grounded, the second series network is connected with a drain electrode of the first-stage triode and grounded, and meanwhile, the drain electrode of the first-stage triode is connected with an input end of the inter-stage matching network; the interstage matching network comprises a fourth capacitor and a fourth inductor, the fourth capacitor is connected with the drain electrode of the first-stage triode and grounded, the first end of the fourth inductor is connected with the drain electrode of the first-stage triode, and the second end of the fourth inductor is connected with the input end of the second-stage amplifier; the second-stage amplifier comprises a second-stage triode, a fifth inductor, a fourth resistor, a fifth capacitor, a sixth capacitor and a negative feedback circuit, wherein the first end of the fifth capacitor is connected with the second end of the fourth inductor, the second end of the fifth capacitor is connected with the grid electrode of the second-stage triode, the first end of the fifth inductor is connected with the second end of the fourth inductor, the second end of the fifth inductor is connected with the first end of the fourth resistor, the fifth inductor and the fourth resistor form a first-stage current multiplexing circuit with the fourth inductor, the sixth capacitor is connected with the second end of the fourth resistor and the source electrode of the second-stage triode at the same time and grounded, the negative feedback circuit is connected with the grid electrode and the drain electrode of the second-stage triode in parallel in a bridging manner after crossing the direct current network, and the drain electrode of the second-stage triode is connected with the input end of the output matching circuit.
Further, the dc feed network includes a first choke inductor, a stability resistor, a tenth capacitor, a sixth resistor, a seventh resistor, a second choke inductor and a current limiting resistor, where a first end of the first choke inductor is connected to the gate of the second stage triode, a second end of the first choke inductor is connected to the first end of the stability resistor, a second end of the stability resistor is simultaneously connected to the tenth capacitor, the sixth resistor and the first end of the seventh resistor, a second end of the tenth capacitor is connected to the second end of the sixth resistor and connected to the ground, a second end of the seventh resistor is connected to the first end of the current limiting resistor and the power supply, a second end of the current limiting resistor is connected to the first end of the second stage triode, and a second end of the second choke inductor is connected to the drain of the second stage triode.
Further, the input matching network comprises a first capacitor and a first inductor, a first end of the first capacitor is connected with the radio frequency signal input port, a second end of the first capacitor is connected with a first end of the first inductor and a grid electrode of the first stage triode at the same time, and a second end of the first inductor is grounded.
Further, the first series network comprises a second inductor and a second resistor, wherein a first end of the second inductor is connected with a first end of the second resistor, a second end of the second inductor is connected with a grid electrode of the first-stage triode, and a second end of the second resistor is grounded;
the second series network comprises a third inductor, a third resistor and a third capacitor, wherein the first end of the third inductor is connected with the first end of the third resistor, and the second end of the third inductor is connected with the drain electrode of the first-stage triode; the second end of the third resistor is connected with the first end of the capacitor, and the second end of the capacitor is grounded.
Further, the resistance-capacitance network comprises a second capacitor and a first resistor, wherein the first ends of the second capacitor and the first resistor are connected with the source electrode of the first-stage triode, and the second ends of the second capacitor and the second end of the first resistor are grounded.
Further, the output matching circuit comprises an eighth capacitor, a seventh inductor and a ninth capacitor, wherein a first end of the eighth capacitor is connected with the drain electrode of the second-stage triode, a second end of the eighth capacitor is simultaneously connected with the seventh inductor and a first end of the ninth capacitor, a second end of the seventh inductor is grounded, and a second end of the ninth capacitor is a radio-frequency signal output port.
Further, the negative feedback circuit comprises a seventh capacitor, a fifth resistor and a sixth inductor, wherein a first end of the seventh capacitor is connected with the grid electrode of the second-stage triode, a second end of the seventh capacitor is connected with a first end of the fifth resistor, a second end of the fifth resistor is connected with a first end of the sixth inductor, and a second end of the sixth inductor is connected with the drain electrode of the second-stage triode.
Compared with the prior art, the utility model has the following beneficial effects:
the utility model relates to an 8-12GHz low-noise amplifier, which comprises an input matching network, a first-stage amplifier, an interstage matching network, a second-stage amplifier, an output matching circuit and a direct current feed network, wherein the whole low-noise amplifier is provided with three external interfaces, the input end of the input matching network is a radio frequency input port of the whole low-noise amplifier, the output end of the output matching network is a radio frequency output port of the whole low-noise amplifier, and the input port of the direct current feed network is a direct current input port of the whole low-noise amplifier. The source electrode of the first-stage triode is connected to the ground in parallel through a capacitor and a resistor; the drain electrode of the first-stage triode is connected to the source electrode of the second-stage triode through a matching circuit and a choke inductor; the source electrode of the second-stage triode is connected with a decoupling capacitor; the drain electrode of the second stage triode is connected with bias voltage through choke inductance and resistance. The low-noise amplifier adopts a depletion technology design, adopts a two-stage self-bias current multiplexing circuit topological structure, has a simple circuit structure, does not need negative pressure bias, effectively reduces total current while ensuring low noise coefficient, and reduces power consumption.
In addition to the objects, features and advantages described above, the present utility model has other objects, features and advantages. The present utility model will be described in further detail with reference to the drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the utility model. In the drawings:
fig. 1 is a block diagram of a circuit configuration of a low noise amplifier of the present utility model;
fig. 2 is a schematic diagram of the structure of a preferred embodiment of the low noise amplifier of the present utility model;
FIG. 3 is a return loss test curve of the low noise amplifier of the present utility model;
FIG. 4 is a gain test curve of the low noise amplifier of the present utility model;
fig. 5 is a noise figure test curve of the low noise amplifier of the present utility model.
Detailed Description
Embodiments of the utility model are described in detail below with reference to the attached drawings, but the utility model can be implemented in a number of different ways, which are defined and covered by the claims.
Referring to fig. 1 and 2, an 8-12GHz low noise amplifier of the present embodiment includes an input matching network 1, a first stage amplifier 2, an inter-stage matching network 3, a second stage amplifier 4, an output matching circuit 5, and a dc feed network 6; the specific structure is as follows:
the input port of the input matching network 1 is the signal input end of the low noise amplifier, and the output port of the input matching network 1 is connected with the input end of the first-stage amplifier 2. The effect is mainly to convert 50 ohms to the source impedance required for the first stage amplifier to achieve the minimum noise figure. The input matching network 1 comprises a first capacitor 101 and a first inductor 102, the values of which are 2.6pF and 1nH, respectively. The first end of the first capacitor is connected with the radio frequency signal input port, the second end of the first capacitor 101 is connected with the first end of the first inductor 102 and the grid electrode of the first stage triode 201 at the same time, and the second end of the first inductor 102 is grounded.
The first stage amplifier 2 comprises a first stage triode 201, a resistor-capacitor network, a first series network and a second series network, wherein the first stage triode 201 is 0.25um D-pHEMT, the size of the first stage triode is 8 multiplied by 45um, and under the size, the first stage triode can obtain the minimum noise figure in the band. The source electrode of the first-stage triode 201 is connected to the ground through a resistor-capacitor network, the grid electrode of the first-stage triode 201 is connected to the ground through a first series network, the drain electrode of the first-stage triode 201 is connected to the ground through a second series network, and meanwhile the drain electrode of the first-stage triode 201 is connected with the input end of the inter-stage matching network 3. The rc network includes a second capacitor 203 and a first resistor 202, where a first end of the second capacitor 203 and a first end of the first resistor 202 are both connected to a source of the first stage triode 201, and a second end of the second capacitor 203 is grounded to a second end of the first resistor 202. The first series network comprises a second inductor 204 and a second resistor 205, wherein a first end of the second inductor 204 is connected with a first end of the second resistor 205, a second end of the second inductor 204 is connected with a grid electrode of the first-stage triode 201, and a second end of the second resistor 205 is grounded; the second series network comprises a third inductor 206, a third resistor 207 and a third capacitor 208, wherein a first end of the third inductor 206 is connected with a first end of the third resistor 207, and a second end of the third inductor 206 is connected with a drain electrode of the first-stage triode 201; a second terminal of the third resistor 207 is connected to a first terminal of the capacitor 208, and a second terminal of the capacitor 208 is grounded. In this configuration, the first resistor 202 provides a self-bias for the first stage transistor, so that the gate of the first stage transistor does not need to be connected to a negative voltage; at the same time, the radio frequency signal is grounded through the second capacitor 203, so that the noise figure is not deteriorated by the first resistor 202, and the values of the first resistor 202 and the second capacitor 203 are 11pF and 8Ω, respectively. The second inductor 204, the second resistor 205, the third inductor 206, the third resistor 207 and the third capacitor 208 keep the first stage amplifier absolutely stable in-band and have a certain gain.
The inter-stage matching network 3 comprises a fourth capacitor 301 and a fourth inductor 302, the fourth capacitor 301 is connected with the drain electrode of the first-stage triode 201 and grounded, a first end of the fourth inductor 302 is connected with the drain electrode of the first-stage triode 201, and a second end of the fourth inductor 302 is connected with the input end of the second-stage amplifier 4. The interstage matching network 3 transforms the output impedance of the first-stage amplifier 2 to the source impedance of the second-stage amplifier 4 through the fourth capacitor 301 and the fourth inductor 302 to obtain a source impedance with a lower noise coefficient, meanwhile, the fourth inductor 302 is a component part of the first-stage current multiplexing circuit, and the interstage matching network 3 plays a role in partially adjusting the gain flatness of the whole low-noise amplifier.
The second stage amplifier 4 serves to improve the gain and flatness of the overall amplifier while maintaining a low noise figure. The second stage amplifier 4 includes a second stage triode 401, a fifth inductor 402, a fourth resistor 403, a fifth capacitor 404, a sixth capacitor 405, and a negative feedback circuit, where the size of the second stage triode 401 is 4×75um; a first end of the fifth capacitor 404 is connected to the second end of the fourth inductor 302, a second end of the fifth capacitor 404 is connected to the gate of the second stage triode 401, a first end of the fifth inductor 402 is connected to the second end of the fourth inductor 302, a second end of the fifth inductor 402 is connected to the first end of the fourth resistor 403, the fifth inductor 402, the fourth resistor 403 and the fourth inductor 302 form a first stage current multiplexing circuit, and the sixth capacitor 405 is connected to the second end of the fourth resistor 403 and the source of the second stage triode 401 at the same time and grounded. The negative feedback circuit and the direct current feed network 6 are connected in parallel and then connected with the grid electrode and the drain electrode of the second-stage triode 401 in a bridging mode, and the drain electrode of the second-stage triode 401 is connected with the input end of the output matching circuit 5. The negative feedback circuit comprises a seventh capacitor 406, a fifth resistor 407 and a sixth inductor 408, wherein a first end of the seventh capacitor 406 is connected with the gate of the second-stage triode 401, a second end of the seventh capacitor 406 is connected with a first end of the fifth resistor 407, a second end of the fifth resistor 407 is connected with a first end of the sixth inductor 408, and a second end of the sixth inductor 408 is connected with the drain of the second-stage triode 401. The parallel negative feedback is formed by the seventh capacitor 406, the fifth resistor 407 and the sixth inductor 408, so that the gain flatness of the whole low noise amplifier is remarkably improved. The primary function of the fifth capacitor 404 is to isolate the dc-ac signal.
The output matching circuit 5 includes an eighth capacitor 501, a seventh inductor 502 and a ninth capacitor 503, where a first end of the eighth capacitor 501 is connected to the drain of the second stage triode 401, a second end of the eighth capacitor 501 is simultaneously connected to the seventh inductor 502 and a first end of the ninth capacitor 503, a second end of the seventh inductor 502 is grounded, and a second end of the ninth capacitor 503 is a radio frequency signal output port. The output matching circuit 5 achieves conjugate matching between the output impedance of the second-stage amplifier 4 and the load 50Ω so that the output power is maximized and the return loss is minimized.
The dc feed network 6 includes a first choke inductor 601, a stability resistor 602, a tenth capacitor 603, a sixth resistor 604, a seventh resistor 605, a second choke inductor 606, and a current limiting resistor 607, where a first end of the first choke inductor 601 is connected to the gate of the second stage triode 401, a second end of the first choke inductor 601 is connected to a first end of the stability resistor 602, a second end of the stability resistor 602 is connected to the tenth capacitor 603, the sixth resistor 604, and a first end of the seventh resistor 605 simultaneously, a second end of the tenth capacitor 603 is connected to a second end of the sixth resistor 604 and is grounded, a second end of the seventh resistor 605 is connected to the first end of the current limiting resistor 607 and to a power supply simultaneously, a second end of the current limiting resistor 607 is connected to a first end of the second choke inductor 606, and a second end of the second choke inductor 606 is connected to the drain of the second stage triode 401. The sixth resistor 604 and the seventh resistor 605 form a voltage dividing network to provide bias voltage for the grid electrode of the second-stage triode 401; the tenth capacitor 603 is a bypass capacitor; the supply voltage was +5v.
By simulation and experimental verification of the gain, return loss and noise figure of the low noise amplifier of the present utility model in ADS, specifically, the gain test curve, return loss test curve and noise figure test curve of the low noise amplifier are shown in fig. 3 to 5, respectively. In the frequency band of 8-12GHz, the gain of the low noise amplifier is 25+/-0.5 dB, the return loss is less than-14 dB, and the noise coefficient is less than 0.95dB. The actual measurement result shows that the low noise amplifier has excellent low noise, high gain and low standing wave characteristics.
The above description is only of the preferred embodiments of the present utility model and is not intended to limit the present utility model, but various modifications and variations can be made to the present utility model by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the protection scope of the present utility model.
Claims (7)
1. The low-noise amplifier of 8-12GHz is characterized by comprising an input matching network (1), a first-stage amplifier (2), an interstage matching network (3), a second-stage amplifier (4), an output matching circuit (5) and a direct current feed network (6); the input port of the input matching network (1) is a signal input end of the low-noise amplifier, and the output port of the input matching network (1) is connected with the input end of the first-stage amplifier (2); the first-stage amplifier (2) comprises a first-stage triode (201), a resistance-capacitance network, a first series network and a second series network, wherein the resistance-capacitance network is connected with a source electrode of the first-stage triode (201) and grounded, the first series network is connected with a grid electrode of the first-stage triode (201) and grounded, the second series network is connected with a drain electrode of the first-stage triode (201) and grounded, and meanwhile, the drain electrode of the first-stage triode (201) is connected with an input end of the inter-stage matching network (3); the interstage matching network (3) comprises a fourth capacitor (301) and a fourth inductor (302), the fourth capacitor (301) is connected with the drain electrode of the first-stage triode (201) and grounded, the first end of the fourth inductor (302) is connected with the drain electrode of the first-stage triode (201), and the second end of the fourth inductor (302) is connected with the input end of the second-stage amplifier (4); the second-stage amplifier (4) comprises a second-stage triode (401), a fifth inductor (402), a fourth resistor (403), a fifth capacitor (404), a sixth capacitor (405) and a negative feedback circuit, wherein a first end of the fifth capacitor (404) is connected with a second end of the fourth inductor (302), a second end of the fifth capacitor (404) is connected with a grid electrode of the second-stage triode (401), a first end of the fifth inductor (402) is connected with a second end of the fourth inductor (302), a second end of the fifth inductor (402) is connected with a first end of the fourth resistor (403), the fifth inductor (402) and the fourth resistor (403) form a first-stage current multiplexing circuit with the fourth inductor (302), the sixth capacitor (405) is simultaneously connected with a second end of the fourth resistor (403) and a source electrode of the second-stage triode (401) and grounded, and the negative feedback circuit is connected with a drain electrode of the second-stage triode (401) in parallel connection with a drain electrode of the second-stage triode (401) and a drain electrode of the second-to-side triode (401).
2. The low noise amplifier according to claim 1, characterized in that the dc feed network (6) comprises a first choke inductance (601), a stability resistor (602), a tenth capacitor (603), a sixth resistor (604), a seventh resistor (605), a second choke inductance (606) and a current limiting resistor (607), a first end of the first choke inductance (601) being connected to the gate of the second stage transistor (401), a second end of the first choke inductance (601) being connected to the first end of the stability resistor (602), a second end of the stability resistor (602) being connected to both the tenth capacitor (603), the sixth resistor (604) and the first end of the seventh resistor (605), a second end of the tenth capacitor (603) being connected to the second end of the sixth resistor (604) and to ground, a second end of the seventh resistor (605) being connected to both the first end of the current limiting resistor (607) and to the gate of the second stage transistor (401), a second end of the current limiting resistor (607) being connected to the second end of the second inductor (606) and to the second end of the second choke inductor (401).
3. The low noise amplifier according to claim 1, wherein the input matching network (1) comprises a first capacitor (101) and a first inductor (102), a first end of the first capacitor (101) is connected to the radio frequency signal input port, a second end of the first capacitor (101) is connected to both the first end of the first inductor (102) and the gate of the first stage transistor (201), and a second end of the first inductor (102) is grounded.
4. The low noise amplifier according to claim 1, wherein the first series network comprises a second inductor (204) and a second resistor (205), a first end of the second inductor (204) being connected to a first end of the second resistor (205), a second end of the second inductor (204) being connected to the gate of the first stage transistor (201), a second end of the second resistor (205) being connected to ground;
the second series network comprises a third inductor (206), a third resistor (207) and a third capacitor (208), wherein the first end of the third inductor (206) is connected with the first end of the third resistor (207), and the second end of the third inductor (206) is connected with the drain electrode of the first-stage triode (201); the second end of the third resistor (207) is connected with the first end of the capacitor (208), and the second end of the capacitor (208) is grounded.
5. The low noise amplifier according to claim 1, wherein the resistive-capacitive network comprises a second capacitor (203) and a first resistor (202), a first end of the second capacitor (203) and the first resistor (202) being connected to the source of the first stage transistor (201), a second end of the second capacitor (203) being connected to the second ground of the first resistor (202).
6. The low noise amplifier according to claim 1, wherein the output matching circuit (5) comprises an eighth capacitor (501), a seventh inductor (502) and a ninth capacitor (503), a first end of the eighth capacitor (501) is connected to the drain of the second stage transistor (401), a second end of the eighth capacitor (501) is connected to the seventh inductor (502) and a first end of the ninth capacitor (503) at the same time, a second end of the seventh inductor (502) is grounded, and a second end of the ninth capacitor (503) is a radio frequency signal output port.
7. The low noise amplifier according to claim 1, wherein the negative feedback circuit comprises a seventh capacitor (406), a fifth resistor (407) and a sixth inductor (408), a first end of the seventh capacitor (406) being connected to the gate of the second stage transistor (401), a second end of the seventh capacitor (406) being connected to the first end of the fifth resistor (407), a second end of the fifth resistor (407) being connected to the first end of the sixth inductor (408), a second end of the sixth inductor (408) being connected to the drain of the second stage transistor (401).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321775922.0U CN220234638U (en) | 2023-07-07 | 2023-07-07 | 8-12GHz low-noise amplifier |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202321775922.0U CN220234638U (en) | 2023-07-07 | 2023-07-07 | 8-12GHz low-noise amplifier |
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| CN220234638U true CN220234638U (en) | 2023-12-22 |
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| CN202321775922.0U Active CN220234638U (en) | 2023-07-07 | 2023-07-07 | 8-12GHz low-noise amplifier |
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