CN220232402U

CN220232402U - Electronic chip, grafting chip assembly, accessory equipment and host equipment

Info

Publication number: CN220232402U
Application number: CN202321481395.2U
Authority: CN
Inventors: 李钜辉; 陈浩
Original assignee: Jihai Microelectronics Co ltd
Current assignee: Jihai Microelectronics Co ltd
Priority date: 2022-11-18
Filing date: 2023-06-09
Publication date: 2023-12-22
Anticipated expiration: 2033-06-09
Also published as: CN116909606A; CN116680758A; CN116680757A; WO2024104467A1; CN116541319A

Abstract

The embodiment of the application provides an electronic chip, a grafting chip assembly, accessory equipment and host equipment. The electronic chip is a patch chip of the accessory chip; the accessory chip is mounted on accessory equipment; the electronic chip includes: the first power interface is connected to a power line, and the power line supplies power for the electronic chip through the power interface; the first functional port is used for controlling a power supply state for supplying power to the accessory chip. According to the electronic chip provided by the embodiment of the application, power can be dynamically supplied to the accessory chip, so that the bus power consumption of the host equipment is reduced, and the phenomenon that all chips on the bus work abnormally due to overlarge bus power consumption is prevented.

Description

Electronic chip, grafting chip assembly, accessory equipment and host equipment

Technical Field

The application relates to the technical field of image printing, in particular to an electronic chip, a grafting chip assembly, accessory equipment and host equipment.

Background

Some existing host devices are often used in combination with some accessory devices, such as devices of a computer, a mobile phone, a tablet, a printer, etc., where accessory devices used in combination with the host devices include a camera, a USB memory, a battery, a data line, a charger, a docking station, a printing consumable box, etc., respectively.

In general, the accessory device includes an accessory chip for providing identity recognition, and the accessory chip includes information related to identity authentication and information related to service life of the accessory device. When the accessory device is used to the host device, the host device typically authenticates the accessory device through the provisioning chip.

When the information stored in the accessory chip relating to the service life shows that the service life is exhausted, the accessory device will no longer be usable. However, after the end of the life of the fitting, there may be no damage. For environmental and economic reasons, it is desirable in the marketplace to be able to recycle those accessory devices that are used, but have not yet been completely scrapped. Such as replacement of consumables in the accessory device to repair the used accessory device. Taking a printer as an example, after the ink in the ink cartridge is used up, the ink can be reused by replacing the consumable part in the accessory.

However, if the service life information recorded in the accessory chip cannot be modified, the accessory chip used on the accessory device needs to be replaced synchronously when the accessory device is reused. However, the used accessory chip is not completely unusable, and the used accessory chip is directly replaced and discarded, which increases costs and is not environmentally friendly.

In one possible solution, a patch chip is configured for the accessory chip, where the patch chip stores up-to-date lifetime information for the accessory device to reuse the accessory chip and extend the lifetime of the accessory device. However, adding patch chips on an accessory chip basis can result in increased chip power consumption.

Therefore, a new solution is needed to control chip power consumption while reusing accessory chips, extending the accessory device life.

Disclosure of Invention

Aiming at the problem of how to control the power consumption of a chip, the application provides an electronic chip, a grafted chip component, accessory equipment and host equipment.

The embodiment of the application adopts the following technical scheme:

in a first aspect, an embodiment of the present application provides an electronic chip, where the electronic chip is a patch chip of an accessory chip;

the electronic chip includes:

the first power interface is connected to a power line, and the power line supplies power for the electronic chip through the power interface;

the first functional port is used for controlling a power supply state for supplying power to the accessory chip.

In an implementation manner of the first aspect, the first functional port is connected to a control port of a switching device, the switching device is connected to the power line and a power interface of the accessory chip, respectively, and the first functional port is used for controlling whether the power line supplies power to the accessory chip by controlling on-off of the switching device.

In an implementation manner of the first aspect, the first functional port is connected to a power interface of the accessory chip, and the first functional port is used for controlling whether to supply power to the accessory chip by whether to output power.

In an implementation manner of the first aspect, the electronic chip further includes a second functional port, the first functional port and the second functional port are connected to a power interface of the accessory chip, and the first functional port and the second functional port are used for controlling whether to supply power to the accessory chip by whether to output electric energy.

In one implementation of the first aspect:

the electronic chip is mounted on the accessory device;

or,

the electronic chip is mounted on a host device on which the accessory device is mounted.

In one implementation of the first aspect:

the accessory chip is used for storing information related to the identity authentication of the accessory equipment and/or information related to the original service life of the accessory equipment.

In an implementation manner of the first aspect, the electronic chip further includes:

a memory for storing information related to a current lifetime of the accessory device and/or other information related to the accessory device;

and the interface module is used for being connected to the host equipment and/or the accessory chip and carrying out data interaction with the host equipment and/or the accessory chip.

In a second aspect, the present application provides a grafting chip assembly comprising:

an accessory chip;

the patch chip of the accessory chip is the electronic chip according to the first aspect.

In a third aspect, the present application provides an accessory device comprising:

an accessory chip;

In a fourth aspect, the present application provides a host device mounted with an accessory device, the accessory device comprising an accessory chip;

the host device includes:

According to the electronic chip, the grafting chip assembly, the accessory equipment and the host equipment, which are disclosed by the embodiment of the application, the accessory chip can be dynamically powered, so that the bus power consumption of the host equipment is reduced, and the phenomenon that all chips on a bus work abnormally due to overlarge bus power consumption is prevented.

Drawings

FIG. 1 is a schematic diagram of a host device mounting accessory device according to an embodiment of the present application;

FIG. 2 is a schematic diagram of an electronic chip according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a host device mounting accessory device according to an embodiment of the present application;

FIG. 4 is a schematic diagram of an accessory chip and a patch chip power supply circuit of the accessory chip according to an embodiment of the present application;

FIG. 5 is a schematic diagram of an electronic chip according to an embodiment of the present application;

FIG. 6 is a schematic diagram of a host device mounting accessory device according to an embodiment of the present application;

FIG. 7 is a schematic diagram of an accessory chip and a patch chip power supply circuit of the accessory chip according to an embodiment of the present application;

FIG. 8 is a schematic diagram of an accessory chip and a patch chip power supply circuit for the accessory chip according to an embodiment of the present application;

fig. 9 is a schematic diagram of an accessory chip and a patch chip power supply circuit of the accessory chip according to an embodiment of the present application.

Detailed Description

For the purposes, technical solutions and advantages of the present application, the technical solutions of the present application will be clearly and completely described below with reference to specific embodiments of the present application and corresponding drawings. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

The terminology used in the description section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application.

Fig. 1 is a schematic diagram of a host device mounting accessory device according to an embodiment of the present application.

As shown in fig. 1, an accessory device 120 is mounted on the host device 110, and the accessory device 120 includes an accessory chip 121. The accessory chip 121 is used to store information related to the identity authentication of the accessory device 120 and/or information related to the lifetime of the accessory device 120.

The host device 110 may be any electronic device that can mount the accessory device 120, for example, an image forming device (printer, copier, etc.). The accessory device 120 may be any accessory device that may be mounted on the host device 110, such as a compact, an ink cartridge.

In response to the problem of how to recycle an accessory chip (e.g., accessory chip 121 shown in fig. 1), the present application provides an electronic chip that is a patch chip of the accessory chip.

Fig. 2 is a schematic diagram of an electronic chip according to an embodiment of the application.

As shown in fig. 2, the electronic chip 200 is a patch chip of an accessory chip. The accessory chip is used for storing information related to the identity authentication of the accessory equipment and/or information related to the original service life of the accessory equipment.

The electronic chip 200 includes a processor 203, a memory 201, and an interface module 202.

The processor 203 is configured to process and reply to signals from the host device. For example, decrypting, decoding, or identifying signals of the host device, and replying to related operations such as host-related information.

Memory 201 is used to store information related to the current lifetime of the accessory device and/or other information about the accessory device. The lifetime of the accessory device is extended from the information stored in the memory 201 relating to the current lifetime of the accessory device compared to the information stored in the accessory chip relating to the original lifetime of the accessory device.

The interface module 202 is configured to connect to and interact with a host device and/or an accessory chip.

Specifically, the interface module 202 may be a contact point, an antenna, or a coil, and the electronic chip 200 may be mounted on a host device or an accessory device.

Fig. 3 is a schematic diagram of a host device mounting accessory device according to an embodiment of the present application.

As shown in fig. 3, the host device 310 has an accessory device 320 mounted thereon, and the accessory device 320 includes an accessory chip 321 and an electronic chip 322.

The electronic chip 322 is a patch chip of the accessory chip 321, and the accessory chip 321 is used for storing information related to identity authentication of the accessory device 320 and information related to the original service life of the accessory device 320.

The electronic chip 322 includes:

a processor for processing and replying to the host device's signal (see processor 203).

A memory for storing information regarding the lifetime of accessory device 320 and/or other information regarding accessory device 320;

and an interface module for connecting to the host device 310 and the accessory chip 321, and performing data interaction with the host device 310 and the accessory chip 321, thereby realizing recycling of the accessory chip 121.

Further, in an application scenario where there is a patch chip for an accessory chip, after the accessory device is mounted to the host device, power needs to be supplied to the accessory chip and the patch chip in order to ensure that the accessory chip and the patch chip work normally.

Fig. 4 is a schematic diagram of an accessory chip and a patch chip power supply circuit of the accessory chip according to an embodiment of the present application.

As shown in fig. 4, electronic chip 410 is a patch chip for accessory chip 420. The internal functional blocks of the electronic chip 410 may refer to the electronic chip 200.

The electronic chip 410 includes a power interface (Volt Current Condenser, VCC) 411 and the accessory chip 420 includes VCC421.VCC411 and VCC421 are the power supply access for electronic chip 410 and accessory chip 420, respectively.

The power line 430 is connected to the VCC411 and the VCC421 to supply power to the electronic chip 410 and the accessory chip 420. The power cord 430 may be a power cord of a host device or a power cord of an accessory device that obtains power from the host device.

Further, in the embodiment of fig. 4, when the patch chip is not configured for the accessory chip 420, a connection line is configured between the power line 430 and the VCC421, so that the power line 430 is connected to the VCC421 to supply power to the accessory chip 420.

When the patch chip is configured for the accessory chip 420, the configuration connection line is connected from the VCC411 to the connection line between the power supply line 430 and the VCC421. In this way, power may be provided to the electronic chip 410 without adding a power access point to the power cord 430.

In another embodiment, the connection line connection to the VCC411 may also be configured directly from the power supply line 430.

Further, the electronic chip 410 further includes a data terminal (SDA) 412, a clock terminal (SCL) 413, and a ground terminal (GND) 414. The accessory chip 420 also includes a data terminal (SDA) 422, a clock terminal (SCL) 423, and a ground terminal (GND) 424. The electronic chip 410 and the accessory chip 420 support integrated circuit bus (Inter-Integrated Circuit, IIC) communication protocols.

In other embodiments, accessory chip 420 and electronic chip 410 may also be an electronic chip that includes more or fewer ports that support other communication protocols, without limitation in this application.

As shown in fig. 4, after the patch chip is configured for the accessory chip, when the power ports (VCC 411 and VCC 421) of the electronic chip 410 and the accessory chip 420 are simultaneously connected to the power line 430 on the bus, it can be seen that the electronic chip 410 and the accessory chip 420 are consuming power at any time, compared to an application scenario (e.g., the application scenario shown in fig. 1) in which the patch chip is not configured for the accessory chip. Compared to an application scenario (e.g., the application scenario shown in fig. 1) in which a patch chip is not configured for an accessory chip, power consumption of the host device increases and power supply pressure increases.

In order to reduce the power consumption of the host device, the application provides an electronic chip, wherein the electronic chip is a patch chip of the accessory chip.

Fig. 5 is a schematic diagram of an electronic chip according to an embodiment of the application.

As shown in fig. 5, the electronic chip 510 is a patch chip of the accessory chip, and the electronic chip 200 may be referred to for internal functional modules of the electronic chip 510.

The interface of the electronic chip 510 includes:

VCC511 (first power interface), VCC511 being a power supply interface of electronic chip 510, which is connected to a power supply line (refer to power supply line 430);

function port 515 (P515) (first function port), P515 is used to control the power supply state for supplying power to the accessory chip. P515 may be an input/output port (IO port) of electronic chip 510.

Further, the electronic chip 510 further includes SDA512, SCL513, and GND514. The electronic chip 510 supports the IIC communication protocol. In other embodiments, the electronic chip 510 may also be an electronic chip that includes more or fewer ports that support other communication protocols, without limitation in this application.

According to the electronic chip of the embodiment shown in fig. 5, after the patch chip is configured for the accessory chip, the patch chip of the accessory chip is connected to the power line on the bus to consume power. The patch chip controls the power supply state of supplying power to the accessory chip, and when the accessory chip is not required to be started, the patch chip can cut off the power supply to the accessory chip, so that the power consumption is reduced, and the power supply pressure of the host equipment is reduced.

For example, fig. 6 is a schematic diagram of a host device mounting accessory device according to an embodiment of the present application.

As shown in fig. 6, in an application scenario, the host device is a printer 601. The printer 601 has mounted thereon an accessory device 602, and the accessory device 602 includes an accessory chip 603 and an electronic chip 604.

The electronic chip 604 is a patch chip of the accessory chip 603, and the accessory chip 603 is used for storing information related to identity authentication of the accessory device 602 and information related to the original service life of the accessory device 602.

The electronic chip 604 stores information such as current lifetime information and usage history information of the accessory device.

The static power consumption of the accessory chip 603 is 14mA, the static power consumption of the electronic chip 604 is 7mA, and the electronic chip 604 supplies power to the accessory chip 603 through IO port control.

After the accessory device 602 is mounted to the printer 601, the electronic chip 604 is first powered on and communicates with the printer 601, receiving a command from the printer 601, at which time the power supply to the accessory chip 603 is turned off (there is only 7mA of static power consumption of the electronic chip 604).

When the electronic chip 604 receives the command and determines that the command needs to be processed by the accessory chip 603, such as a command related to identity verification, the electronic chip 604 controls the accessory chip 603 to be powered on (7 mA for static power consumption of the electronic chip 604+14 mA for static power consumption of the accessory chip 603 exists), and sends the recognized command to the accessory chip 603, the accessory chip 603 returns feedback to the electronic chip 604 after processing, and the electronic chip 604 cuts off the power supply of the accessory chip 603 and returns the feedback of the accessory chip 603 to the printer 601 after receiving the return of the accessory chip 603.

If the electronic chip 604 determines that the accessory chip 603 is not required to cooperate with the information about the usage history and the remaining lifetime of the accessory device 602 if the identification command is an inquiry, the electronic chip 604 directly returns to the printer 601 without turning on the power of the accessory chip 603.

In this way, the accessory chip 603 is dynamically powered, so that the bus power consumption of the printer 601 is reduced, and the phenomenon that all chips on the bus work abnormally due to overlarge bus power consumption is prevented.

In the embodiment of the application, the control of the power supply of the patch chip to the accessory chip through the functional port can be realized in a plurality of different modes.

Specifically, in one embodiment, the patch chip controls the power supply to the accessory chip through the switching device.

Fig. 7 is a schematic diagram of an accessory chip and a patch chip power supply circuit of the accessory chip according to an embodiment of the present application.

As shown in fig. 7, electronic chip 610 is a patch chip of accessory chip 620. The internal functional blocks of the electronic chip 610 may refer to the electronic chip 200.

The electronic chip 610 includes VCC611 and the accessory chip 620 includes VCC621.VCC611 and VCC621 are power supply access for electronic chip 610 and accessory chip 620, respectively.

Further, the electronic chip 610 also includes SDA612, SCL613, and GND614. The accessory chip 620 also includes SDA622, SCL623, and GND624. The electronic chip 610 and the accessory chip 620 support IIC communication protocols. In other embodiments, accessory chip 620 and electronic chip 610 may also be an electronic chip that includes more or fewer ports that support other communication protocols, without limitation in this application.

The power line 630 is connected to the VCC611 to supply power to the electronic chip 610. The power line 630 may refer to the power line 430.

The power supply line 630 is also connected to an input terminal of a switching device 631 (S631), and an output terminal of S631 is connected to VCC621. S631 may be a field effect transistor, or may be another type of controllable switching device.

The electronic chip 610 also includes a functional port 615 (P615). The P615 is connected to the control port of S631, and the electronic chip 610 controls on/off of S631 by controlling the output of P615, thereby controlling whether the power line 630 provides power to the VCC621.

For example, in an application scenario, the host device is a printer, and the accessory device includes an accessory chip 620 and a patch chip (electronic chip 610) of the accessory chip.

Referring to the flow of the embodiment shown in fig. 6, after the accessory device is mounted to the printer, when the accessory device is operated, the electronic chip 610 receives power from the power line 630, thereby starting the operation first. At this time, the functional port (P615) of the electronic chip 610 does not externally output an electrical signal capable of turning on the switching device S631, for example, outputs a low level.

After the electronic chip 610 starts operation, instruction information is received from the host device. After the electronic chip 610 decrypts, decodes or identifies the instruction information, it is determined that the accessory chip 620 is required to cooperate with the electronic chip, and then the electronic chip 610 outputs a high level to the switching device S631 through the P615 port or other voltage and current signals capable of turning on the switching device S631, so that the switching device S631 is turned on, the power line 630 can supply power to the VCC621, the accessory chip 620 can start to work, and then the accessory chip 620 receives the instruction information sent by the electronic chip 610 and outputs a feedback signal to the electronic chip 610 according to the instruction information.

When the electronic chip 610 receives the feedback signal, it is considered that the accessory chip 620 does not need to continue to cooperate, the P615 can stop outputting the electrical signal to the outside, which can turn on the switching device S631, so that the switching device S631 is turned off, the power line 630 does not supply power to the VCC621, and the accessory chip 620 does not continue to consume excessive electric power.

The electronic chip 610 selectively supplies power to the accessory chip 620 through dynamic control, so that the power consumption of the host device is reduced, the bus power consumption is reduced, and the phenomenon that chips of all accessories on a bus work abnormally due to overlarge bus power consumption is prevented.

In the embodiment shown in fig. 7, a switching device is used to control the power supply to the accessory chip. However, the use of the switching device increases the number of components, resulting in an increase in the space occupied by the chip components. Therefore, in another embodiment, the patch chip directly supplies power to the accessory chip through the functional port to control the power supply to the accessory chip by adopting a scheme of not using a switching device.

Fig. 8 is a schematic diagram of an accessory chip and a patch chip power supply circuit of the accessory chip according to an embodiment of the present application.

As shown in fig. 8, electronic chip 710 is a patch chip for accessory chip 720. The internal functional blocks of the electronic chip 710 may refer to the electronic chip 200.

Electronic chip 710 includes VCC711 and accessory chip 720 includes VCC721.VCC711 and VCC721 are power supply access for electronic chip 710 and accessory chip 720, respectively.

Further, the electronic chip 710 further includes SDA712, SCL713, and GND714. Accessory chip 720 also includes SDA722, SCL723, and GND724. The electronic chip 710 and the accessory chip 720 support IIC communication protocols. In other embodiments, accessory chip 720 and electronic chip 710 may also be electronic chips that include more or fewer ports, supporting other communication protocols, without limitation in this application.

The power line 730 is connected to the VCC711 to supply power to the electronic chip 710. The power line 730 may refer to the power line 430.

The electronic chip 710 also includes a functional port 715 (P715) (first functional port). P715 is connected to VCC721 of accessory chip 720 and electronic chip 710 controls whether VCC721 is powered by controlling whether P715 outputs power.

For example, in an application scenario, the host device is a printer, and the accessory device includes an accessory chip 720 and a patch chip (electronic chip 710) of the accessory chip.

After the accessory device is mounted to the printer, when the accessory device is operated, the electronic chip 710 receives power from the power line 730 prior to the accessory chip 720, thereby starting the operation first. At this time, the functional port P715 of the electronic chip 710 does not output a voltage that can satisfy the operation of the accessory chip 720, for example, outputs a low level or a high set of impedance states.

After the electronic chip 710 starts to operate, instruction information is received from the host device. When the electronic chip 710 decrypts, decodes or recognizes the instruction information, it is determined that the accessory chip 720 is required to cooperate with the operation, the electronic chip 710 outputs a high level or other voltage-current signals capable of meeting the operation of the accessory chip 720 to the accessory chip 720 through the P715 port, so that the accessory chip 720 can start to operate, further receive the instruction information sent by the electronic chip 710, and output a feedback signal to the electronic chip 710 according to the instruction information.

When the electronic chip 710 receives the feedback signal, it is considered that the accessory chip 720 does not need to continue to work cooperatively, the power output of the P715 port can be stopped, so that the accessory chip 720 does not continue to consume excessive electric power. The accessory chip 720 is selectively powered through dynamic control, so that the bus power consumption is reduced, and the phenomenon that chips of all accessories on a bus work abnormally due to overlarge bus power consumption is prevented.

In another embodiment, when the power supply capability of a single functional port of the patch chip is insufficient, the patch chip directly supplies power to the accessory chip through a plurality of functional ports to control the power supply to the accessory chip.

As shown in fig. 9, electronic chip 810 is a patch chip of accessory chip 820. The internal functional blocks of the electronic chip 810 may refer to the electronic chip 200.

Electronic chip 810 includes VCC811 and accessory chip 820 includes VCC821.VCC811 and VCC821 are power supply access for electronic chip 810 and accessory chip 820, respectively.

Further, the electronic chip 810 further includes SDA812, SCL813, and GND814. The accessory chip 820 also includes SDA822, SCL823, and GND824. The electronic chip 810 and the accessory chip 820 support IIC communication protocols. In other embodiments, accessory chip 820 and electronic chip 810 may also be an electronic chip that includes more or fewer ports, supporting other communication protocols, without limitation in this application.

The power line 830 is connected to the VCC811 to supply power to the electronic chip 810. Power line 830 may refer to power line 430.

The electronic chip 810 also includes a functional port 815 (P815) (first functional port) and a functional port 816 (P816) (second functional port). P815 and P816 are connected to VCC821 of accessory chip 820, and electronic chip 810 controls whether power is supplied to VCC821 by controlling whether P815 and P816 output power.

Further, the application also provides a grafting chip assembly, which comprises the accessory chip and the patch chip of the accessory chip.

Further, the application also provides accessory equipment, which comprises the accessory chip and the patch chip of the accessory chip.

Further, the application also provides host equipment, wherein the host equipment is provided with accessory equipment, and the accessory equipment comprises the accessory chip disclosed by the embodiment of the application; the host device comprises the patch chip of the accessory chip.

In the description of the embodiments of the present application, for convenience of description, the functions are described as being divided into various modules, and the division of each module is merely a division of a logic function, and when the embodiments of the present application are implemented, the functions of each module may be implemented in the same or multiple pieces of hardware.

In particular, the apparatus according to the embodiments of the present application may be fully or partially integrated into one physical entity or may be physically separated when actually implemented. And these modules may all be implemented in software in the form of calls by the processing element; or can be realized in hardware; it is also possible that part of the modules are implemented in the form of software called by the processing element and part of the modules are implemented in the form of hardware. For example, the detection module may be a separately established processing element or may be implemented integrated in a certain chip of the electronic device. The implementation of the other modules is similar. In addition, all or part of the modules can be integrated together or can be independently implemented. In implementation, each step of the above method or each module above may be implemented by an integrated logic circuit of hardware in a processor element or an instruction in a software form.

For example, the modules above may be one or more integrated circuits configured to implement the methods above, such as: one or more specific integrated circuits (Application Specific Integrated Circuit, ASIC), or one or more digital signal processors (Digital Singnal Processor, DSP), or one or more field programmable gate arrays (Field Programmable Gate Array, FPGA), etc. For another example, the modules may be integrated together and implemented in the form of a System-On-a-Chip (SOC).

Specifically, in an embodiment of the present application, the processor of the electronic chip may be a device on chip SOC, where the processor may include a central processing unit (Central Processing Unit, CPU) and may further include other types of processors. In particular, in an embodiment of the present application, the memory of the electronic chip may be a read-only memory (ROM), other type of static storage device capable of storing static information and instructions, a random access memory (random access memory, RAM) or other type of dynamic storage device capable of storing information and instructions, an electrically erasable programmable read-only memory (electrically erasable programmable read-only memory, EEPROM), a compact disc read-only memory (compact disc read-only memory, CD-ROM) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, or any computer readable medium capable of carrying or storing desired program code in the form of instructions or data structures and capable of being accessed by a computer.

In particular, in an embodiment of the present application, the processor and the memory may be combined into a processing device, more commonly separate components, and the processor is configured to execute the program code stored in the memory to implement the method described in the embodiment of the present application. In particular, the memory may also be integrated into the processor or may be separate from the processor.

In the embodiments of the present application, the term "at least one" refers to one or more, and the term "a plurality" refers to two or more. "and/or", describes an association relation of association objects, and indicates that there may be three kinds of relations, for example, a and/or B, and may indicate that a alone exists, a and B together, and B alone exists. Wherein A, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of the following" and the like means any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c may represent: a, b, c, a and b, a and c, b and c or a and b and c, wherein a, b and c can be single or multiple.

In the present embodiments, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.

All embodiments in the application are described in a progressive manner, and identical and similar parts of all embodiments are mutually referred, so that each embodiment mainly describes differences from other embodiments. The foregoing is merely a specific embodiment of the present application, and any person skilled in the art may easily think of changes or substitutions within the technical scope of the present application, and should be covered in the scope of the present application. The protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. An electronic chip is characterized in that the electronic chip is a patch chip of an accessory chip;

the electronic chip includes:

2. The electronic chip of claim 1, wherein the first functional port is connected to a control port of a switching device, the switching device being connected to the power line and a power interface of the accessory chip, respectively, the first functional port being for controlling whether the power line supplies power to the accessory chip by controlling on-off of the switching device.

3. The electronic chip of claim 1, wherein the first functional port is connected to a power interface of the accessory chip, the first functional port being for controlling whether to power the accessory chip by whether to output electrical power.

4. The electronic chip of claim 1, further comprising a second functional port, the first functional port and the second functional port being connected to a power interface of the accessory chip, the first functional port and the second functional port being configured to control whether the accessory chip is powered by whether power is output.

5. The electronic chip of claim 1, wherein:

the electronic chip is mounted on the accessory device;

or,

the electronic chip is mounted on a host device of the mounting assembly device.

6. The electronic chip of claim 1, wherein:

7. The electronic chip of any one of claims 1-6, wherein the electronic chip further comprises:

a memory for storing information related to the current lifetime of the accessory device and/or other information related to the accessory device;

8. A grafting chip assembly, the grafting chip assembly comprising:

an accessory chip;

a patch chip of the accessory chip, the patch chip being an electronic chip as claimed in any one of claims 1 to 6.

9. An accessory device, the accessory device comprising:

an accessory chip;

10. A host device, wherein the host device is mounted with an accessory device, the accessory device comprising an accessory chip;

the host device includes: