CN220207690U

CN220207690U - Test socket

Info

Publication number: CN220207690U
Application number: CN202321690179.9U
Authority: CN
Inventors: 王彬
Original assignee: Shenzhen Shangyangtong Technology Co ltd
Current assignee: Shenzhen Shangyangtong Technology Co ltd
Priority date: 2023-06-30
Filing date: 2023-06-30
Publication date: 2023-12-19
Anticipated expiration: 2033-06-30

Abstract

The embodiment of the application relates to the technical field of electronic device testing and discloses a test socket. The test socket is used for testing a semiconductor device, and the semiconductor device is provided with a plurality of pins. The test socket comprises a shell, wherein the shell is provided with a plurality of jacks corresponding to the pins one by one, and each jack is used for inserting the corresponding pin; a plurality of electrical connection channels are provided in at least a portion of the jack for electrically connecting the pins when the pins are inserted into the jack. The test socket provided by the embodiment of the application can ensure the independence among various signals when the semiconductor device is tested.

Description

Test socket

Technical Field

The embodiment of the application relates to the technical field of electronic device testing, in particular to a test socket.

Background

With the rapid development of integrated circuits, the variety of semiconductor devices is also increasing. Meanwhile, the package types of semiconductor devices are many, which presents a great challenge for integrated circuit testing. In order to realize batch testing of large-scale devices, the use of test sockets is a good solution. The test socket is adopted for testing, so that the convenience of the semiconductor device during testing can be improved. In the testing process, the connection of the testing circuit can be realized only by inserting pins of the semiconductor device to be tested into the jacks of the testing socket.

However, the conventional test socket has a phenomenon that various signals are mutually affected when the controllable semiconductor device is tested. That is, when the semiconductor device to be tested is a controllable device, the test socket cannot ensure independence between various signals. Therefore, how to ensure independence between various signals when testing semiconductor devices is an important issue.

Disclosure of Invention

An object of the present embodiment is to provide a test socket capable of ensuring independence between various signals when testing a semiconductor device.

In order to solve the above technical problems, embodiments of the present application provide a test socket for testing a semiconductor device, the semiconductor device having a plurality of pins. The test socket comprises a shell, wherein the shell is provided with a plurality of jacks corresponding to the pins one by one, and each jack is used for inserting the corresponding pin; a plurality of electrical connection channels are provided in at least a portion of the jack for electrically connecting the pins when the pins are inserted into the jack.

According to the test socket provided by the embodiment of the application, the group or groups of electric connection channels are added in the jack, so that the electric connection channels shared in the jack originally are split into the electric connection channels special for different signals, the signal influence caused by the shared loop can be avoided, and the signal integrity of the test is ensured. That is, the test socket provided in some embodiments of the present application may separate different electrical connection channels, such as a signal circuit and a power circuit, at the contact source of the test socket and the semiconductor device pins, so as to avoid adverse effects between the two. Thereby enabling the test socket to ensure independence between various signals when testing the semiconductor device.

In some embodiments, each electrical connection channel includes an elastic member coupled to the elastic member and mounted in the housing for making electrical contact with the pin when the pin is inserted into the receptacle, and a lead-out wire mounted in the housing for connecting to the test circuit.

In some embodiments, the elastic member is provided in a sheet form.

In some embodiments, the resilient member is arranged in an arc.

In some embodiments, one end of the elastic member is a free end, and the other end of the elastic member is connected to the lead wire.

In some embodiments, the middle portion of the resilient member is closer to the receptacle than the two ends in the depth direction of the receptacle.

In some embodiments, there are two electrical connection channels.

In some embodiments, the elastic members of the two electrical connection channels are symmetrically disposed at two sides of the jack, and the two elastic members are disposed opposite to each other.

In some embodiments, the elastic members of the two electrical connection channels are disposed flush in a depth direction of the insertion hole, and one end of the elastic member is closer to the insertion hole than the other end.

In some embodiments, the lead wires of the two electrical connection channels extend in different directions.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the drawings are not to be taken in a limiting sense, unless otherwise indicated.

Fig. 1 is a schematic diagram of a mating structure of a test socket and a semiconductor device according to some embodiments of the present application;

fig. 2 is a schematic structural view of a semiconductor device in the prior art;

fig. 3 is a schematic structural diagram of a test socket according to some embodiments of the present application when an electrical connection channel is mated with a pin of a semiconductor device.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the following detailed description of each embodiment of the present application will be given with reference to the accompanying drawings. However, those of ordinary skill in the art will understand that in various embodiments of the present application, numerous technical details have been set forth in order to provide a better understanding of the present application. However, the technical solutions claimed in the present application can be implemented without these technical details and with various changes and modifications based on the following embodiments. The following embodiments are divided for convenience of description, and should not be construed as limiting the specific implementation of the present application, and the embodiments may be mutually combined and referred to without contradiction.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having" and any variations thereof in the description and claims of the present application and in the description of the figures above are intended to cover non-exclusive inclusions.

In the description of the embodiments of the present application, the technical terms "first," "second," etc. are used merely to distinguish between different objects and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, a particular order or a primary or secondary relationship. In the description of the embodiments of the present application, the meaning of "plurality" is two or more unless explicitly defined otherwise.

In the description of the embodiments of the present application, the term "and/or" is merely an association relationship describing an association object, which means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

In the description of the embodiments of the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "coupled," and the like should be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; or may be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the embodiments of the present application will be understood by those of ordinary skill in the art according to the specific circumstances.

The existing test socket for testing semiconductor devices is very simple, and although batch testing of semiconductor devices can be realized, independent signal channels are not designed for different signals inside the test socket. Normal use can be satisfied when testing a normal semiconductor device, but for some controllable devices, the signals will affect each other, so that the test result will be abnormal. For example, the test sockets of the semiconductor device packaged by the TO package are mostly of a spring piece structure, and pins of the semiconductor device are fixed by the spring piece and electrically contacted by the spring piece crimping when the test is performed. This structure is simple and easy to implement, but has the disadvantage that when the semiconductor device is a controllable device, the spring plate needs to run both the control signal path and the power loop. When the semiconductor device is a high-speed device, the control signal and the signal in the power loop can influence each other when the signal data under high-speed operation is measured through the socket, which is not beneficial to the integrity display of the test signal.

That is, it is necessary to design a test socket capable of ensuring independence between various signals when testing a semiconductor device.

And the test socket that this application provided by some embodiments through set up many electrical connection passageway in the jack, can be at test socket and semiconductor device pin contact source with different electrical connection passageway, like signal return circuit and power return circuit separation, avoid both producing the adverse effect each other. Thereby enabling the test socket to ensure independence between various signals when testing the semiconductor device.

The following describes a test socket structure provided in some embodiments of the present application with reference to fig. 1. The test socket is used for testing a semiconductor device, and the semiconductor device is provided with a plurality of pins as shown in fig. 2.

As shown in fig. 1 and 3, the test socket provided in some embodiments of the present application includes a housing 11, where the housing 11 is provided with a plurality of jacks 12 corresponding to the plurality of pins 21 one by one, and each jack 12 is used for inserting a corresponding pin 21; a plurality of electrical connection channels 13 are provided in at least a portion of the receptacle 12, the plurality of electrical connection channels 13 being configured to electrically connect with a pin 21 when the pin 21 is inserted into the receptacle 12.

The casing 11 is the fixed basis of installation of other spare parts in the test socket, and casing 11 can adopt different shapes such as cuboid, square or cylinder according to actual conditions. Meanwhile, the housing 11 is provided with a jack 12, and the jack 12 can be inserted with a pin 21 of the semiconductor device 20. Typically, the sockets 12 are collectively designed on a larger surface of the housing 11 to simultaneously insert a plurality of semiconductor devices 20 into a test socket for testing. Also, the sockets 12 on the housing 11 may be grouped two by two, grouped three by one, or grouped four by four in order to accommodate testing of semiconductor devices 20 having different numbers of pins 21.

The electrical connection channels 13 are arranged inside the jack 12, the electrical connection channels 13 being independent from each other, so that different signals can be transmitted in separate channels. In practice, a plurality of electrical connection channels 13 may be provided in only part of the jacks 12, while one electrical connection channel 13 is provided in the other part of the jacks 12. For example, fig. 1 shows a semiconductor device 20 to be tested above, and the semiconductor device 20 is a three-terminal device, and three terminals are a control terminal, a high voltage terminal, and a ground terminal, respectively. Below shown in fig. 2 is a test socket which is a corresponding three jack 12 configuration in which ground terminals and corresponding ground terminal sockets share signal ground and power ground. For the ground terminals therein, only one electrical connection channel 13 may be provided.

According to the test socket provided by some embodiments of the application, one or more groups of electric connection channels 13 are added in the jack 12, and the electric connection channels 13 shared in the jack 12 are split into electric connection channels 13 special for different signals, so that signal influence caused by a shared loop can be avoided, and the signal integrity of the test is ensured. That is, the test socket provided in some embodiments of the present application may separate different electrical connection channels 13, such as a signal circuit and a power circuit, at the source of contact between the test socket and the pins 21 of the semiconductor device 20, so as to avoid adverse effects between the two. Thereby enabling the test socket to ensure independence between various signals when testing the semiconductor device 20.

As shown in fig. 3, each of the electrical connection channels 13 includes an elastic member 131 and a lead-out wire 132 connected, the elastic member 131 being mounted in the housing 11 and adapted to be in electrical contact with the pins 21 when the pins 21 are inserted into the insertion holes 12, and the lead-out wire 132 being mounted in the housing 11 and adapted to be connected to a test circuit.

The pins 21 of the semiconductor device 20 are respectively clamped by different elastic members 131, and the different elastic members 131 have corresponding outgoing lines 132. This structure allows the pins 21 of the semiconductor power device to be separated into two or more individual lead wires 132 after contacting the elastic member 131 to perform different electrical functions. For example, one of the outlets 132 may be connected to a control signal, the other outlet 132 may be connected to a power signal, and the two signals may not interfere or affect each other in the socket.

The use of the elastic member 131 can ensure the stability of the electrical connection channel 13 when connected to the leads 21 of the semiconductor device 20. That is, the elastic member 131 can be tightly held against the leads 21 of the semiconductor device 20 by elastic deformation of the elastic member 131 itself.

The lead wires 132 are used to connect test circuits within the test socket for inserting the semiconductor device 20 into the test circuits for testing.

In some embodiments of the present application, the elastic member 131 may be provided in a sheet shape.

By providing the elastic member 131 in a sheet shape, a contact area of the elastic member 131 when it is in contact with the leads 21 of the semiconductor device 20 can be ensured, thereby ensuring reliability when the elastic member 131 is in electrical contact with the leads 21 of the semiconductor device 20.

As shown in fig. 3, the elastic member 131 may be provided in an arc shape.

That is, the elastic member 131 is provided in a curved shape. In this way, during the process of installing the elastic member 131, the elastic member 131 can have a certain elastic force, which is beneficial to forming a sufficient compression effect on the pins 21 when the pins 21 of the semiconductor device 20 are inserted.

In addition, one end of the elastic member 131 may be a free end, and the other end of the elastic member 131 is connected to the lead wire 132.

That is, the lead-out wire 132 is connected to one of the ends of the elastic member 131, so that the signal path can be constructed without affecting the deformation of the elastic member 131.

In some embodiments, the middle of the elastic member 131 is closer to the insertion hole 12 than the both ends in the depth direction of the insertion hole 12.

In this way, the portion of the elastic member 131 where the elastic force is concentrated can form a strong pressing action on the pin 21 when the pin 21 of the semiconductor device 20 is inserted into the jack 12. Thereby ensuring an electrical contact effect between the elastic member 131 and the pins 21.

As shown in fig. 3, there may be two electrical connection channels 13.

In performing the test of the semiconductor device 20, the leads 21 of the semiconductor device 20 are clamped by two spring tabs, each having a corresponding lead 132. One of the outlets 132 may be connected to a control signal and the other outlet 132 may be connected to a power signal, the two signals not interfering or affecting each other within the receptacle.

In addition, the elastic members 131 of the two electrical connection channels 13 may be symmetrically disposed on two sides of the jack 12, and the two elastic members 131 are disposed opposite to each other.

In this way, the pins 21 can be pressed from two sides of the pins 21, so that the acting force applied to the pins 21 is balanced.

In some embodiments, the elastic members 131 of the two electrical connection channels 13 may be disposed flush in the depth direction of the insertion hole 12, and one end of the elastic member 131 is closer to the insertion hole 12 than the other end.

That is, the two elastic members 131 apply pressure to the leads 21 of the semiconductor device 20 at the same position in the depth direction of the insertion hole 12. Meanwhile, the distance between the two elastic members 131 changes regularly from large to small and then from small to large in the depth direction of the insertion hole 12. In this way, the pins 21 of the semiconductor device 20 are inserted with a gradual insertion process between the two elastic members 131, which can guide the insertion of the pins 21.

In addition, the lead wires 132 of the two electrical connection channels 13 may extend toward different directions.

As shown in fig. 3, the lead-out wire 132 of one electrical connection channel 13 is connected to the upper end of the elastic member 131 of the electrical connection channel 13, and the lead-out wire 132 of the other electrical connection channel 13 is connected to the lower end of the elastic member 131 of the electrical connection channel 13. In addition, the lead wires 132 of the two electrical connection channels 13 extend in different directions, so that the independence between the two electrical connection channels 13 can be ensured, and adverse effects between the two electrical connection channels are avoided.

It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples of implementing the present application and that various changes in form and details may be made therein without departing from the spirit and scope of the present application.

Claims

1. A test socket for testing a semiconductor device having a plurality of pins, the test socket comprising:

the shell is provided with a plurality of jacks which are in one-to-one correspondence with the pins, and each jack is used for inserting the corresponding pin;

a plurality of electrical connection channels are provided in at least a portion of the receptacle for electrically connecting the pin when the pin is inserted into the receptacle.

2. The test socket of claim 1, wherein each of the electrical connection channels includes an associated spring mounted within the housing for electrically contacting the pin when the pin is inserted into the receptacle and a lead mounted within the housing for connection to a test circuit.

3. The test socket of claim 2, wherein the resilient member is provided in a sheet form.

4. The test socket of claim 2, wherein the resilient member is arranged in an arc shape.

5. The test socket of claim 4, wherein one end of the elastic member is a free end, and the other end of the elastic member is connected to the lead wire.

6. The test socket of claim 5, wherein the middle portion of the elastic member is closer to the receptacle than the two ends in a depth direction of the receptacle.

7. The test socket of claim 2, wherein there are two of said electrical connection channels.

8. The test socket of claim 7, wherein the elastic members of the two electrical connection channels are symmetrically disposed on both sides of the receptacle, and the two elastic members are disposed opposite to each other.

9. The test socket of claim 8, wherein the elastic members of the two electrical connection channels are disposed flush in a depth direction of the insertion hole, and one end of the elastic member is closer to the insertion hole than the other end.

10. The test socket of claim 7, wherein the lead wires of two of the electrical connection channels extend in different directions.