CN220190844U - Electronic component and electronic equipment comprising same - Google Patents

Electronic component and electronic equipment comprising same Download PDF

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Publication number
CN220190844U
CN220190844U CN202321539584.0U CN202321539584U CN220190844U CN 220190844 U CN220190844 U CN 220190844U CN 202321539584 U CN202321539584 U CN 202321539584U CN 220190844 U CN220190844 U CN 220190844U
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China
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electrode
capacitor
resonator
upper electrode
substrate
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CN202321539584.0U
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Chinese (zh)
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蔡洵
赖志国
杨清华
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Suzhou Zhenxin Microelectronics Co ltd
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Suzhou Huntersun Electronics Co Ltd
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Abstract

The utility model relates to an electronic component comprising: a resonator and an integrated capacitor integrated with the resonator; the resonator includes a second electrode, a piezoelectric layer, and a first electrode stacked on a substrate; the integrated capacitor comprises the first electrode, a dielectric layer and a capacitor upper electrode, wherein the dielectric layer is positioned on the first electrode, and the capacitor upper electrode is positioned on the dielectric layer; wherein the projection of the upper electrode of the capacitor on the substrate overlaps with the projection of the first electrode on the substrate. The utility model directly realizes the serial-parallel connection of the bulk acoustic wave resonator and the capacitor through the wafer, reduces the chip volume and reduces the design difficulty.

Description

Electronic component and electronic equipment comprising same
Technical Field
The present utility model relates to the field of electronics, and more particularly, to an electronic component and an electronic device including the same.
Background
A wide variety of semiconductor devices, mems devices, may be formed on the substrate. As the physical structural complexity of semiconductor devices and mems devices increases, semiconductor devices and mems devices having cavities are often used in the art.
Taking a film bulk acoustic wave filter as an example, the film bulk acoustic wave filter is formed by series-parallel connection of a bulk acoustic wave resonator and some passive devices such as an inductor or a capacitor, the bulk acoustic wave resonator and the capacitor in the prior art are not easy to integrate, the bulk acoustic wave resonator is directly formed on a wafer substrate by an MEMS (micro electro mechanical system) process, and the capacitor is often required to be formed on a packaging substrate, so that the size is large, and the circuit design is complex. The utility model directly realizes the serial-parallel connection of the bulk acoustic wave resonator and the capacitor through the wafer, reduces the chip volume and reduces the design difficulty.
Disclosure of Invention
The utility model aims at the technical problems, and designs an electronic element and electronic equipment comprising the same, which can overcome the technical problems in the prior art, thereby improving the integration level of devices, reducing the chip size, reducing the process difficulty and the manufacturing cost, and being convenient for industrial mass production.
The following presents a simplified summary of the utility model in order to provide a basic understanding of some aspects of the utility model. It should be understood that this summary is not an exhaustive overview of the utility model. It is not intended to identify key or critical elements of the utility model or to delineate the scope of the utility model. Its purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is discussed later.
According to an aspect of the present utility model, there is provided an electronic component comprising: a resonator and an integrated capacitor integrated with the resonator;
the resonator includes a second electrode, a piezoelectric layer, and a first electrode stacked on a substrate;
the integrated capacitor comprises the first electrode, a dielectric layer and a capacitor upper electrode, wherein the dielectric layer is positioned on the first electrode, and the capacitor upper electrode is positioned on the dielectric layer;
wherein, the projection of the upper electrode of the capacitor on the substrate is overlapped with the projection part of the first electrode on the substrate.
Further, the projection of the electrode on the capacitor on the substrate completely covers the projection of the first electrode on the substrate.
Further, the capacitance value of the integrated capacitor can be adjusted by the thickness and the material of the dielectric layer and the overlapping area of the first electrode, the dielectric layer and the upper electrode of the capacitor.
Further wherein the resonator further comprises one of a cavity, a Bragg reflection layer, or a back cavity formed in the substrate.
Further, the capacitor further comprises a lead wire electrically connected with the upper electrode of the capacitor.
Further, the second electrode is a signal input terminal, and the lead is a signal output terminal, so that the resonator and the integrated capacitor are connected in series.
Further, wherein the lead is electrically connected to the second electrode.
Further, wherein the lead is electrically connected to the second electrode through the piezoelectric layer.
Further, the second electrode is a signal input terminal, and the first electrode is a signal output terminal, so that the resonator and the integrated capacitor are connected in parallel.
According to another aspect of the utility model there is provided an electronic device comprising an electronic component of the utility model.
Drawings
The above and other objects, features and advantages of the present utility model will be more readily appreciated by reference to the following detailed description of the utility model taken in conjunction with the accompanying drawings. The drawings are only for the purpose of illustrating the principles of the utility model. The dimensions and relative positioning of the elements in the figures are not necessarily drawn to scale.
Fig. 1 shows a schematic structural view of an electronic component according to a first embodiment of the present utility model;
fig. 2 shows a schematic structural diagram of an electronic component according to a second embodiment of the present utility model.
Detailed Description
An exemplary disclosure of the present utility model will be described hereinafter with reference to the accompanying drawings. In the interest of clarity and conciseness, not all features of an implementation of the utility model are described in the specification. It will be appreciated, however, that in the development of any such actual implementation, numerous implementation-specific decisions may be made to achieve the developers' specific goals, and that these decisions may vary from one implementation to another.
In this case, in order to avoid obscuring the present utility model by unnecessary details, only the device structures closely related to the scheme according to the present utility model are shown in the drawings, and other details not greatly related to the present utility model are omitted.
In general, it should be understood that the drawings and the various elements depicted therein are not drawn to scale. Moreover, the use of relative terms (e.g., "above," "below," "top," "bottom," "upper," and "lower") to describe various elements' relationships to one another should be understood to encompass different orientations of the device and/or elements in addition to the orientation depicted in the figures.
It is to be understood that the utility model is not limited to the described embodiments, as a result of the following description with reference to the drawings. Herein, features between different embodiments may be replaced or borrowed, where possible, and one or more features may be omitted in one embodiment, where like reference numerals refer to like parts. It should be understood that the manufacturing steps of the present utility model are exemplary in embodiments, and that the order of the steps may be varied.
First embodiment
Although the cavity type thin film bulk acoustic resonator is described as an example in this embodiment, it will be understood by those skilled in the art that the solution of the present utility model is not limited to the cavity type thin film bulk acoustic resonator, and is equally applicable to the thin film bulk acoustic resonator and the bulk silicon etched back cavity type thin film bulk acoustic resonator in the acoustic reflection region formed by the bragg reflection layer.
Referring to FIG. 1, FIG. 1 shows a device structure of a first embodiment of the utility model that provides an electronic component integrated with a capacitor and a thin film bulk acoustic resonator having a first substrate 100, the first substrate 100 may be, for example, high resistance silicon, gallium arsenide, indium phosphide, glass, sapphire, aluminum oxide SiC, and the like, is formed of materials compatible with semiconductor processes. It should be noted in particular that when the first substrate 100 is made of a glass material, it has a low dielectric constant, high resistance efficiency, and is more advantageous in high-frequency performance.
At least a first component, illustratively a first resonator component, is formed on the upper surface of the first substrate 100, and the first resonator component may include at least one resonator including a structural functional layer including at least a first electrode 104, a second electrode 102, and a piezoelectric layer 103, the first electrode 104 functioning as an upper electrode 104 of the resonator, and the second electrode 102 functioning as a lower electrode 102 of the resonator.
In an embodiment, the lower electrode 102 may be a single layer or a plurality of layers, and the lower electrode 102 may entirely or partially cover the cavity 101 in the first substrate 100, the cavity 101 being disposed in the first substrate 100. The lower electrode 102 may be formed of one or more conductive materials, such as various metals compatible with semiconductor processes including tungsten, molybdenum, iridium, aluminum, platinum, ruthenium, niobium, or hafnium.
The piezoelectric layer 103 is formed on the lower electrode 102, and the piezoelectric layer 103 may be formed of any piezoelectric material compatible with semiconductor processes, such as aluminum nitride, doped aluminum nitride, or titanate zirconate (PZT).
The upper electrode 104 is formed on the piezoelectric layer 103, and the upper electrode 104 may be formed of one or more conductive materials, for example, various metals compatible with semiconductor processes including tungsten, molybdenum, iridium, aluminum, platinum, ruthenium, niobium, or hafnium. The materials of the upper electrode 104 and the lower electrode 103 may be the same or different. The location where the projections of the upper electrode 104, the piezoelectric layer 103, and the lower electrode 102 and the cavity 101 overlap on the upper surface of the first substrate 100 is defined as the active region of the first component.
An electrical connection structure (not shown) is connected to the lower electrode 102 and the upper electrode 104 for inputting or outputting signals to or from the resonator.
The lower electrode 102, the upper electrode 104 and the piezoelectric layer 103 form a sandwich structure, and in the process of preparing the thin film bulk acoustic resonator, the sandwich structure is covered in the cavity 101 filled with the sacrificial material, and after the subsequent manufacturing process is completed, the sacrificial material is removed to release the cavity 101, thereby forming the thin film bulk acoustic resonator.
The upper electrode 104 of the film bulk acoustic resonator of the present utility model includes a dielectric layer 107, the dielectric layer 107 includes a capacitor upper electrode 105, and the lead 106 is electrically connected to the capacitor upper electrode 105. The capacitor upper electrode 105, the dielectric layer 107, and the upper electrode 104 constitute an integrated capacitor, and the capacitor upper electrode 105 constitutes an upper electrode of the integrated capacitor, and the capacitance value of the integrated capacitor is determined by the thickness and the material of the dielectric layer 107 and the overlapping area of the upper electrode 104, the dielectric layer 107, and the capacitor upper electrode 105. In the present utility model, the projection of the upper capacitor electrode 105 on the first substrate 100 and the projection of the upper electrode 104 on the first substrate 100 may partially overlap, or the projection of the upper capacitor electrode 105 on the first substrate 100 may also completely cover the projection of the upper electrode 104 on the first substrate 100, so that the integrated capacitor can adjust the capacitance value through the size of the coverage area and provide a larger capacitance value when the coverage is complete. Specifically, the dielectric layer 107 may be air or a dielectric material commonly used for a semiconductor such as silicon nitride (SiN), silicon oxide (SiOx), silicon oxynitride (SiON), TEOS, etc., and the capacitor upper electrode 105 may be formed of one or more conductive materials, such as various metals compatible with a semiconductor process including tungsten, molybdenum, iridium, aluminum, platinum, ruthenium, niobium, or hafnium, etc., and may be the same as or different from the material of the lower electrode 102 or the upper electrode 104, which may simplify the manufacturing process.
Further, in the first embodiment of the present utility model, the signal is input from the a terminal, output from the B terminal, that is, the signal is input from the electrical connection structure connected to the lower electrode 102, and output from the lead 106 connected to the capacitor upper electrode 105, so that the resonator is connected in series with the integrated capacitor.
The first embodiment of the utility model realizes monolithic integration of the thin film bulk acoustic resonator and the capacitor, does not need to use a discrete capacitor outside a chip, is beneficial to improving the integration level and the miniaturization of the chip size, has simpler manufacturing process and lower cost, is connected with the resonator in series, and the projection of the upper electrode of the capacitor partially covers or completely covers the projection of the upper electrode of the resonator, so that the integrated capacitor can adjust the capacitance value through the size of the coverage area and provides a larger capacitance value when the capacitor is completely covered.
Second embodiment
Referring to fig. 2, fig. 2 shows a device structure of a second embodiment of the present utility model, which provides an electronic element integrated with a capacitor and a thin film bulk acoustic resonator, the main difference between the second embodiment and the first embodiment is that the thin film bulk acoustic resonator is connected in parallel with the integrated capacitor, and a signal is input from the a terminal and output from the C terminal.
Specifically, the film bulk acoustic resonator has a second substrate 200, at least a second component is formed on an upper surface of the second substrate 200, and illustratively, the second component is a second resonator component, and the second resonator component may include at least one resonator including a structural functional layer including a first electrode 204, a second electrode 202 and a piezoelectric layer 203, where the first electrode 204 is an upper electrode 204 of the film bulk acoustic resonator, the second electrode 202 is a lower electrode 202 of the film bulk acoustic resonator, and a cavity 201 is formed in the second substrate 200, and the second substrate 200, the upper electrode 204, the lower electrode 202, the piezoelectric layer 203, and the cavity 201 have the same structure and material as those in the first embodiment.
An electrical connection structure (not shown) is connected to the lower electrode 202 and the upper electrode 204 for inputting or outputting signals to or from the resonator.
The upper electrode 204 includes a dielectric layer 208 thereon, the dielectric layer 208 includes a capacitive upper electrode 205 thereon, the lead 206 is electrically connected to the capacitive upper electrode 205, and the lead 206 is electrically connected to the lower electrode 202 through the piezoelectric layer 203, preferably through a conductive via 207. The capacitive upper electrode 205, the dielectric layer 208, and the upper electrode 204 constitute an integrated capacitor, wherein the capacitive upper electrode 205 constitutes an upper electrode of the integrated capacitor. The capacitance of the integrated capacitor is determined by the thickness and material of the dielectric layer 208 and the area of overlap of the upper electrode 204, dielectric layer 208, and upper capacitor electrode 205. In the present utility model, the projection of the upper capacitor electrode 205 on the second substrate 200 and the projection of the upper electrode 204 on the second substrate 200 may partially overlap, or the projection of the upper capacitor electrode 205 on the second substrate 200 may also completely cover the upper electrode 204, so that the integrated capacitor can adjust the capacitance value by the size of the coverage area and provide a larger capacitance value when the coverage is complete. Further, the materials of the upper electrode 204, the dielectric layer 208, the capacitor upper electrode 205, and the lead 206 are the same as those of the first embodiment, and the conductive via 207 may be preferably a metal having excellent conductive properties, such as copper.
Further, in the second embodiment of the present utility model, the signal is input from the a terminal, output from the C terminal, that is, the signal is input from the lead 206 connected to the lower electrode 202 and the capacitor upper electrode 205, and output from the electrical connection structure connected to the upper electrode 204, so that the resonator is connected in parallel with the integrated capacitor.
The second embodiment of the utility model realizes monolithic integration of the thin film bulk acoustic resonator and the capacitor, does not need to use a discrete capacitor outside a chip, is beneficial to improving the integration level and the miniaturization of the chip size, has simpler manufacturing process and lower cost, is connected with the resonator in parallel, and the projection of the upper electrode of the capacitor partially covers or completely covers the projection of the upper electrode of the resonator, so that the integrated capacitor can adjust the capacitance value through the size of the coverage area and provides a larger capacitance value when the capacitor is completely covered.
Furthermore, the utility model can flexibly connect the capacitor and the film bulk acoustic resonator in series and in parallel according to the design requirement of the device, thereby improving the degree of freedom of the design of the device.
Third embodiment
A third embodiment of the utility model provides an electronic device comprising an electronic component provided by the utility model that integrates a capacitance and a thin film bulk acoustic resonator.
The utility model has been described in connection with specific embodiments, but it will be apparent to those skilled in the art that these descriptions are intended to be illustrative and not limiting of the scope of the utility model. Various modifications and alterations of this utility model will occur to those skilled in the art in light of the spirit and principles of this utility model, and such modifications and alterations are also within the scope of this utility model.

Claims (10)

1. An electronic component, comprising: a resonator and an integrated capacitor integrated with the resonator;
the resonator includes a second electrode, a piezoelectric layer, and a first electrode stacked on a substrate;
the integrated capacitor comprises the first electrode, a dielectric layer and a capacitor upper electrode, wherein the dielectric layer is positioned on the first electrode, and the capacitor upper electrode is positioned on the dielectric layer;
wherein, the projection of the upper electrode of the capacitor on the substrate is overlapped with the projection part of the first electrode on the substrate.
2. An electronic component as claimed in claim 1, characterized in that: the projection of the upper electrode of the capacitor on the substrate completely covers the projection of the first electrode on the substrate.
3. An electronic component as claimed in claim 1 or 2, characterized in that: the capacitance value of the integrated capacitor can be adjusted through the thickness and the material of the dielectric layer and the overlapping area of the first electrode, the dielectric layer and the upper electrode of the capacitor.
4. An electronic component as claimed in claim 3, characterized in that: the resonator further includes one of a cavity, a Bragg reflector layer, or a back cavity formed in the substrate.
5. An electronic component as claimed in claim 4, wherein: and the lead wire is electrically connected with the upper electrode of the capacitor.
6. An electronic component as recited in claim 5, wherein: the second electrode is a signal input terminal, and the lead is a signal output terminal, so that the resonator and the integrated capacitor are connected in series.
7. An electronic component as recited in claim 5, wherein: the lead is electrically connected to the second electrode.
8. An electronic component as recited in claim 7, wherein: the lead is electrically connected to the second electrode through the piezoelectric layer.
9. An electronic component as claimed in claim 7 or 8, characterized in that: the second electrode is a signal input terminal, and the first electrode is a signal output terminal, so that the resonator and the integrated capacitor are connected in parallel.
10. An electronic device comprising the electronic component of any one of claims 1-9.
CN202321539584.0U 2023-06-16 2023-06-16 Electronic component and electronic equipment comprising same Active CN220190844U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202321539584.0U CN220190844U (en) 2023-06-16 2023-06-16 Electronic component and electronic equipment comprising same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321539584.0U CN220190844U (en) 2023-06-16 2023-06-16 Electronic component and electronic equipment comprising same

Publications (1)

Publication Number Publication Date
CN220190844U true CN220190844U (en) 2023-12-15

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Family Applications (1)

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CN202321539584.0U Active CN220190844U (en) 2023-06-16 2023-06-16 Electronic component and electronic equipment comprising same

Country Status (1)

Country Link
CN (1) CN220190844U (en)

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Effective date of registration: 20240310

Address after: 215536 Building G, China Sound Valley Accelerated Innovation Center, Maqiao East Road, Changshu Economic and Technological Development Zone, Suzhou City, Jiangsu Province

Patentee after: Suzhou Zhenxin Microelectronics Co.,Ltd.

Country or region after: China

Address before: 215000 building ne-39, Northeast District, Suzhou nano City, No. 99, Jinjihu Avenue, Suzhou Industrial Park, Suzhou City, Jiangsu Province

Patentee before: Suzhou hantianxia Electronic Co.,Ltd.

Country or region before: China

TR01 Transfer of patent right