CN220173721U

CN220173721U - Superconducting quantum chip

Info

Publication number: CN220173721U
Application number: CN202321710185.6U
Authority: CN
Inventors: 请求不公布姓名; 赵勇杰
Original assignee: Benyuan Quantum Computing Technology Hefei Co ltd
Current assignee: Benyuan Quantum Computing Technology Hefei Co ltd
Priority date: 2023-06-30
Filing date: 2023-06-30
Publication date: 2023-12-12
Anticipated expiration: 2033-06-30

Abstract

The utility model discloses a superconducting quantum chip, and belongs to the field of quantum bit chips. A superconducting quantum chip, comprising: a substrate; a first superconducting layer disposed on the substrate, the first superconducting layer formed with a first qubit component; a dielectric layer covering the first qubit component; a second superconducting layer disposed on the dielectric layer, the second superconducting layer having a second qubit assembly formed thereon; the first qubit component and the second qubit component are correspondingly arranged, and are coupled in different planes. Through the mode, the utility model can realize the same performance as flip chip bonding, has stable and simple structure, and can also be arbitrarily crossed.

Description

Superconducting quantum chip

Technical Field

The utility model belongs to the field of a quantum bit chip, and particularly relates to a superconducting quantum chip.

Background

The flip chip packaging technology generally adopts a planar process to manufacture lead-free welding spots at the input/output end of an integrated circuit chip, positions and pastes the welding spots on the chip and the welding spots on the substrate, then forms welding balls between the chip and the substrate welding spots by using a solder reflow process, and fills underfill in gaps between the chip and the substrate, thereby finally realizing electric, thermal and mechanical connection between the chip and the substrate.

The flip-chip bonding is small in size, thin in thickness and light in weight, the number of input/output ends per unit area is far larger than that of the traditional packaging integration technology, the density is higher, the transmission performance is improved, the size of the interconnection structure is short, the inductance, the resistance and the capacitance are reduced, the signal integrity is improved, and the radio frequency performance is better.

However, the Flip chip packaging technology has disadvantages, mainly including complex multi-layer process, easy distortion of the structure, i.e. non-parallel Flip layer and Base layer, and reduced junction performance caused by excessive processes.

Disclosure of Invention

The utility model aims to provide a superconducting quantum chip, which solves the problems of complex flip-chip multi-layer process, easy distortion and junction performance reduction caused by excessive processes in the prior art, can realize similar functions without using the flip-chip process, not only ensures that lines can be crossed, but also increases the flexibility of wiring.

In order to solve the above technical problems, the present utility model provides a superconducting quantum chip, including:

a substrate 1;

a first superconducting layer 2 provided on the substrate 1, the first superconducting layer 2 being formed with a first qubit assembly 21;

a dielectric layer 3 covering the first qubit component 21;

a second superconducting layer 4 disposed on the dielectric layer 3, the second superconducting layer 4 being formed with a second qubit assembly 41;

the first qubit component 21 and the second qubit component 41 are disposed correspondingly, and are coupled with each other in different planes.

Preferably, the first qubit component 21 comprises a microwave control line 211 and a magnetic flux control line 212, and the second qubit component 41 comprises a signal read line 411.

Preferably, the first superconductive layer 2 is further formed with a first bonding pad 22, and the first bonding pad 22 is located outside the covering portion of the dielectric layer 3.

Preferably, the microwave control line 211 and the magnetic flux control line 212 extend from the dielectric layer 3 and are connected to the first bonding pad 22.

Preferably, the second superconductive layer 4 is further formed with a second pad 42.

Preferably, the signal read line 411 is connected to the second pad 42.

Preferably, the first bonding pads 22 are distributed around the dielectric layer 3, and the second bonding pads 42 are distributed around the second qubit component 41.

Preferably, the thickness of the first superconductive layer 2 in the direction perpendicular to the substrate 1 is 100nm or less.

Preferably, the thickness of the dielectric layer 3 in the direction perpendicular to the substrate 1 is 5 μm to 10 μm.

Preferably, the microwave control line 211 and the magnetic flux control line 212 are configured as a coplanar waveguide structure;

the signal read line 411 is configured as a coplanar waveguide structure.

Drawings

FIG. 1 is a schematic diagram of a side view of a superconducting quantum chip provided by the utility model;

FIG. 2 is a schematic diagram of a second superconducting layer of the superconducting quantum chip according to the present utility model;

fig. 3 is a schematic top view of a superconducting quantum chip according to the present utility model.

Reference numerals illustrate: 1-substrate, 2-first superconducting layer, 21-first qubit assembly, 211-microwave control line, 212-magnetic flux control line, 22-first bonding pad, 3-dielectric layer, 4-second dielectric layer, 41-second qubit assembly, 411-signal reading line, 42-second bonding pad.

Detailed Description

The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the utility model.

Referring to fig. 1, an embodiment of the present utility model provides a superconducting quantum chip, including:

a substrate 1;

a dielectric layer 3 covering the first qubit component 21;

the first qubit component 21 and the second qubit component 41 are correspondingly arranged, and are coupled in different planes.

In the embodiment of the present utility model, the first superconducting layer 2, the dielectric layer 3, and the second superconducting layer 4 are sequentially stacked based on the substrate 1; wherein, the first superconducting layer 2 is laid on the substrate 1, the thickness is generally less than 100nm, and is subjected to patterning treatment, and the surface of the first superconducting layer 2 is provided with a first qubit component 21; the dielectric layer 3 is typically high-resistance silicon, and its thickness is typically 5 μm-10 μm, and covers the first superconducting layer 2, and covers the first qubit component 21; finally, a second superconducting layer 4 is arranged on the upper surface of the dielectric layer 3, the second superconducting layer 4 is subjected to graphical processing, and a second qubit component 41 is arranged on the surface of the second superconducting layer 4; in position, the first qubit element 21 and the second qubit element 41 are close to two different surfaces of the dielectric layer 3, and are disposed opposite to each other, so that the first qubit element 21 and the second qubit element 41 are functionally coupled to each other by different planes (this is the dielectric coupling), and signal communication is realized therebetween.

Referring to fig. 2, the first qubit element 21 includes a microwave control line 211 and a magnetic flux control line 212, and the second qubit element 41 includes a signal read line 411.

Wherein microwave control line 211 and magnetic flux control line 212 are respectively associated with the qubits, thereby controlling the qubits. For example, microwave control line 211 may adjust the state of the qubit, while magnetic flux control line 212 may control the frequency of the qubit. The signal read line 411 may then be associated with a qubit through a resonator, thereby enabling a read operation of the qubit. That is, the resonator is coupled to the signal read line 411 and the qubit, respectively, and the microwave control line 211 and the magnetic flux control line 212 are coupled to the qubit, respectively.

Actually, the structures such as the signal reading line 411 and the reading resonant cavity directly participate in the bit unit or the bit transmission link, so that the smaller the loss is, the better the insertion loss is; it is well known that medium propagation tends to have some tangential loss to a much greater extent than vacuum propagation; (this relates to a method for evaluating the distribution of energy in space, such as the energy stored in a medium is smaller than the energy in the whole space, the smaller the participation ratio is, the less the energy stored in the medium is, i.e. the better the performance is; the bit is used as the core unit of the superconducting quantum chip, the low-loss medium (vacuum is optimal) needs to be used as much as possible, so that the bit structure is arranged on the second superconducting layer 4, the microwave control line 211 and the magnetic flux control line 212 have less requirement on insertion loss and the like, and the signal line can pass through the medium, so that the microwave control line 211 and the magnetic flux control line 212 are arranged on the first superconducting layer 2 covered by the medium layer 3.

The second superconducting layer 4 is also fabricated with a read resonant cavity therein, and is co-located with the signal read line 411 and the josephson junction, so that they do not require a crossover between the first superconducting layer 2 and the second superconducting layer 4 through a signal path such as an indium column.

In other words, in the superconducting quantum chip provided by the embodiment of the utility model, the signal communication between the first superconducting layer 2 and the second superconducting layer 4 is not needed to be performed by using a transmission medium such as an indium column used in flip-chip bonding, and the dielectric layer 3 is used for replacing the supporting function of the transmission medium, so that the problems of unstable transmission signals and the like caused by the fact that the indium column is used as the signal transmission medium and the high-quality manufacturing requirement of the signal transmission medium is not met are avoided.

In some embodiments of the present utility model, the first superconductive layer 2 is further formed with a first pad 22, and the first pad 22 is located outside the covering portion of the dielectric layer 3.

The microwave control line 211 and the magnetic flux control line 212 extend from the dielectric layer 3 and are connected to the first pad 22.

The first superconducting layer is provided with a first part of qubit components and a port-first bonding pad 22 for signal transmission with the first superconducting layer, and the first bonding pad 22 cannot be shielded by the dielectric layer 3.

In some embodiments of the present utility model, the second superconducting layer 4 is further formed with a second pad 42.

The signal read line 411 is connected to the second pad 42.

It can be seen that the microwave control lines 211 and the magnetic flux control lines 212 on the first superconducting layer 2 and the signal reading lines 411 on the second superconducting layer 4 can be arbitrarily crossed, that is, the projections of the microwave control lines 211, the magnetic flux control lines 212 and the signal reading lines 411 on the substrate 1 can be arbitrarily crossed. A more free and versatile routing can be achieved compared to conventional flip-chip bonding processes.

In addition, the conventional flip-chip bonding process is often configured as a layer of bonding pad surrounding the superconducting qubit, and in the embodiment provided by the utility model, due to the arrangement of the second bonding pad 42, the number of bonding pads of the flip-chip is increased compared with that of the conventional flip-chip, so that the superconducting qubit can be conveniently expanded, and the connection requirement of more signal transmission ends can be met.

Referring to fig. 3, the first pads 22 are distributed around the dielectric layer 3, and the second pads 42 are distributed around the second qubit element 41.

The utility model provides a chip packaging structure, which is used for communicating information processed by a superconducting quantum chip with the outside, so that a first bonding pad 22 is arranged around a dielectric layer 3, a larger coverage area is provided for the dielectric layer 3, threads for connecting the bonding pad with an external PCB are shortened, a second bonding pad 42 is arranged around a second qubit assembly 41, the threads for connecting the bonding pad with the external PCB are shortened while the area of the second qubit assembly 41 is enlarged, and the first bonding pad 22 and the second bonding pad 42 are not electrically connected and can be arranged at will.

In some embodiments provided by the present utility model, the thickness of the first superconductive layer 2 in the direction perpendicular to the substrate 1 is 100nm or less.

The thickness of the dielectric layer 3 in the direction perpendicular to the substrate 1 is 5 μm to 10 μm.

In order to allow the first qubit element 21 on the first superconducting layer 2 and the second qubit element 41 on the second superconducting layer 4 to be out-of-plane coupled as needed, the superconducting layer is set to 100nm or less, the dielectric layer 3 is set to 5 μm to 10 μm, and if the dielectric layer 3 is too thick, the maximum coupling distance may be exceeded, the coupling fails, and if it is too thin, it is difficult to maintain the required characteristic impedance of 50 ohms.

In some embodiments of the present utility model, microwave control lines 211 and magnetic flux control lines 212 are configured as coplanar waveguide structures;

the signal read line 411 is configured as a coplanar waveguide structure.

In the above-described structure, the microwave control line 211, the magnetic flux control line 212, and the signal reading line 411 are respectively constituted by coplanar waveguide transmission lines, and the width dimensions of the center conduction band and the ground strips on both sides of the coplanar waveguide may be in the order of micrometers. Regarding the association manner between the signal read line 411 and the read resonator, coupling is that one end of the read resonator is coupled to the signal read line 411, and one end and the signal read line 411 extend along a common preset direction. The width of the center conductor, the width of the two side ground conductors, and the gap width between the center conductor and the two side ground conductors can be freely selected as desired. The scheme ensures that the process for manufacturing the quantum chip based on the layout structure is simpler, more convenient and faster, and higher in yield.

While the foregoing is directed to embodiments of the present utility model, other and further embodiments of the utility model may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.

Claims

1. A superconducting quantum chip, comprising:

a substrate (1);

a first superconducting layer (2) disposed on the substrate (1), the first superconducting layer (2) being formed with a first qubit component (21);

-a dielectric layer (3) covering said first qubit component (21);

a second superconducting layer (4) disposed on the dielectric layer (3), the second superconducting layer (4) being formed with a second qubit assembly (41);

the first qubit component (21) and the second qubit component (41) are correspondingly arranged, and are coupled in different planes.

2. Superconducting quantum chip according to claim 1, characterized in that the first qubit component (21) comprises a microwave control line (211) and a magnetic flux control line (212), and the second qubit component (41) comprises a signal read line (411).

3. Superconducting quantum chip according to claim 2, characterized in that the first superconducting layer (2) is further formed with a first bonding pad (22), the first bonding pad (22) being located outside the dielectric layer (3) covering portion.

4. A superconducting quantum chip according to claim 3, characterized in that the microwave control lines (211) and the magnetic flux control lines (212) extend from the dielectric layer (3) in connection with the first pads (22).

5. A superconducting quantum chip according to claim 3, wherein the second superconducting layer (4) is further formed with a second bonding pad (42).

6. The superconducting quantum chip according to claim 5, wherein the signal read line (411) is connected to the second pad (42).

7. The superconducting quantum chip according to claim 5, wherein the first pads (22) are distributed around the dielectric layer (3) and the second pads (42) are distributed around the second qubit component (41).

8. Superconducting quantum chip according to claim 1, characterized in that the thickness of the first superconducting layer (2) in the direction perpendicular to the substrate (1) is 100nm or less.

9. Superconducting quantum chip according to claim 8, characterized in that the thickness of the dielectric layer (3) in the direction perpendicular to the substrate (1) is 5 μm to 10 μm.

10. The superconducting quantum chip of claim 2, wherein the microwave control line (211) and the magnetic flux control line (212) are configured as a coplanar waveguide structure;

the signal read line (411) is configured as a coplanar waveguide structure.