CN220173212U - On-chip integrated parametric amplifier and quantum computer - Google Patents
On-chip integrated parametric amplifier and quantum computer Download PDFInfo
- Publication number
- CN220173212U CN220173212U CN202321704822.9U CN202321704822U CN220173212U CN 220173212 U CN220173212 U CN 220173212U CN 202321704822 U CN202321704822 U CN 202321704822U CN 220173212 U CN220173212 U CN 220173212U
- Authority
- CN
- China
- Prior art keywords
- parametric amplifier
- signal
- integrated
- capacitor
- circulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 239000003990 capacitor Substances 0.000 claims description 29
- 230000003321 amplification Effects 0.000 claims description 22
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 22
- 230000009466 transformation Effects 0.000 claims description 6
- 238000005086 pumping Methods 0.000 claims description 2
- 230000010354 integration Effects 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 abstract description 2
- 230000008901 benefit Effects 0.000 description 8
- 238000000034 method Methods 0.000 description 6
- 239000002096 quantum dot Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 229920006395 saturated elastomer Polymers 0.000 description 5
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 238000010790 dilution Methods 0.000 description 4
- 239000012895 dilution Substances 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000007613 environmental effect Effects 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000005057 refrigeration Methods 0.000 description 2
- 241000238366 Cephalopoda Species 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Landscapes
- Microwave Amplifiers (AREA)
Abstract
The utility model discloses an on-chip integrated parametric amplifier and a quantum computer, and belongs to the field of quantum computing technology manufacturing. The on-chip integrated parametric amplifier includes an impedance matching parametric amplifier integrated into a substrate, a circulator, a coupler, and a traveling wave parametric amplifier. Wherein the coupler has a transmission line and a pump signal line coupled to each other; and the two ends of the transmission line are respectively connected with the circulator and the traveling wave parametric amplifier, and the circulator is also connected with the impedance matching parametric amplifier. The on-chip integrated parametric amplifier integrates various components to the substrate, and can have a small volume due to higher integration level, so that the space occupation can be obviously reduced.
Description
Technical Field
The utility model belongs to the field of quantum information, in particular to the field of quantum computing technology manufacturing, and particularly relates to an on-chip integrated parametric amplifier and a quantum computer.
Background
In the superconducting qubit system realized based on the Josephson junction, a reading operation and a control operation are performed on the qubit to complete quantum calculation, and therefore, various signal transmission is involved.
Wherein the output signal during the read operation of the qubit is quite weak and thus amplified. The use of an amplifier is involved. Considering that the output signal is very weak, a general amplifier may introduce noise that is difficult to control and ignore, thereby deteriorating the signal-to-noise ratio to make it difficult to obtain an effective read output signal.
Disclosure of Invention
Examples of the present utility model provide an integrated parametric amplifier and quantum computer on a chip. The scheme provides a parametric amplifier with lower noise introduction, thereby facilitating quantum computation by superconducting quantum computers based on josephson junctions. The integration level of the amplifier is high, so that the space occupation is small; and which has a higher gain.
The exemplary embodiment of the present utility model is implemented as follows.
In a first aspect, an example of the present utility model proposes an integrated parametric amplifier on chip.
It comprises the following steps:
a substrate;
an impedance matching parametric amplifier, a circulator, a coupler, and a traveling wave parametric amplifier integrated to the substrate;
the coupler is provided with a transmission line and a pumping signal line which are coupled with each other, two ends of the transmission line are respectively connected with the circulator and the traveling wave parametric amplifier, and the circulator is also connected with the impedance matching parametric amplifier;
wherein the circulator is configured to: the signal to be amplified is routed to an impedance matching parametric amplifier for amplification, and a first amplified signal formed by amplification is routed to a transmission line;
wherein the coupler is configured to: the pump signal and the first amplified signal are routed through a transmission line to a traveling wave parametric amplifier for amplification and outputting a second amplified signal that is a target signal.
In the integrated parametric amplifier on chip, various structures are integrated into a substrate. While the substrate is typically manufactured and used with a limited area. Thus, the integrated parametric amplifier on-chip may be smaller in acceptable volume, which may be of significant advantage in instances of higher integration requirements. This has greater utility in superconducting quantum computing systems through josephson junctions.
In addition, due to the combination of the impedance matching parametric amplifier and the traveling wave parametric amplifier, the advantages of the two parametric amplifiers can be combined, and the disadvantages of the two parametric amplifiers are eliminated or weakened, so that a better amplifying function is realized. For example, the impedance matching parametric amplifier is sensitive to environmental impedance, input saturated power is low, and noise is close to quantum limit; the traveling wave parametric amplifier is insensitive to the external environment, and has high input saturated power, wide gain bandwidth and relatively high noise. After the two are cascaded, the high gain and high saturation power amplifier can be obtained. According to some examples of the utility model, the circulator is a three-port device;
the circulator is configured to:
the signal to be amplified is received through one of the ports and is routed through the other of the ports to the impedance matching parametric amplifier for amplification, and the amplified first amplified signal is routed to the other of the ports and is input to the transmission line through the other of the ports.
According to some examples of the utility model, the circulator includes three josephson junctions in the loop, and a port is defined between two adjacent josephson junctions.
According to some examples of the utility model, an impedance matching parametric amplifier includes: a reflective impedance transformation line and a Josephson junction parametric amplifier connected to each other.
According to some examples of the utility model, a josephson junction parametric amplifier comprises:
the first capacitor and the superconducting quantum interferometer are respectively grounded, and the Josephson junction parametric amplifier is connected with the reflective impedance transformation line through the common terminal.
According to some examples of the utility model, a traveling wave parametric amplifier comprises: a main signal line, an amplifying unit, and a phase adjusting unit;
the amplifying unit comprises a Josephson junction connected in series with the main signal line and a second capacitor with one end connected in parallel with the main signal line and the other end grounded;
along the direction of signal flow, the second capacitor is located downstream of the josephson junction and the phase adjustment unit is located downstream of the amplification unit.
According to some examples of the utility model, the phase adjustment unit comprises: a third capacitor and a ring resonant circuit;
one end of the third capacitor is connected in parallel with the main signal line, and the other end of the third capacitor is connected with a common node of the ring resonant circuit;
the ring resonator circuit includes a fourth capacitor and an inductor that are commonly grounded and connected in parallel to a common node.
According to some examples of the utility model, the inductor is a wire inductance.
According to some examples of the utility model, each capacitor is a parallel plate capacitor.
In a second aspect, an example of the utility model proposes a quantum computer comprising an on-chip integrated parametric amplifier as claimed in the preceding claims.
The beneficial effects are that:
currently, parametric amplifiers used in superconducting quantum systems generally have a large volume, and thus occupy a limited space of a dilution refrigerator when applied to the dilution refrigerator. And such parametric amplifiers have a multitude of connection lines between the discrete devices. The longer length of these connection lines may present problems with line quality, connection stability, and may present impedance matching.
In view of such a problem, the option in the example of the present utility model is to build an amplifier in an integrated manner to a substrate. Therefore, various components can be designed and implemented with higher integration, and thus have small space occupation, and are also beneficial to configuring other components or structures in a quantum computing system. In addition, by integrating various structures, impedance design is more convenient; while the various discrete components are connected by cables, their impedance matching is relatively more difficult to match. Furthermore, the impedance matching parametric amplifier and the traveling wave parametric amplifier are combined to realize cascade use, so that complementary advantages can be realized, and the performance of the integrated parametric amplifier on the chip as a whole is improved. And because of different characteristics of the impedance matching parametric amplifier and the traveling wave parametric amplifier, the two amplifiers are cascaded on a chip, so that the advantages of low noise, high gain and high saturated power can be simultaneously obtained.
Drawings
For a clearer description, the drawings that are required to be used in the description will be briefly introduced below.
FIG. 1 is a schematic functional block diagram of an on-chip integrated parametric amplifier in an example of the utility model;
FIG. 2 is a schematic diagram of an impedance matching parametric amplifier in an example of the utility model;
FIG. 3 is a schematic diagram of a coupler in an example of the utility model;
fig. 4 is a schematic diagram of a phase adjustment unit in an example of the utility model;
fig. 5 is a schematic structural diagram of an on-chip integrated parametric amplifier in an example of the utility model.
Detailed Description
Amplifiers are commonly used in various systems involving signal transmission and reception. Which can reduce harmful signals as much as possible while amplifying useful signals. Amplifiers have some important indicators that are of interest: one, the bandwidth, i.e., the frequency range of the signal that can be effectively amplified by the amplifier; and the second gain refers to the ratio of the maximum signal energy to the minimum signal energy which can be reasonably amplified by the amplifier. The specificity of the superconducting quantum chip based on the physical implementation of josephson junctions dictates the need to use higher performance amplifiers. And it is necessary to pay attention to suppression of noise while amplifying the signal. Whereas existing amplifiers are difficult to meet practical requirements-for example, the noise introduced during their amplification has been difficult to tolerate-, a device known as a parametric amplifier can be used.
The parametric amplifier is an amplifying circuit for realizing low noise amplification by utilizing time-varying reactance parameters. The amplifier typically operates with additional noise introduced such that the signal-to-noise ratio is reduced. The parametric amplifier can provide a better noise figure.
In a quantum computing system, in order to obtain an operation result of a quantum chip, a signal output by the quantum chip, namely a qubit reading signal, needs to be collected and analyzed. The qubit read signal is usually very weak, and a multistage amplifier is generally required to be added in an output line of the qubit read signal to improve signal strength. Noise from commercial low noise amplification is not acceptable in the quantum field.
In other words, various microwave signals (in particular the read phase) are involved in the operation (read operation and control operation) due to the use of superconducting qubits in the form of josephson junctions. And these signals may be microwave and need to be amplified. Therefore, parametric amplifiers are commonly used. However, various parametric amplifiers known to the inventors are generally of a larger size, making it more and more difficult to use with increasing numbers of qubits. For example, as the number of equivalent sub-bits increases, the number of various cables required increases significantly. And these cables take up some space. The space of a dilution refrigerator used in a superconducting quantum computer is limited. Therefore, if the volume of a parametric amplifier used in a dilution refrigerator could be reduced, it would be more advantageous to perform multi-bit expansion, which would contribute to a large extent to the performance of performing quantum calculations.
In an example of the present utility model, the inventors propose an integrated parametric amplifier on chip. The components used in the amplifier are integrated on-chip so that their actual volume is effectively reduced, so that sufficient space can be reserved for the configuration of other devices. It can also be used with a low noise amplifier as a pre-stage of the low noise amplifier. For example, the quantum parametric amplifier can be used as a quantum parametric amplifier, and can show the advantage that the noise attached during operation is low to the level of the quantum limit, so that the signal-to-noise ratio of an output signal can be greatly improved.
In addition, because of the integration on the chip, the components of the amplifier can be planned and designed as a whole, so that better consistency, performance stability and the like can be achieved.
In an example, referring to fig. 1 and 5, an on-chip integrated parametric amplifier includes a substrate, and an Impedance Matching Parametric Amplifier (IMPA), a circulator, a coupler, and a Traveling Wave Parametric Amplifier (TWPA) integrated to the substrate. The on-chip integrated parametric amplifier performs amplification operation by the following general flow directions of signal flows: the signal to be amplified enters the circulator and is input into the impedance matching parametric amplifier to be amplified to form a first-stage amplified signal. The primary amplified signal is input by the circulator (via the coupler) to the traveling wave parametric amplifier for secondary amplification to form a secondary amplified signal.
The circulator is selected, for example, as a three-port device. And the circulator is configured to: the signal to be amplified is received through one of the ports (e.g., described as a first port) and routed through the other of the ports (e.g., described as a second port) to an impedance-matched parametric amplifier for amplification, and the amplified first amplified signal is routed to the other of the ports (e.g., described as a third port) and input through the other port to a next signal flow path (e.g., a transmission line in a coupler to be described later). Thus, in combination with the above signal flow, it is known that the circulator is capable of routing the signal to be amplified to the impedance matching parametric amplifier for amplification and is also capable of routing the first amplified signal formed by the amplification to the transmission line.
In a superconducting quantum computing system based on a Josephson junction, the Josephson junction can be selected to be used for constructing a circulator based on the aspects of process consistency, equipment compatibility and the like. Thus, in some examples, the circulator includes a loop and three josephson junctions. Wherein the three josephson junctions are distributed in sequence in the loop and a port is defined between two adjacent josephson junctions. Each port may also have a voltage bias input to provide the operating condition voltage of the josephson junction.
The impedance matching parametric amplifier (see fig. 2) includes a reflective impedance transformation line and a josephson junction parametric amplifier (e.g. abbreviated as JPA) connected to each other. Wherein the Josephson junction parametric amplifier comprises: the first capacitor and the superconducting quantum interferometer are connected through a common terminal, and the first capacitor and the superconducting quantum interferometer are respectively grounded. On the basis of this configuration, the josephson junction parametric amplifier is connected to the reflective impedance transformation line via this common terminal.
Wherein the coupler may utilize a branch line coupler or the like. Alternatively, the coupler may also be implemented as a parallel line coupler (as shown in fig. 3). In fig. 3, the coupler uses a transmission line structure in a curved (not necessarily, in order to arrange a transmission line in the form of a coplanar waveguide of an appropriate length in a limited space) shape. The two transmission lines are arranged adjacent to each other, and two ends of each transmission line respectively form corresponding ports; thus, the two transmission lines of the coupler have four ports in total, and are respectively a first group of ports (port 1 and port 2) belonging to one transmission line, and a second group of ports (port 3 and port 4) belonging to the other transmission line.
In some examples using parallel line couplers, the couplers have a transmission line (or described as a first coupling element) and a pump signal line (or described as a second coupling element) coupled to each other. The two ends of the transmission line are respectively connected with the circulator and the traveling wave parametric amplifier, and the circulator is also connected with the impedance matching parametric amplifier. One end of the pump signal line may be connected to the pump signal input source, while the other end is used to connect the plug. In parallel line couplers there are isolated and coupled ends. Corresponding to the aforementioned ports, there is the fact that in the coupler: port 1 is the input, port 2 is the output, port 3 is the coupling, and port 4 is the isolation. In addition, the (pump) pump signal is connected to the isolation terminal, and the plug is connected to the coupling terminal. The plug can prevent signal leakage, and energy can be consumed on the plug in time, so that signal reflection or other interference is avoided.
From the foregoing signal flow direction, it is known that a coupler can be used to: the pump signal and the first amplified signal amplified by the impedance-matched parametric amplifier are routed to the traveling-wave parametric amplifier through a transmission line in the coupler, amplified by the traveling-wave parametric amplifier, and a second amplified signal as a target signal is output. Thus, it is known that the on-chip integrated parametric amplifier enables a two-stage signal amplification.
The travelling wave parametric amplifier and the impedance matching parametric amplifier are basically consistent in manufacturing process, and the advantages of the travelling wave parametric amplifier and the impedance matching parametric amplifier can be complemented. The IMPA is sensitive to environmental impedance, input saturated power is low, and noise is close to quantum limit. TWPA is insensitive to environmental impedance, input saturated power is high, noise is relatively high compared to IMPA, and gain bandwidth is large. According to the noise cascade formula, f=f 1 +(F 2 -F 1 )/g 1 . Wherein F1 is the first stage amplifier noise and g1 is the first stage amplifier gain. Thus, the less noise the first stage amplifier is, the less noise the amplifier is overall after cascading, and in addition, the low input saturation power of the IMPA means that it is more suitable as a pre-stage amplifier.
In an example, a traveling wave parametric amplifier includes a main signal line, an amplifying unit, and a phase adjusting unit. The main signal lines constrain and normalize the flow direction of the signals. The amplifying unit and the phase adjusting unit are configured and laid out based on the main signal line. The layout sequence of the two main signal lines can be as follows: along the direction of signal flow, the second capacitor is located downstream of the josephson junction and the phase adjustment unit is located downstream of the amplification unit.
Wherein the amplifying unit comprises a josephson junction and a second capacitor. And the josephson junction is connected in series with the main signal line; meanwhile, one end of the second capacitor is connected in parallel with the main signal line, and the other end of the second capacitor is grounded. In other examples, the josephson junctions in the amplifying unit may also be replaced with SQUIDs.
Referring to fig. 4, the phase adjusting unit in the traveling wave parametric amplifier may include: a third capacitor and a ring resonant circuit. One end of the third capacitor is connected with the main signal line in parallel, and the other end of the third capacitor is connected with a common node of the ring resonant circuit. Correspondingly, the ring resonator circuit comprises a fourth capacitor (e.g. a parallel plate capacitor) and an inductor (which may be a line inductance, such as a coil; or a component capable of providing an equivalent inductance, etc.) which are connected in common to ground and in parallel to a common node.
Typically, the phase change that exists after the signal passes through the josephson junction in the amplifying unit is taken into account. After the signal is amplified by the amplifying unit, the phase adjustment unit is used for adjusting the phase of the signal. In general, it is optional to configure one phase adjustment unit correspondingly downstream of each amplification unit along the signal stream. However, given that the size of the josephson junction is too small relative to the phase adjustment unit, the corresponding layout may be very large if the amplifying unit and the phase adjustment unit, so that the chip size may be undesirably increased, which is generally desirable to avoid. Thus, in some examples, one phase adjustment unit may be configured for each three josephson junctions; thus, the phase adjustment can be completed, and the process is convenient to realize.
In summary of the foregoing, in an example, the inventors disclose integrating two amplifier structures, IMPA and TWPA, on a sheet (substrate), and cooperatively using structures such as circulators, couplers. The inventors have provided by this approach (integrated on-chip integrated parametric amplifiers) a device with significant space-volume advantages over other amplifiers with large volume sizes manufactured using discrete devices of various independent functional units, and preferably also to control noise to very low levels while achieving good amplification.
As an example of application of the on-chip integrated parametric amplifier, a quantum computer may be implemented. Which may include quantum chips, refrigeration systems, and signal systems (e.g., including a read system, and into which an on-chip integrated parametric amplifier may be incorporated), etc. In the quantum computer, the upper integrated parametric amplifier can be configured into a refrigeration system and connected to a corresponding port of the quantum chip for efficient transmission of signals between the signal system and the quantum chip.
The embodiments described above by referring to the drawings are exemplary only for explaining the present utility model and are not to be construed as limiting the present utility model.
For purposes of clarity, technical solutions, and advantages of embodiments of the present utility model, one or more embodiments have been described above with reference to the accompanying drawings. Wherein like reference numerals are used to refer to like elements throughout. In the description above, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more embodiments. It may be evident, however, that one or more embodiments may be practiced without these specific details, and that such embodiments may be incorporated by reference herein without departing from the scope of the claims.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present utility model and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the utility model described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
While the foregoing is directed to embodiments of the present utility model, other and further embodiments of the utility model may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Claims (10)
1. An integrated parametric amplifier on a chip, comprising:
a substrate;
an impedance matching parametric amplifier, a circulator, a coupler, and a traveling wave parametric amplifier integrated to the substrate;
the coupler is provided with a transmission line and a pumping signal line which are coupled with each other, two ends of the transmission line are respectively connected with the circulator and the traveling wave parametric amplifier, and the circulator is also connected with the impedance matching parametric amplifier;
wherein the circulator is configured to: the signal to be amplified is routed to an impedance matching parametric amplifier for amplification, and a first amplified signal formed by amplification is routed to a transmission line;
wherein the coupler is configured to: the pump signal and the first amplified signal are routed through a transmission line to a traveling wave parametric amplifier for amplification and outputting a second amplified signal that is a target signal.
2. The integrated parametric amplifier on chip of claim 1, wherein the circulator is a three-port device;
the circulator is configured to:
the signal to be amplified is received through one of the ports and is routed through the other of the ports to the impedance matching parametric amplifier for amplification, and the amplified first amplified signal is routed to the other of the ports and is input to the transmission line through the other of the ports.
3. The integrated parametric amplifier on chip of claim 2, wherein the circulator comprises three josephson junctions in a loop, and a port is defined between two adjacent josephson junctions.
4. The integrated parametric amplifier of claim 1, wherein the impedance matching parametric amplifier comprises: a reflective impedance transformation line and a Josephson junction parametric amplifier connected to each other.
5. The integrated parametric amplifier on chip of claim 4, wherein the josephson junction parametric amplifier comprises:
the first capacitor and the superconducting quantum interferometer are respectively grounded, and the Josephson junction parametric amplifier is connected with the reflective impedance transformation line through the common terminal.
6. The integrated parametric amplifier of claim 1, wherein the traveling wave parametric amplifier comprises: a main signal line, an amplifying unit, and a phase adjusting unit;
the amplifying unit comprises a Josephson junction connected in series with a main signal line, and a second capacitor with one end connected in parallel with the main signal line and the other end grounded;
along the direction of signal flow, the second capacitor is located downstream of the josephson junction and the phase adjustment unit is located downstream of the amplification unit.
7. The integrated parametric amplifier on chip of claim 6, wherein the phase adjustment unit comprises: a third capacitor and a ring resonant circuit;
one end of the third capacitor is connected in parallel with the main signal line, and the other end of the third capacitor is connected with a common node of the ring resonant circuit;
the ring resonator circuit includes a fourth capacitor and an inductor that are commonly grounded and connected in parallel to the common node.
8. The integrated parametric amplifier of claim 7, wherein the inductor is a line inductor.
9. An integrated parametric amplifier on chip as claimed in any one of claims 5 to 8, wherein each capacitor is a parallel plate capacitor.
10. A quantum computer comprising an on-chip integrated parametric amplifier as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321704822.9U CN220173212U (en) | 2023-06-29 | 2023-06-29 | On-chip integrated parametric amplifier and quantum computer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321704822.9U CN220173212U (en) | 2023-06-29 | 2023-06-29 | On-chip integrated parametric amplifier and quantum computer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220173212U true CN220173212U (en) | 2023-12-12 |
Family
ID=89063097
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321704822.9U Active CN220173212U (en) | 2023-06-29 | 2023-06-29 | On-chip integrated parametric amplifier and quantum computer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220173212U (en) |
-
2023
- 2023-06-29 CN CN202321704822.9U patent/CN220173212U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6236272B1 (en) | Traveling wave power combiner and radio base station | |
| CN101803181A (en) | multi-way doherty amplifier | |
| JP2021506045A (en) | Compact multipolar qubit measurement filter | |
| US5017886A (en) | RF power combiner using baluns | |
| CN201846313U (en) | Millimeter wave monolithic integrated power amplifier | |
| CN111211805A (en) | Balanced radio frequency front end receiving and transmitting circuit, system and control method thereof | |
| WO2024141109A1 (en) | Power amplifier circuit | |
| CN114513173A (en) | Radio frequency power amplifier and application thereof | |
| US10804874B2 (en) | Superconducting combiner or separator of DC-currents and microwave signals | |
| CN108631734A (en) | A kind of millimeter wave broadband frequency mixer based on multiple coupled transmission line | |
| CN220173212U (en) | On-chip integrated parametric amplifier and quantum computer | |
| US4823096A (en) | Variable ratio power divider/combiner | |
| CN112073023A (en) | Novel broadband high-balance balun | |
| CN110311201A (en) | A kind of reversed-phase power combiner | |
| CN110445471B (en) | Dual-band reconfigurable radio frequency power amplifier and control method thereof | |
| Ho et al. | Slotline annular ring elements and their applications to resonator, filter and coupler design | |
| CN117498807A (en) | Monolithic integrated harmonic quadrature down mixer based on novel multifunctional mixed junction | |
| CN220173211U (en) | Impedance matching parametric amplifier, component and quantum computer | |
| CN221149356U (en) | Quantum device and reading system of quantum bit signal | |
| CN114094963A (en) | Gain-enhanced distributed amplifier structure | |
| CN114499456A (en) | Broadband orthogonal signal generator based on two-stage hybrid | |
| CN118315787B (en) | Signal processing method and on-chip circulator | |
| WO2024066565A1 (en) | Amplifier circuit, chip, and quantum bit reading system | |
| CN215989172U (en) | Directional coupling circuit, directional coupler and directional coupling system | |
| Amado-Rey et al. | Analysis of 4-way divider MMICs in GaAs technology for H-band applications |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |