CN220122786U

CN220122786U - Anti-sparking circuit and electronic equipment

Info

Publication number: CN220122786U
Application number: CN202321646903.8U
Authority: CN
Inventors: 钟金亮; 曹凌志
Original assignee: Shenzhen Confident Technology Co ltd
Current assignee: Shenzhen Confident Technology Co ltd
Priority date: 2023-06-27
Filing date: 2023-06-27
Publication date: 2023-12-01
Anticipated expiration: 2033-06-27

Abstract

The utility model discloses an anti-sparking circuit and an electronic device, wherein the anti-sparking circuit comprises: a power input connected to the power adapter; the power supply output end is connected with the power supply input end and is used for receiving the level signal of the power supply input end; and the switch module is arranged between the power input end and the power output end and is used for receiving a level signal which is transmitted from the power input end and is turned on or off so as to turn on or off the connection between the power input end and the power output end. The circuit layout is simple, and on the basis of not affecting the circuit performance, the residual charge on the delay module is quickly discharged through the additionally arranged discharging module, so that the delay module can be used normally, the switch module is slowly conducted, the sparking phenomenon caused by excessive current at the moment of electrification is avoided, and the sparking prevention effect is truly realized in the state that the direct-current power supply adapter is quickly contacted with and separated from the power supply input end.

Description

Anti-sparking circuit and electronic equipment

Technical Field

The present utility model relates to the field of electronic circuits, and in particular, to an anti-sparking circuit and an electronic device.

Background

By "sparking" it is meant that the dc power adapter, in the energized state, makes contact with a non-energized device and a spark occurs at the plug for contact. The occurrence of a fire in an electronic device may cause interference with some critical electronic devices, thereby causing malfunction of the device with unpredictable consequences. Therefore, it is a necessary requirement to eliminate the sparking phenomenon of the electronic equipment.

In the prior art, an NTC negative temperature thermistor is connected in series to a main power supply loop. When the thermistor is in a cold state, the spark-over protection function can be achieved, and when the thermistor is in a hot state, sparks still occur. In addition, the thermistor is a high-power consumption device, and has a large influence on the whole temperature.

There is also a way to delay the time of capacitor to make the FET conduct slowly, so as to eliminate the power-on sparking phenomenon of the device. However, this simple circuit is only effective when there is no residual charge on the capacitor. When residual charges exist on the capacitor, the field effect transistor is in a conducting state at the moment, so that the effect of preventing ignition cannot be achieved, namely if a direct current power plug is quickly plugged, the time interval of plugging is about tens of milliseconds, and sparks still exist at the moment.

Disclosure of Invention

Aiming at the technical problems, the embodiment of the utility model aims to provide an anti-sparking circuit and electronic equipment, which are used for solving the problem of sparking phenomenon when a direct current power plug is quickly plugged.

An object of an embodiment of the present utility model is to provide an anti-sparking circuit, including:

a power input connected to the power adapter;

the power supply output end is connected with the power supply input end and is used for receiving the level signal of the power supply input end;

the switch module is arranged between the power input end and the power output end and is used for receiving a level signal which is transmitted from the power input end and is turned on or off so as to turn on or off the connection between the power input end and the power output end;

the voltage division module is arranged between the switch module and the power input end, and is used for preventing high voltage from breaking down the switch module and stabilizing a level signal transmitted to the switch module;

the delay module is arranged between the voltage dividing module and the switch module and used for controlling the conduction speed of the switch module;

and the discharging module is arranged between the power input end and the voltage dividing module and is used for rapidly discharging the charge of the delay module so as to prevent the delay module from having residual charge.

As an optional embodiment, the switch module adopts an NMOS field effect transistor, a gate of the NMOS field effect transistor is connected with the voltage dividing module and the delay module, a source of the NMOS field effect transistor is connected with a cathode of the power input end, and a drain of the NMOS field effect transistor is connected with a cathode of the power output end.

As an optional embodiment, the voltage dividing module includes a fifth resistor and a fourth resistor, where an anode of the power input end and an anode of the power output end are connected with one end of the fifth resistor, the other end of the fifth resistor is connected with the gate of the NMOS field effect transistor, the gate of the NMOS field effect transistor is connected with one end of the fourth resistor, and the other end of the fourth resistor is connected with the cathode of the power input end.

As an optional embodiment, the delay module is a capacitor, one end of the fourth resistor is connected to one end of the capacitor between the gate of the NMOS field-effect transistor, and the other end of the fourth resistor is connected to the other end of the capacitor between the source of the NMOS field-effect transistor.

As an alternative embodiment, the discharging module includes:

the voltage dividing piece comprises a first resistor and a second resistor, one end of the first resistor is connected with the positive electrode of the power input end, and one end of the second resistor is connected with the negative electrode of the power input end;

one end of the switch piece is respectively connected with the other end of the first resistor and the other end of the second resistor, and the other end of the switch piece is connected with the voltage dividing module;

and one end of the current limiting piece is connected with the switch piece, and the other end of the current limiting piece is connected with the negative electrode of the power input end and is used for limiting the current of a circuit.

As an alternative embodiment, the switch element adopts a PNP transistor or a PMOS field effect transistor.

As an optional embodiment, a sixth resistor is disposed between the PNP transistor and the NMOS field effect transistor.

As an alternative embodiment, the anti-ignition circuit further includes:

the protection module is arranged between the voltage dividing module and the power supply output end and is used for being isolated from the power supply output end so as to accelerate the discharging speed.

As an alternative embodiment, the protection module employs a diode.

The embodiment of the utility model also aims to provide electronic equipment which comprises the anti-ignition circuit.

The embodiment of the utility model has the beneficial effects that:

the circuit layout is simple, and on the basis of not affecting the circuit performance, the residual charge on the delay module is quickly discharged through the additionally arranged discharging module, so that the delay module can be used normally, the switch module is slowly conducted, the sparking phenomenon caused by excessive current at the moment of electrification is avoided, and the sparking prevention effect is truly realized in the state that the direct-current power supply adapter is quickly contacted with and separated from the power supply input end.

Drawings

FIG. 1 is a schematic circuit diagram of an embodiment 1 of the present utility model;

FIG. 2 is a schematic circuit diagram of embodiment 2 of the present utility model;

fig. 3 is a circuit diagram of embodiment 3 of the present utility model.

Reference numerals:

VIN, power input; VOUT, power supply output; r1, a first resistor; r2, a second resistor; r3, a third resistor; q1, a switch piece; r4, a fourth resistor; r5, a fifth resistor; c1, capacitance; q2, a switch module.

Detailed Description

Various aspects and features of the present utility model are described herein with reference to the accompanying drawings.

It should be understood that various modifications may be made to the embodiments of the application herein. Therefore, the above description should not be taken as limiting, but merely as exemplification of the embodiments. Other modifications within the scope and spirit of the utility model will occur to persons of ordinary skill in the art.

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and, together with a general description of the utility model given above, and the detailed description of the embodiments given below, serve to explain the principles of the utility model.

These and other characteristics of the utility model will become apparent from the following description of a preferred form of embodiment, given as a non-limiting example, with reference to the accompanying drawings.

It is also to be understood that, although the utility model has been described with reference to some specific examples, those skilled in the art can certainly realize many other equivalent forms of the utility model.

The above and other aspects, features and advantages of the present utility model will become more apparent in light of the following detailed description when taken in conjunction with the accompanying drawings.

Specific embodiments of the present utility model will be described hereinafter with reference to the accompanying drawings; however, it is to be understood that the disclosed embodiments are merely exemplary of the utility model, which can be embodied in various forms. Well-known and/or repeated functions and constructions are not described in detail to avoid obscuring the utility model in unnecessary or unnecessary detail. Therefore, specific structural and functional details disclosed herein are not intended to be limiting, but merely as a basis for the claims and as a representative basis for teaching one skilled in the art to variously employ the present utility model in virtually any appropriately detailed structure.

The specification may use the word "in one embodiment," "in another embodiment," "in yet another embodiment," or "in other embodiments," which may each refer to one or more of the same or different embodiments in accordance with the utility model.

Example 1

An objective of an embodiment of the present utility model is to provide an anti-sparking circuit, as shown in fig. 1, where the anti-sparking circuit includes a power input terminal VIN, a power output terminal VOUT, a switch module Q2, a voltage dividing module, a delay module and a discharging module.

The power input end VIN is connected with the power adapter, and the power of the power adapter can be direct power of any voltage. The power output terminal VOUT is connected to the power input terminal VIN, and is configured to receive a level signal of the power input terminal VIN.

The switch module Q2 is disposed between the power input terminal VIN and the power output terminal VOUT, and is configured to receive a level signal transmitted from the power input terminal VIN and turned on or off, so as to turn on or off the connection between the power input terminal VIN and the power output terminal VOUT.

The voltage dividing module is disposed between the switch module Q2 and the power input terminal VIN, and is configured to prevent high voltage from breaking down the switch module Q2 and stabilize a level signal transmitted to the switch module Q2. The delay module is arranged between the voltage division module and the switch module Q2 and is used for controlling the conduction speed of the switch module Q2.

The discharging module is arranged between the power input end VIN and the voltage dividing module and is used for rapidly discharging the charges of the delay module so as to prevent the delay module from having residual charges.

Before use, the two ends of the power input end VIN, the power output end VOUT and the delay module have no residual charges.

When the direct-current power supply adapter is used, when the direct-current power supply adapter is connected with the power input end VIN, the positive pole and the negative pole of the power supply of the input end are electrified firstly, and the delay module is arranged in the circuit, so that the delay module is required to be charged through the voltage dividing module until the voltage at the two ends of the delay module is larger than the starting voltage of the switch module Q2, the switch module Q2 is connected with the power input end VIN and the power output end VOUT, and the phenomenon of ignition in the circuit can be avoided.

After the direct-current power supply adapter is used, the direct-current power supply adapter is separated from the power supply input end VIN, and the discharging module rapidly discharges the delay module, so that residual charges do not exist in the delay module, and the delay module can normally function when the direct-current power supply adapter is connected with the equipment power supply input end VIN again.

According to the utility model, the residual charges on the delay module are rapidly discharged through the additionally arranged discharging module, so that the delay module can be normally used, the switch module Q2 is slowly conducted, the sparking phenomenon caused by excessive current at the moment of electrification is avoided, and the sparking prevention effect is truly realized in the state that the direct-current power adapter is rapidly contacted with and separated from the power input end VIN.

As an alternative embodiment, the switch module Q2 is an NMOS field effect transistor, a gate of the NMOS field effect transistor is connected to the voltage dividing module and the delay module, a source of the NMOS field effect transistor is connected to the negative electrode of the power input terminal VIN, and a drain of the NMOS field effect transistor is connected to the negative electrode of the power output terminal VOUT.

Specifically, the NMOS field-effect transistor is disposed between the negative electrode of the power input terminal VIN and the negative electrode of the power output terminal VOUT, and connects the two terminals, so as to control the connection and disconnection between the negative electrode of the power input terminal VIN and the negative electrode of the power output terminal VOUT, that is, control the connection and disconnection between the power input terminal VIN and the power output terminal VOUT.

As an optional embodiment, the voltage dividing module includes a fifth resistor R5 and a fourth resistor R4, where an anode of the power input terminal VIN and an anode of the power output terminal VOUT are connected to one end of the fifth resistor R5, another end of the fifth resistor R5 is connected to a gate of the NMOS field effect transistor, the gate of the NMOS field effect transistor is connected to one end of the fourth resistor R4, and another end of the fourth resistor R4 is connected to a cathode of the power input terminal VIN.

Specifically, the control voltage of the gate of the NMOS field-effect transistor is generated through the fourth resistor R4 and the fifth resistor R5, so that the voltage is not too high and exceeds the highest voltage that the gate of the NMOS field-effect transistor can bear. Under normal conditions, when the voltage of the control voltage is higher than the starting voltage of the NMOS field effect transistor, the NMOS field effect transistor is conducted; when the voltage of the control voltage is lower than the starting voltage of the NMOS field effect transistor, the NMOS field effect transistor is turned off.

As an optional embodiment, the delay module is a capacitor C1, one end of the fourth resistor R4 is connected to one end of the capacitor C1 between the gate of the NMOS field-effect transistor, and the other end of the fourth resistor R4 is connected to the other end of the capacitor C1 between the source of the NMOS field-effect transistor and the other end of the fourth resistor R4.

Specifically, the capacitor C1 is a charging capacitor C1, and is connected to the voltage dividing module, so as to control the speed of the voltage of the gate of the NMOS field effect transistor reaching the turn-on voltage of the NMOS field effect transistor.

As an alternative embodiment, the discharging module includes a dividing member, a switching member Q1, and a current limiting member.

The voltage divider comprises a first resistor R1 and a second resistor R2, one end of the first resistor R1 is connected with the positive electrode of the power input end VIN, and one end of the second resistor R2 is connected with the negative electrode of the power input end VIN.

One end of the switch piece Q1 is connected with the other end of the first resistor R1 and the other end of the second resistor R2 respectively, and the other end of the switch piece Q1 is connected with the voltage dividing module.

One end of the current limiting piece is connected with the switch piece Q1, and the other end of the current limiting piece is connected with the negative electrode of the power input end VIN and used for limiting the current of a circuit.

As an alternative embodiment, the switching element Q1 is a PNP transistor. Specifically, the gate of the NMOS field effect transistor is connected to the emitter of the PNP transistor, the base of the PNP transistor is connected to the positive electrode of the power input terminal VIN through the first resistor R1 and to the negative electrode of the power input terminal VIN through the second resistor R2, and the collector of the PNP transistor is connected to the negative electrode of the power input terminal VIN through the third resistor R3.

In this embodiment, the PNP transistor and the NMOS fet are directly connected. In addition, the PNP transistor and the NMOS field effect transistor may be indirectly connected through a sixth resistor. When the sixth resistor is used for indirect connection, the sixth resistor can also play a role in regulating discharge current, which is equivalent to that the third resistor R3 is replaced by an emitter from a collector of the PNP triode, wherein the sixth resistor and the third resistor R3 can be alternatively or simultaneously arranged.

Specifically, the discharging module can quickly pull down the voltage of the grid electrode of the NMOS field effect transistor, so that the NMOS field effect transistor is turned off.

The first resistor R1 and the second resistor R2 generate a control voltage of the base electrode of the PNP transistor to control on/off of the PNP transistor. When the power input end VIN is provided with power input, the PNP type triode is cut off when the control voltage is higher than the voltage of the base electrode of the PNP type triode; when the power input terminal VIN has no power input, the voltage at the connection point of the first resistor R1 and the second resistor R2 is zero, so that the PNP transistor is turned on. And, the third resistor R3 is a discharge resistor for controlling a discharge current. When the PNP type triode is conducted, the conducting current is smaller than the current value which can be born by the PNP type triode.

Example 2

Based on embodiment 1, as shown in fig. 2, the switching element Q1 may also be a PMOS field effect transistor. Specifically, the source of the PMOS field-effect transistor is connected to the positive electrode of the power input terminal VIN through the first resistor R1 and to the negative electrode of the power input terminal VIN through the second resistor R2, and the drain of the PMOS field-effect transistor is connected to the negative electrode of the power input terminal VIN through the third resistor R3. The grid electrode of the PMOS field effect transistor is connected with the grid electrode of the NMOS field effect transistor.

Example 3

On the basis of embodiment 1, as shown in fig. 3, the ignition preventing circuit further includes a protection module, where the protection module is disposed between the voltage dividing module and the power output terminal VOUT and is used to isolate the voltage dividing module from the power output terminal VOUT so as to accelerate the discharge speed. Specifically, the protection module adopts a diode.

Example 4

An object of an embodiment of the present utility model is to provide an electronic device including the ignition preventing circuit described above, based on any of embodiments 1 to 3. When in use, the anti-sparking circuit has three states, namely a first state, a second state and a third state, and the three states are as follows.

First state: when the electronic equipment is not electrified for a long time, the two ends of the positive electrode and the negative electrode of the power output end VOUT have no residual charges, the two ends of the capacitor C1 have no residual charges, and the two ends of the positive electrode and the negative electrode of the power input end VIN have no residual charges.

Second state: when the direct current power adapter contacts with the power input end VIN of the electronic equipment, the anode and the cathode of the power input end VIN are electrified firstly, and at the moment, the capacitor C1 needs to be charged through the fifth resistor R5 because of the existence of the capacitor C1, and the NMOS field effect transistor is conducted only when the voltage at the two ends of the capacitor C1 is larger than the starting voltage of the grid electrode of the NMOS field effect transistor. In so doing, the sparking is eliminated.

The voltage of the base electrode of the PNP triode is the voltage which is input from the power input end VIN to the first resistor R1 and the second resistor R2 after voltage division, and the voltage of one end of the capacitor C1 and the voltage of the grid electrode of the NMOS field effect transistor are also the voltage of the emitter electrode of the PNP triode.

When the power input end VIN is electrified, the voltage of the base electrode of the PNP triode is higher than that of the emitter electrode of the PNP triode, and the collector electrode and the emitter electrode of the PNP triode are not conducted.

Third state: then the direct current power adapter is separated from the power input end VIN of the electronic equipment, the base electrode of the PNP triode is equivalent to zero potential, at the moment, the collector electrode and the emitter electrode of the PNP triode are conducted, and charges at two ends of the capacitor C1 are rapidly discharged through the emission set and the collection set of the PNP triode, so that the potential is rapidly low.

Then, when the dc power adapter is again contacted with the power input terminal VIN of the electronic device, the charges at the two ends of the capacitor C1 are all discharged, and at this time, the state of the electronic device corresponds to the second state, and the capacitor C1 can be normally used to play a role of time delay. Therefore, when the direct-current power adapter is in quick contact with and is quickly separated from the power input end VIN, the capacitor C1 can be normally used, and the effect of preventing ignition is truly achieved.

The above embodiments are only exemplary embodiments of the present utility model and are not intended to limit the present utility model, the scope of which is defined by the claims. Various modifications and equivalent arrangements of this utility model will occur to those skilled in the art, and are intended to be within the spirit and scope of the utility model.

Claims

1. An anti-sparking circuit, comprising:

a power input connected to the power adapter;

2. The anti-sparking circuit as claimed in claim 1, wherein said switching module is an NMOS field effect transistor, a gate of said NMOS field effect transistor is connected to said voltage dividing module and said delay module, a source of said NMOS field effect transistor is connected to a negative electrode of said power supply input terminal, and a drain of said NMOS field effect transistor is connected to a negative electrode of said power supply output terminal.

3. The anti-sparking circuit as claimed in claim 2, wherein said voltage dividing module comprises a fifth resistor and a fourth resistor, wherein a positive electrode of said power input terminal and a positive electrode of said power output terminal are connected with one end of said fifth resistor, the other end of said fifth resistor is connected with a gate of said NMOS field effect transistor, a gate of said NMOS field effect transistor is connected with one end of said fourth resistor, and the other end of said fourth resistor is connected with a negative electrode of said power input terminal.

4. The anti-sparking circuit as claimed in claim 3, wherein said delay module is a capacitor, one end of said fourth resistor is connected to one end of said capacitor between said gate of said NMOS field effect transistor, and the other end of said fourth resistor is connected to the other end of said capacitor between said source of said NMOS field effect transistor.

5. An anti-ignition circuit as recited in claim 4, wherein said discharge module comprises:

6. An anti-ignition circuit as recited in claim 5, wherein said switching element is a PNP transistor or a PMOS field effect transistor.

7. The anti-sparking circuit of claim 6 wherein a sixth resistor is provided between said PNP transistor and said NMOS fet.

8. An anti-sparking circuit as claimed in claim 1, wherein said anti-sparking circuit further comprises:

9. An anti-ignition circuit as recited in claim 8, wherein said protection module employs a diode.

10. An electronic device comprising an anti-ignition circuit as claimed in any one of claims 1 to 9.