CN220121193U - Dual temperature coefficient low dropout linear voltage regulator circuit and power amplifier circuit thereof - Google Patents

Abstract

The utility model provides a dual temperature coefficient low dropout linear regulator LDO circuit and a power amplifier circuit thereof, wherein the LDO circuit comprises: a buffer configured to receive an input reference signal and an output thereof is connected to the temperature coefficient adjustment resistor; a temperature coefficient adjusting resistor configured between an output terminal of the buffer and an input terminal of the LDO unit; a temperature coefficient adjustment circuit comprising a current output port and a current drawing port configured to have different temperature coefficients, and the current output port or the current drawing port is connected to an input of the LDO unit by controlling the switching circuit; and an LDO unit having an input terminal connected to the temperature coefficient adjusting resistor and the control switching circuit and an output terminal connected to an output terminal of the LDO circuit.

Description

Dual temperature coefficient low dropout linear voltage regulator circuit and power amplifier circuit thereof

Technical Field

The present utility model relates to the field of analog integrated circuit design, and more particularly, to a dual temperature coefficient low dropout linear regulator (LDO) circuit and a PA circuit including the same.

Background

Low dropout linear regulators (LDOs) with temperature coefficients are widely used in many electronic devices, especially for applications requiring a stable supply voltage. The LDO with temperature coefficient can automatically adjust the output voltage to adapt to different temperature environments, so that more stable power supply voltage is provided, and the performance and reliability of the device are improved. In a Power Amplifier (PA) design, using LDOs with temperature coefficients may provide several benefits: (1) improving the temperature stability of the power amplifier: due to the influence of the temperature coefficient, the LDO with the temperature coefficient can automatically adjust the output voltage to offset the influence of the temperature on the power supply voltage, so that the temperature stability of the power amplifier is improved; (2) improving output stability: the LDO with the temperature coefficient can automatically adjust the output voltage at different temperatures, so that the stable output voltage is maintained, and the output stability of the power amplifier is improved; (3) improving reliability of the system: the LDO with temperature coefficient can reduce the fluctuation of power supply voltage in the system and the instability of the output of the power amplifier, thereby improving the reliability and the anti-interference capability of the system. In summary, the use of LDOs with temperature coefficients can improve the temperature stability, output stability and reliability of the system in the design of power amplifiers, thereby having an important role in improving the performance and reliability of the power amplifiers.

In conventional PA circuit designs, LDOs are configured to have a single temperature coefficient. The LDO temperature coefficient is typically adjusted by selecting different input reference voltages, typically from the output of a bandgap reference source, where the temperature coefficient may be positive, negative, or zero. A dual temperature coefficient LDO designed as a special LDO can provide both positive and negative temperature coefficient outputs in different temperature intervals. Such LDOs are typically composed of two different types of regulators (regulators), each having a different temperature coefficient. For example, the first regulator in a dual temperature coefficient LDO typically has a positive temperature coefficient, which can be used to provide higher voltage stability in low temperature environments; while the second regulator typically has a negative temperature coefficient and can be used to provide lower voltage stability in high temperature environments. In the intermediate temperature range, the two regulators can operate simultaneously to provide a smoother output voltage. The range of applications for dual temperature coefficient LDOs is very wide, especially in applications requiring operation in extreme temperature environments. For example, in the fields of aerospace, automotive and industrial control, dual temperature coefficient LDOs may be used to provide high precision, high reliability supply voltage outputs.

In a power amplifier PA design, the use of LDOs with dual temperature coefficients may bring several benefits: (1) higher output stability: an LDO with a dual temperature coefficient may provide a more stable output voltage over a wider temperature range than an LDO with a single temperature coefficient, e.g., at low temperatures, the LDO may provide a voltage output with a positive temperature coefficient, while at high temperatures, it may provide a voltage output with a negative temperature coefficient to maintain a more stable output voltage at different temperatures; (2) higher temperature stability: the LDO with double temperature coefficients can automatically adjust the output voltage according to the ambient temperature, so that the temperature stability of the system is improved, for example, at low temperature, the LDO can increase the output voltage to offset the influence of the temperature, and at high temperature, the LDO can decrease the output voltage to keep the output stable; (3) higher noise immunity: LDOs with dual temperature coefficients can cancel the effect of power supply noise on the output, thereby improving the noise immunity of the system (this is important in PA design because power amplifiers are very sensitive to power supply noise); (4) higher reliability: the LDO with double temperature coefficients can reduce the fluctuation of power supply voltage in the system and reduce the instability of the output of the power amplifier, thereby improving the reliability and the anti-interference capability of the system. In summary, the use of LDOs with dual temperature coefficients can improve output stability, temperature stability, noise immunity and reliability in power amplifier design, thereby having an important role in improving the performance and reliability of the power amplifier.

However, there are some difficulties in designing a dual temperature coefficient LDO compared to a single temperature coefficient LDO, which need to consider the effects of: (1) matching of temperature coefficients: since the dual temperature coefficient LDO has two temperature coefficients, it is necessary to ensure that the matching degree of the two temperature coefficients is very high, otherwise, the output voltage drift is unstable; (2) selection of a temperature range: to implement a dual temperature coefficient LDO, two different temperature ranges need to be selected, and improper selection may cause instability of the system or discontinuity of the output voltage; (3) complexity of circuit design: the dual temperature coefficient LDO requires more circuitry to achieve control of both temperature coefficients, which increases complexity and manufacturing cost of the circuit design; and (4) stability considerations: when using the dual temperature coefficient LDO, the stability problem needs to be noted, and since the dual temperature coefficient LDO has more control circuits, the problem of stability of the output voltage needs to be considered in design, so as to ensure that the circuit can maintain stable output voltages at different temperatures. Therefore, in designing the LDO with dual temperature coefficients, special attention is required to be paid to the influence of the above factors, and corresponding measures are taken to solve the problems, so as to ensure the stability and reliability of the circuit.

Disclosure of Invention

The utility model provides a dual temperature coefficient LDO circuit, which comprises: the temperature coefficient adjusting circuit, the buffer, the temperature coefficient adjusting resistor and the LDO unit. By configuring different output ports of the temperature coefficient regulating circuit, the LDO output voltage Vout can have double temperature coefficients in various forms. The use of LDOs with dual temperature coefficients can improve output stability, temperature stability, noise immunity and reliability in power amplifier design, thereby having an important role in improving power amplifier performance and reliability.

An aspect of the present utility model proposes a dual temperature coefficient LDO circuit comprising: a buffer configured to receive an input reference signal and an output thereof is connected to the temperature coefficient adjustment resistor; a temperature coefficient adjusting resistor configured between an output terminal of the buffer and an input terminal of the LDO unit; a temperature coefficient adjustment circuit comprising a current output port and a current drawing port configured to have different temperature coefficients, and the current output port or the current drawing port is connected to an input of the LDO unit by controlling the switching circuit; and an LDO unit having an input terminal connected to the temperature coefficient adjusting resistor and the control switching circuit and an output terminal connected to an output terminal of the LDO circuit.

An aspect of the present utility model proposes a dual temperature coefficient LDO circuit, wherein the temperature coefficient adjusting circuit comprises a reference current mirror circuit, an adjusting current mirror circuit, a current providing current mirror circuit and a current drawing current mirror circuit, wherein a first current branch of the reference current mirror circuit is connected with a reference current source, and a second current branch thereof is connected to a first current node; a third current branch of the regulated current mirror circuit is connected to the regulated current source, and a fourth current branch thereof is connected to the first current node; a fifth current branch of the current providing current mirror circuit is connected to the first current node, a sixth current branch thereof is connected to the second current node, and a seventh current branch thereof is connected to the current output port; and an eighth current leg of the current drawing current mirror circuit is connected to the second current node and a ninth current leg thereof is connected to the current drawing port, and wherein the second current leg of the reference current mirror circuit and the fifth current leg of the current providing current mirror circuit provide current to the third current leg of the regulating current mirror circuit; and wherein the sixth current leg of the current providing current mirror circuit and the eighth current leg of the current drawing current mirror circuit form a current path between the supply voltage to the ground node.

An aspect of the utility model proposes a dual temperature coefficient LDO circuit, wherein the regulating current mirror circuit comprises a first NMOS transistor and a first NMOS transistor, the reference current mirror circuit comprises a first PMOS transistor and a second PMOS transistor, the current providing current mirror circuit comprises a third PMOS transistor, a fourth PMOS transistor and a fifth PMOS transistor, and the current drawing current mirror circuit comprises a third NMOS transistor and a fourth NMOS transistor, wherein the regulating current source is connected to the drain and the gate of the first NMOS transistor, the source of the first NMOS transistor is grounded, the source of the second NMOS transistor is connected to ground, and the drain of the second NMOS transistor is connected to the gate of the first NMOS transistor, the drain of the second NMOS transistor is connected to the drain of the second PMOS transistor, the source of the first PMOS transistor is connected to the power supply voltage node, the second PMOS transistor is connected to the gate of the first PMOS transistor, and the gate of the first PMOS transistor is connected to the reference current source, the gate of the third PMOS transistor is connected to the drain of the second PMOS transistor, the drain of the fourth PMOS transistor is connected to the drain of the third PMOS transistor, the drain of the fourth PMOS transistor is connected to the drain of the fourth PMOS transistor, and the drain of the fourth PMOS transistor is connected to the source of the fourth PMOS transistor is connected to the power supply voltage node.

An aspect of the utility model proposes a dual temperature coefficient LDO circuit, wherein the reference current source is configured as a current source with zero temperature coefficient.

An aspect of the utility model proposes a dual temperature coefficient LDO circuit, wherein the reference current source is configured as a VBG/R circuit.

An aspect of the utility model proposes a dual temperature coefficient LDO circuit, wherein the regulated current source is configured as an absolute temperature proportional PTAT current source, and wherein when an LDO circuit output voltage with a positive temperature coefficient is required, a current output port of the configured temperature coefficient regulating circuit is connected with an input terminal of the LDO unit, and when an LDO circuit output voltage with a negative temperature coefficient is required, a current draw port of the temperature coefficient regulating circuit is connected with an input terminal of the LDO unit.

An aspect of the utility model proposes a dual temperature coefficient LDO circuit, wherein the regulated current source is configured as an inversely proportional to absolute temperature CTAT current source, and wherein the current drawing port of the configured temperature coefficient regulating circuit is connected with the input of the LDO unit when an LDO circuit output voltage with a positive temperature coefficient is required, and the current output port of the temperature coefficient regulating circuit is connected with the input of the LDO unit when an LDO circuit output voltage with a negative temperature coefficient is required.

An aspect of the utility model proposes a dual temperature coefficient LDO circuit, wherein the input reference signal is configured to have a zero temperature coefficient, a positive temperature coefficient, or a negative temperature coefficient.

An aspect of the utility model proposes a dual temperature coefficient LDO circuit, wherein the input reference signal is provided by an output of a bandgap reference source.

An aspect of the present utility model proposes a power amplifier circuit comprising: the dual temperature coefficient LDO circuit, the bias circuit, and the amplifier unit of any one of the aspects described above, wherein the dual temperature coefficient LDO circuit is configured to supply power to the bias circuit, and the bias circuit is configured to provide a bias voltage to the amplifier unit in the power amplifier circuit.

Drawings

FIG. 1 is a schematic diagram illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the present utility model;

FIG. 2 is a schematic diagram illustrating a temperature coefficient regulation circuit of a dual temperature coefficient LDO circuit according to an embodiment of the present utility model;

FIG. 3 is a circuit schematic illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the present utility model;

FIG. 4 is a circuit schematic illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to another embodiment of the present utility model;

FIG. 5 is a schematic diagram illustrating the circuit effect of a dual temperature coefficient LDO circuit according to an embodiment of the present utility model; and

fig. 6 is a schematic diagram illustrating a power amplifier PA circuit with a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the utility model.

Detailed Description

Before proceeding with the following detailed description, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The terms "coupled," "connected," and derivatives thereof, refer to any direct or indirect communication or connection between two or more elements, whether or not those elements are in physical contact with one another. The terms "transmit," "receive," and "communicate," and derivatives thereof, encompass both direct and indirect communication. The terms "include" and "comprise," as well as derivatives thereof, mean inclusion without limitation. The term "or" is inclusive, meaning and/or. The phrase "associated with … …" and its derivatives are intended to include, be included in, interconnect with, contain within … …, connect or connect with … …, couple or couple with … …, communicate with … …, mate, interleave, juxtapose, approximate, bind or bind with … …, have attributes, have relationships or have relationships with … …, etc. The term "controller" refers to any device, system, or portion thereof that controls at least one operation. Such a controller may be implemented in hardware, or a combination of hardware and software and/or firmware. The functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. The phrase "at least one," when used with a list of items, means that different combinations of one or more of the listed items may be used, and that only one item in the list may be required. For example, "at least one of A, B, C" includes any one of the following combinations: A. b, C, A and B, A and C, B and C, A and B and C.

Definitions for other specific words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior as well as future uses of such defined words and phrases.

In this patent document, the application combinations of modules and the division levels of sub-modules are for illustration only, and the application combinations of modules and the division levels of sub-modules may have different manners without departing from the scope of the disclosure.

Fig. 1 is a schematic diagram illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the utility model.

As shown in fig. 1, the dual temperature coefficient LDO circuit according to an embodiment of the present utility model mainly includes: a temperature coefficient adjusting circuit (TC Adjust), a Buffer (Buffer), a temperature coefficient adjusting resistor R1, and an LDO unit. The input of the buffer is connected with the port Vref0, the output of the buffer is connected with the temperature coefficient adjusting resistor R1, the other end of the temperature coefficient adjusting resistor is connected with the input of the LDO unit, the output of the temperature coefficient adjusting circuit is connected with the input of the LDO unit, and the output of the LDO unit is connected with the port Vout. The connection relation between different output ports of the temperature coefficient regulating circuit and the LDO unit is configured by controlling the switch circuit, for example, so that the output voltage Vout of the LDO circuit has double temperature coefficients in various forms.

Fig. 2 is a schematic diagram illustrating a temperature coefficient adjustment circuit of a dual temperature coefficient LDO circuit according to an embodiment of the utility model.

As shown in fig. 2, the temperature coefficient adjusting circuit (TC Adjust) includes: current source i_ref (reference current source), current source i_tc (regulated current source), transistor MN1, transistor MN2, transistor MN3, transistor MN4, transistor MP1, transistor MP2, transistor MP3, transistor MP4, transistor MP5, port i_source, and port i_sink. The current source i_tc is connected to the drain and gate of the transistor MN1, and the source of the transistor MN1 is grounded. The transistor MN2 and the transistor MN1 form a current mirror structure 202, the source electrode of the transistor MN2 is grounded, the gate electrode is connected with the gate electrode of the transistor MN1, the drain electrode of the transistor MN2 is connected with the drain electrode of the transistor MP2, the source electrode of the transistor MP2 is connected with the power supply, and the gate electrodes of the transistor MP2 and the transistor MP1 are connected to form the current mirror structure 201. The source of the transistor MP1 is connected with a power supply, and the drain and the gate are connected with a current source I_ref. Transistors MP3, MP4, and MP5 constitute a current mirror structure 203, with the gate and drain of transistor MP3 connected to the drain of transistor MP2 and the drain of transistor MP4 connected to the drain of transistor MN 3. The drain of the transistor MP5 is connected to the port i_source (current output port). The transistor MN3 and the transistor MN4 form a current mirror structure 204, the gate and the drain of the transistor MN3 are connected, and the drain of the transistor MN4 is connected to the port i_sink (current drawing port). The temperature coefficient regulating circuit (TC Adjust) described above has two current output ports, where i_source has the capability to output current and i_sink has the capability to sink current. By configuring the connection relation of different output ports of the temperature coefficient regulating circuit, the output voltage Vout of the LDO circuit can have double temperature coefficients in various forms.

The embodiment of the utility model provides a dual temperature coefficient LDO circuit, which comprises a temperature coefficient adjusting circuit, a buffer, a temperature coefficient adjusting resistor and an LDO unit, wherein the output voltage Vout of the LDO circuit can have dual temperature coefficients in various forms by configuring the connection relation of different output ports of the temperature coefficient adjusting circuit.

Fig. 3 is a circuit schematic illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the utility model.

Referring to fig. 3, where input port Vref0 is the input reference signal of the LDO circuit, typically the output from the bandgap reference source. The bandgap reference source can provide Vref0 with positive temperature coefficient, vref0 with negative temperature coefficient or Vref0 with zero temperature coefficient, and can be selected according to practical application requirements, and the Vref0 selected in this embodiment has zero temperature coefficient, i.e. the output voltage of Vref0 does not change with temperature. The buffer is used for changing the input reference signal Vref0 into a signal Vref1 with current driving capability, so as to solve the problem that the output voltage Vref0 of the common band gap reference source does not have current driving capability. Assuming that the output of the temperature coefficient adjusting circuit is disconnected from the input of the LDO unit, the temperature coefficient of the output voltage of the LDO unit depends on the temperature coefficient of Vref0 and the amplification factor of the loop of the LDO unit on the input signal. In this embodiment, vref0 is selected to have a zero temperature coefficient, so if the output terminal of the temperature coefficient adjusting circuit is not connected to the input terminal of the LDO unit, the output voltage of the LDO unit has a zero temperature coefficient.

When the output port i_source (current output port) of the temperature coefficient adjusting circuit is connected to the input node Vref2 of the LDO unit, the LDO circuit is analyzed according to the operating condition of the circuit at normal temperature (critical temperature t 0) and low temperature and high temperature.

According to an embodiment of the present utility model, the current source i_ref (reference current source) of the temperature coefficient adjusting circuit is configured as a current source having zero temperature coefficient, which can be implemented using a conventional VBG/R circuit. In addition, the current source i_tc (regulated current source) of the temperature coefficient regulating circuit is configured as an absolute temperature proportional (PTAT, proportional to Absolute Temperature) current source, which may be provided by a bandgap reference source. In circuit design, a PTAT circuit is configured as a circuit whose output current is proportional to absolute temperature. According to one embodiment of the present utility model, the normal temperature 25 degrees is set as the turning point of the LDO temperature coefficient, and the transistors MN1 and MN2 are configured to be the same size, and the transistors MP1 and MP2 are the same size.

At normal temperature of 25 degrees, let the current i_ref=i_tc. Since MP1 and MP2 constitute a current mirror, i_mp2=i_ref and MN1 and MN2 constitute a current mirror, i_mn2=i_tc, i_mn2=i_mp2 at room temperature of 25 degrees can be found. At this time, MP3 has no current, and since MP3, MP4, and MP5 constitute a current mirror, it is known that the current output port i_source has no output current. The output of the LDO circuit vout=f (Vref 0), and it has a zero temperature coefficient.

Since I_tc is configured as a PTAT current, I_tc is less than I_ref when the temperature is less than 25 degrees. Since MP1 and MP2 constitute a current mirror, i_mp2=i_ref, since MN1 and MN2 constitute a current mirror, i_mn2=i_tc, and therefore, when the temperature is lower than 25 degrees, i_mp2 is larger than i_mn2, at this time, the operating state of the transistor MP2 will enter the linear region from the saturation region, the leakage voltage of the transistor MP2 will increase, the current of i_mp2 will be forced to decrease to be equal to the current value of i_mn2, at this time MP3 will have no current, and since MP3, MP4 and MP5 constitute a current mirror, it is known that the current output port i_source will not output current. The output of the LDO circuit vout=f (Vref 0), and it has a zero temperature coefficient.

Since I_tc is configured as a PTAT current, I_tc is greater than I_ref when the temperature is greater than 25 degrees. Since MP1 and MP2 constitute a current mirror, i_mp2=i_ref, and since MN1 and MN2 constitute a current mirror, i_mn2=i_tc, i_mp2 is smaller than i_mn2 when the temperature is higher than 25 degrees, and at this time, the operating state of the transistor MP3 enters the saturation region from the off region, and the transistors MP3 and MP2 output current at the same time, so that i_mp2+i_mp3=i_mn2. Since MP3, MP4, and MP5 constitute a current mirror, it is known that the current output port i_source has an output current, and the current flows through the temperature coefficient adjusting resistor R1, raising the voltage of the node Vref 2. So that the output vout=f (Vref 0+ I) of the LDO circuit _source X R1). Since the current output port i_source has a positive temperature coefficient, the output voltage of the LDO circuit has a positive temperature coefficient after the temperature is greater than 25 degrees.

Fig. 5 is a schematic diagram showing the circuit effect of a dual temperature coefficient LDO circuit according to an embodiment of the utility model.

Referring to part a in fig. 5, where the LDO output voltage has a zero temperature coefficient when the temperature is less than t0 with t0 set to 25 degrees, and has a positive temperature coefficient after the temperature is greater than t0, the positive temperature coefficient can be adjusted and determined by the resistance value of the temperature coefficient adjusting resistor R1.

According to another embodiment of the utility model, the regulated current source I_tc may also be set as an inversely proportional to absolute temperature (CTAT, complementary to Absolute Temperature) current source. Unlike PTAT circuits, the output current of CTAT circuits is inversely proportional to absolute temperature, i.e., it has a negative temperature coefficient. Similar to the above analysis, the following analysis results can be obtained: when the temperature t0 is equal to 25 degrees, the output vout=f (Vref 0) of the LDO circuit, and it has a zero temperature coefficient. When the temperature is less than 25 degrees, the output vout=f (Vref 0 +i) _source X R1), and wherein the current output portI_source has a negative temperature coefficient; when the temperature t0 is greater than 25 degrees, the output vout=f (Vref 0) of the LDO circuit, and it has a zero temperature coefficient. The effect of the above-described embodiment is as shown in part C in fig. 5, in which in the case where the temperature t0 is set to 25 degrees, the LDO circuit output voltage has a negative temperature coefficient when the temperature is less than t0, and the output voltage of the LDO circuit has a zero temperature coefficient after the temperature is greater than t0, wherein the negative temperature coefficient can be adjusted and determined by the resistance value of the temperature coefficient adjusting resistor R1.

Fig. 4 is a circuit schematic illustrating a dual temperature coefficient low dropout linear regulator (LDO) circuit according to another embodiment of the utility model.

Referring to fig. 4, wherein the input port Vref0 is an input reference signal of the LDO circuit, which is typically derived from the output of the bandgap reference source. The bandgap reference source may provide a positive temperature coefficient of Vref0, a negative temperature coefficient of Vref0, or a zero temperature coefficient of Vref0, which may be selected according to practical application requirements, and according to embodiments of the present utility model, vref0 is configured to have a zero temperature coefficient, i.e., the output voltage of Vref0 does not vary with temperature. The buffer is used for converting the input signal Vref0 into a signal Vref1 with current driving capability, so as to solve the problem that the output voltage Vref0 of the common bandgap reference source does not have current driving capability. Assuming that the output of the temperature coefficient adjusting circuit is disconnected from the input of the LDO unit, the temperature coefficient of the output voltage of the LDO unit depends on the temperature coefficient of Vref0 and the amplification factor of the loop of the LDO unit on the input signal. Since Vref0 is selected to have zero temperature coefficient in the present embodiment, if the output terminal of the temperature coefficient adjusting circuit is not connected to the input terminal of the LDO unit, the output voltage of the LDO unit has zero temperature coefficient.

When the output port i_sink (current drawing port) of the temperature coefficient adjusting circuit is connected to the input terminal node Vref2 of the LDO unit, the LDO circuit is analyzed according to the operating condition of the circuit at normal temperature and low temperature and high temperature.

According to an embodiment of the present utility model, the current source i_ref (reference current source) of the temperature coefficient adjusting circuit is configured as a current source having zero temperature coefficient, which can be implemented using a conventional VBG/R circuit. In addition, the current source i_tc (regulated current source) of the temperature coefficient regulating circuit is configured as an absolute temperature proportional (PTAT, proportional to Absolute Temperature) current source, which may be provided by a bandgap reference source. According to one embodiment of the present utility model, the normal temperature 25 degrees is set as the turning point of the LDO temperature coefficient, and the transistors MN1 and MN2 are configured to be the same size, and the transistors MP1 and MP2 are the same size.

At normal temperature of 25 degrees, let the current i_ref=i_tc. Since MP1 and MP2 constitute a current mirror, i_mp2=i_ref and MN1 and MN2 constitute a current mirror, i_mn2=i_tc, i_mn2=i_mp2 at room temperature of 25 degrees can be found. At this time, MP3 has no current, and since MP3 and MP4 form a current mirror, MN3 and MN3 form a current mirror, it is known that the current drawing port i_sink has no current drawn. The output of the LDO circuit vout=f (Vref 0), and it has a zero temperature coefficient.

Since I_tc is configured as a PTAT current, I_tc is less than I_ref when the temperature is less than 25 degrees. Since MP1 and MP2 form a current mirror, i_mp2=i_ref, since MN1 and MN2 form a current mirror, i_mn2=i_tc, and therefore, when the temperature is lower than 25 degrees, i_mp2 is larger than i_mn2, at this time, the operating state of the transistor MP2 will enter the linear region from the saturation region, the leakage voltage of the transistor MP2 will increase, the current of i_mp2 will be forced to decrease to be equal to the current value of i_mn2, at this time MP3 will have no current, since MP3 and MP4 form a current mirror, MN3 and MN3 form a current mirror, and it is known that the current drawing port i_sink will not draw current. Output vout=of LDO circuit

f (Vref 0), and it has a zero temperature coefficient.

Since I_tc is configured as a PTAT current, I_tc is greater than I_ref when the temperature is greater than 25 degrees. Since MP1 and MP2 constitute a current mirror, i_mp2=i_ref, and since MN1 and MN2 constitute a current mirror, i_mn2=i_tc, i_mp2 is smaller than i_mn2 when the temperature is higher than 25 degrees, and at this time, the operating state of the transistor MP3 enters the saturation region from the off region, and the transistors MP3 and MP2 output current at the same time, so that i_mp2+i_mp3=i_mn2. Since MP3, MP4 constitute the current mirror, MN3 and MN4 constitute the current mirror,it is known that the current sink port i_sink has a sink current and that the current flows through the temperature coefficient adjusting resistor R1, reducing the voltage of the node Vref 2. Output vout=f (Vref 0-I) of LDO circuit _sink X R1). Since the current sink port i_sink has a positive temperature coefficient, the output voltage of the LDO circuit has a negative temperature coefficient after the temperature is greater than 25 degrees.

Referring to part B in fig. 5, where in case t0 is set to 25 degrees, the LDO output voltage has a zero temperature coefficient when the temperature is less than t0, and after the temperature is greater than t0, the LDO output voltage has a negative temperature coefficient, which can be adjusted and determined by the resistance value of the temperature coefficient adjusting resistor R1.

According to another embodiment of the utility model, the regulated current source I_tc may also be set as an inversely proportional to absolute temperature (CTAT, complementary to Absolute Temperature) current source. Unlike PTAT circuits, the output current of CTAT circuits is inversely proportional to absolute temperature, i.e., it has a negative temperature coefficient. Similar to the above analysis, the following analysis results can be obtained: when the temperature t0 is equal to 25 degrees, the output vout=f (Vref 0) of the LDO circuit, and it has a zero temperature coefficient. When the temperature is less than 25 degrees, the output vout=f (Vref 0-I of the LDO circuit _sink X R1), and wherein the current sink port i_sink has a negative temperature coefficient and the output of the LDO circuit has a positive temperature coefficient; when the temperature t0 is greater than 25 degrees, the output vout=f (Vref 0) of the LDO circuit, and it has a zero temperature coefficient. The effect of the above embodiment is as shown in part D in fig. 5, in which in the case where the temperature t0 is set to 25 degrees, the LDO circuit output voltage has a positive temperature coefficient when the temperature is less than t0, and the output voltage of the LDO circuit has a zero temperature coefficient after the temperature is greater than t0, wherein the positive temperature coefficient can be adjusted and determined by the resistance value of the temperature coefficient adjusting resistor R1.

According to the embodiment of the utility model, the dual temperature coefficient LDO circuit comprises a temperature coefficient regulating circuit, a buffer, a temperature coefficient regulating resistor and an LDO unit, and the output voltage Vout of the LDO circuit can have dual temperature coefficients in various forms by configuring the connection relation of different output ports of the temperature coefficient regulating circuit. For example, the connection relation of different output ports of the temperature coefficient adjusting circuit can be adjusted by controlling the switching circuit. For example, in the case where the regulated current source i_tc is configured as a PTAT current source, when an LDO circuit output voltage having a positive temperature coefficient is required, the current output port i_source configuring the temperature coefficient regulating circuit is connected to the input terminal of the LDO unit, and when an LDO circuit output voltage having a negative temperature coefficient is required, the current drawing port i_sink of the temperature coefficient regulating circuit is connected to the input terminal of the LDO unit; and in the case where the regulated current source i_tc is configured as a CTAT current source, when an LDO circuit output voltage having a positive temperature coefficient is required, connecting the current drawing port i_sink configuring the temperature coefficient regulating circuit with an input terminal of the LDO unit, and when an LDO circuit output voltage having a negative temperature coefficient is required, connecting the current output port i_source of the temperature coefficient regulating circuit with an input terminal of the LDO unit.

Although in the above embodiment, vref0 is configured as zero temperature coefficient, it will be understood by those skilled in the art that Vref0 may also be configured to have positive temperature coefficient and negative temperature coefficient, and the specific configuration may be adjusted according to the practical application.

Fig. 6 is a schematic diagram illustrating a power amplifier PA circuit with a dual temperature coefficient low dropout linear regulator (LDO) circuit according to an embodiment of the utility model.

Referring to fig. 6, a dual temperature coefficient LDO according to an embodiment of the present utility model is configured to supply power to a Bias circuit (PA Bias) of a power amplifier and to provide a stable Bias voltage to an amplifier unit in the power amplifier through the Bias circuit, wherein the power amplifier circuit includes a single-stage amplifier and a multi-stage amplifier.

Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. The disclosure is intended to embrace such alterations and modifications that fall within the scope of the appended claims.

Any description of the present utility model should not be construed as implying that any particular element, step, or function is a necessary element to be included in the scope of the claims. The scope of patented subject matter is defined only by the claims.

Claims (10)

1. A dual temperature coefficient low dropout linear regulator circuit, comprising:

a buffer configured to receive an input reference signal and an output thereof is connected to the temperature coefficient adjustment resistor;

a temperature coefficient adjusting resistor configured between an output terminal of the buffer and an input terminal of the LDO unit;

a temperature coefficient adjustment circuit comprising a current output port and a current drawing port configured to have different temperature coefficients, and the current output port or the current drawing port is connected to an input of the LDO unit by controlling the switching circuit; and

an LDO unit has an input terminal connected to the temperature coefficient adjusting resistor and the control switching circuit, and an output terminal connected to an output terminal of the LDO circuit.

2. The dual temperature coefficient low dropout linear regulator circuit according to claim 1, wherein said temperature coefficient adjusting circuit comprises a reference current mirror circuit, an adjusting current mirror circuit, a current providing current mirror circuit, and a current drawing current mirror circuit,

a first current branch of the reference current mirror circuit is connected with a reference current source, and a second current branch thereof is connected to a first current node;

a third current branch of the regulated current mirror circuit is connected to the regulated current source, and a fourth current branch thereof is connected to the first current node;

a fifth current branch of the current providing current mirror circuit is connected to the first current node, a sixth current branch thereof is connected to the second current node, and a seventh current branch thereof is connected to the current output port; and

an eighth current branch of the current-drawing current mirror circuit is connected to the second current node, and a ninth current branch thereof is connected to the current-drawing port, and

the second current branch of the reference current mirror circuit and the fifth current branch of the current providing current mirror circuit provide current to the third current branch of the regulating current mirror circuit; and is also provided with

The sixth current leg of the current supply current mirror circuit and the eighth current leg of the current sink current mirror circuit form a current path between the supply voltage to the ground node.

3. The dual temperature coefficient low dropout linear regulator circuit according to claim 2, wherein said regulating current mirror circuit comprises a first NMOS transistor and a first NMOS transistor, wherein said reference current mirror circuit comprises a first PMOS transistor and a second PMOS transistor, wherein said current providing current mirror circuit comprises a third PMOS transistor, a fourth PMOS transistor and a fifth PMOS transistor, and wherein said current drawing current mirror circuit comprises a third NMOS transistor and a fourth NMOS transistor,

the regulated current source is connected to the drain and gate of the first NMOS transistor, the source of the first NMOS transistor is grounded, the source of the second NOMS transistor is grounded, and the gate of the second NOMS transistor is connected to the gate of the first NMOS transistor, the drain of the second NMOS transistor is connected to the drain of the second PMOS transistor,

the sources of the first PMOS transistor and the second PMOS transistor are connected to the supply voltage node, the gates of the second PMOS transistor and the first PMOS transistor are connected, and the drains and gates of the first PMOS transistor are connected to a reference current source,

the gate and drain of the third PMOS transistor are connected to the drain of the second PMOS transistor, the gate of the third PMOS transistor is also connected to the gate of the fourth PMOS transistor and the gate of the fifth PMOS transistor, the drain of the fourth PMOS transistor is connected to the drain of the third NMOS transistor, the drain of the fifth PMOS transistor is connected to the current output port, and the sources of the third PMOS transistor, the fourth PMOS transistor, and the fifth PMOS transistor are connected to the power supply voltage node,

the gate and drain of the third NMOS transistor are connected, the gate of the third NMOS transistor is connected to the gate of the fourth NMOS transistor, the drain of the fourth NMOS transistor is connected to the current drawing port, and the sources of the third NMOS transistor and the fourth NMOS transistor are grounded.

4. The dual temperature coefficient low dropout linear regulator circuit according to claim 2, wherein said reference current source is configured as a current source having a zero temperature coefficient.

5. The dual temperature coefficient low dropout linear regulator circuit according to claim 2, wherein said reference current source is configured as a VBG/R circuit.

6. The dual temperature coefficient low dropout linear regulator circuit according to claim 2, wherein said regulated current source is configured as an absolute temperature proportional PTAT current source, and

when an LDO circuit output voltage with a positive temperature coefficient is required, a current output port of the configuration temperature coefficient regulating circuit is connected with an input end of the LDO unit, and when an LDO circuit output voltage with a negative temperature coefficient is required, a current drawing port of the temperature coefficient regulating circuit is connected with the input end of the LDO unit.

7. The dual temperature coefficient low dropout linear regulator circuit according to claim 2, wherein said regulated current source is configured as an absolute temperature inversely proportional CTAT current source, and

when an LDO circuit output voltage with a positive temperature coefficient is required, a current drawing port of the temperature coefficient regulating circuit is connected with an input end of the LDO unit, and when an LDO circuit output voltage with a negative temperature coefficient is required, a current output port of the temperature coefficient regulating circuit is connected with the input end of the LDO unit.

8. The dual temperature coefficient low dropout linear regulator circuit according to claim 1, wherein said input reference signal is configured to have a zero temperature coefficient, a positive temperature coefficient, or a negative temperature coefficient.

9. The dual temperature coefficient low dropout linear regulator circuit according to claim 1, wherein said input reference signal is provided by an output of a bandgap reference source.

10. A power amplifier circuit, comprising: the dual temperature coefficient low dropout linear regulator circuit, bias circuit and amplifier unit according to any one of claims 1-9,

the dual temperature coefficient LDO circuit is configured to supply power to a bias circuit, and

the bias circuit is configured to provide a bias voltage to an amplifier cell in the power amplifier circuit.