CN219978338U

CN219978338U - Novel semiconductor device

Info

Publication number: CN219978338U
Application number: CN202320802156.6U
Authority: CN
Inventors: 熊烱声; 李圣
Original assignee: Yangzhou Yicheng Technology Co ltd
Current assignee: Yangzhou Yicheng Technology Co ltd
Priority date: 2023-04-12
Filing date: 2023-04-12
Publication date: 2023-11-07
Anticipated expiration: 2033-04-12

Abstract

The utility model relates to the technical field of semiconductor electrical property testing, in particular to a novel semiconductor device, which comprises a testing circuit board, wherein a first conducting contact and a second conducting contact are fixedly welded at the top end of the testing circuit board, a trapezoidal insulating plate is fixedly arranged at the top end of the testing circuit board, the inside of the bottom end of the trapezoidal insulating plate is in embedded contact with the first conducting contact and the second conducting contact, a ring cylinder and a plate rod are fixedly arranged at the top end of the trapezoidal insulating plate, laminated plates are fixedly arranged at the inner sides of the front end and the rear end of the plate rod, a pressing groove shell is fixedly embedded in the laminated plates, a buckle plate is embedded in the pressing groove shell, the inner side of the top end of the buckle plate is in adhered contact with the semiconductor device, and pins are fixedly arranged at the bottom end of the semiconductor device.

Description

Novel semiconductor device

Technical Field

The utility model relates to the technical field of semiconductor electrical property test, in particular to a novel semiconductor device.

Background

In order to ensure proper use of the semiconductor device after its manufacture, a series of tests are required, including sampling the power-on operating state of the semiconductor device.

When the current semiconductor test device detects the energizing effect of the semiconductor device, a worker manually touches the bottom pin of the sampled semiconductor device with a contact of the electrical test substrate device, and the pin is easy to bend when the bottom pin of the semiconductor device is pressed and released.

Disclosure of Invention

The utility model aims to provide a novel semiconductor device, which solves the problem that when the conventional semiconductor test device provided in the background art detects the electrifying effect of the semiconductor device, a worker manually touches the bottom pin of the sampled semiconductor device with a contact of an electrical test substrate device, and the pin is easy to bend when the bottom pin of the semiconductor device is pressed and placed.

In order to achieve the above purpose, the present utility model provides the following technical solutions:

the utility model provides a novel semiconductor device, includes test circuit board, test circuit board right-hand member is fixed to be provided with into the wire and go out the wire, test circuit board top welded fastening is provided with first guide contact and second guide contact, test circuit board top is fixed to be provided with trapezoidal insulation board, the inside and first guide contact gomphosis contact of second guide contact in trapezoidal insulation board bottom, trapezoidal insulation board top is fixed to be provided with a ring section of thick bamboo and board pole, both ends inboard is fixed to be provided with the plywood around the board pole, the inside gomphosis of plywood is fixed to be provided with the indent shell, the inside gomphosis contact of indent shell has the buckle, the inboard laminating contact in buckle top has semiconductor device, semiconductor device bottom fixed is provided with the pin.

Preferably, the ring barrels and the plate rods which are fixedly arranged at the top of the trapezoid insulating plate are mutually arranged in parallel.

Preferably, the number of the ring cylinder, the laminate, the pressing groove shell and the pinch plate is two, and the vertical central axes of the trapezoid insulating plates are two sides of the symmetrical distribution position.

Preferably, the outer sides of the left end and the right end of the semiconductor device are contacted with the inner end surfaces of the pinch plates.

Preferably, the outer side of the bottom of the pin is slidably arranged in the ring cylinder, and the bottom end of the pin is respectively contacted with the top ends of the first guide contact piece and the second guide contact piece.

Compared with the prior art, the utility model has the beneficial effects that:

according to the utility model, through the arranged test circuit board, the lead-in wire, the lead-out wire, the first conductive contact piece, the second conductive contact piece, the trapezoid insulating plate, the ring barrel, the plate rod, the laminate, the pressing groove shell, the buckle plate, the semiconductor device and the pins, the trapezoid insulating plate, the ring barrel, the plate rod, the laminate and the pressing groove shell are integrated into an auxiliary plate, the manual clamping buckle plate is used for jogging and contacting the semiconductor device to be detected and clamping the semiconductor device inwards, vertical sliding limiting is carried out in the pressing groove shell, the vertical placement of the bottom pins of the semiconductor device is achieved through the sliding buckle plate, the pins are not easy to bend until the bottom ends of the pins are in contact with the first conductive contact piece and the second conductive contact piece, and the manual clamping is facilitated by the buckle plate top layer structure arranged in a step-like manner, so that the problem that when the current semiconductor test device is used for detecting the electrifying effect of the semiconductor device is solved, the bottom pins of the sampled semiconductor device are manually contacted with the contact point of the electrical test substrate device by workers, and the pins are easy to bend when the bottom pins of the semiconductor device are pressed.

Drawings

FIG. 1 is a schematic diagram of the overall structure of the present utility model;

FIG. 2 is a schematic view of the structure of FIG. 1A according to the present utility model;

FIG. 3 is a schematic diagram of the front view of the present utility model;

FIG. 4 is a schematic diagram of the structure of FIG. 3B according to the present utility model;

FIG. 5 is a schematic top view of the present utility model;

fig. 6 is a schematic view of the structure of fig. 5 at C according to the present utility model.

In the figure: 1-test circuit board, 2-lead-in wire, 3-lead-out wire, 4-first conducting contact piece, 5-second conducting contact piece, 6-trapezoid insulating board, 7-ring cylinder, 8-board rod, 9-laminate, 10-press groove shell, 11-buckle, 12-semiconductor device and 13-pin.

Detailed Description

The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

Referring to fig. 1-6, the present utility model provides a technical solution:

the utility model provides a novel semiconductor device, including test circuit board 1, test circuit board 1 right-hand member is fixed to be provided with into wire 2 and go out wire 3, test circuit board 1 top welded fastening is provided with first guide contact 4 and second guide contact 5, test circuit board 1 top is fixed to be provided with trapezoidal insulation board 6, the inside and first guide contact 4 of trapezoidal insulation board 6 bottom and the contact of second guide contact 5 gomphosis, trapezoidal insulation board 6 top is fixed to be provided with a ring section of thick bamboo 7 and stock 8, both ends inboard is all fixed to be provided with plywood 9 around the stock 8, the inside gomphosis of plywood 9 is fixed to be provided with indent shell 10, indent shell 10 inside gomphosis contact has buckle 11, buckle 11 top inboard laminating contact has semiconductor device 12, semiconductor device 12 bottom fixed is provided with pin 13.

As shown in fig. 1, 3 and 5, through the test circuit board 1, the lead-in wire 2, the lead-out wire 3, the first conductive contact 4, the second conductive contact 5, the trapezoid insulating board 6, the ring barrel 7, the board rod 8, the laminate 9, the pressing groove shell 10, the buckle 11, the semiconductor device 12 and the pin 13, the trapezoid insulating board 6, the ring barrel 7, the board rod 8, the laminate 9 and the pressing groove shell 10 are integrated into an auxiliary plate, the manual clamping buckle 11 is used for jogging and contacting the semiconductor device 12 to be detected and clamping the semiconductor device inwards, vertical sliding limit is performed in the pressing groove shell 10, and the vertical placement of the pin 13 at the bottom of the semiconductor device 12 is achieved through the sliding buckle 11, wherein the ring barrel 7 and the board rod 8 fixedly arranged at the top of the trapezoid insulating board 6 are mutually parallel; the annular cylinder 7, the laminate 9, the pressing groove shell 10 and the pinch plate 11 are two, and the vertical central axes of the trapezoid insulating plates 6 are two sides of the symmetrical distribution position; the outer sides of the left end and the right end of the semiconductor device 12 are contacted with the inner end surfaces of the pinch plate 11; the outer side of the bottom of the pin 13 is slidably arranged in the ring barrel 7, and the bottom of the pin 13 is respectively contacted with the top ends of the first guide contact piece 4 and the second guide contact piece 5.

The working flow is as follows: when the test board is used, the test board 1, the lead-in wires 2, the lead-out wires 3, the first guide contact piece 4 and the second guide contact piece 5 are test boards for testing the electrifying effect of the semiconductor device 12, the trapezoidal insulating board 6 is an auxiliary placing rack for testing the semiconductor device 12, which is formed by attaching and welding and fixing the tops of the first guide contact piece 4 and the second guide contact piece 5, wherein the trapezoidal insulating board 6, the annular cylinder 7, the plate rod 8, the laminate 9 and the pressure tank shell 10 are integrated into an auxiliary plate, the semiconductor device 12 to be tested is manually clamped and clamped inwards by the clamping buckle 11, vertical sliding limiting is carried out in the pressure tank shell 10, the vertical placing of the pins 13 at the bottom of the semiconductor device 12 is achieved through the sliding buckle 11 until the bottoms of the pins 13 are attached and contacted with the first guide contact piece 4 and the second guide contact piece 5, and the manual clamping is facilitated by a stepped buckle 11 top layer structure for a tester to carry out manual clamping.

Although embodiments of the present utility model have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.

Claims

1. The novel semiconductor device comprises a test circuit board (1), and is characterized in that: the novel solar cell testing device is characterized in that a lead-in wire (2) and a lead-out wire (3) are fixedly arranged at the right end of the testing circuit board (1), a first guide contact piece (4) and a second guide contact piece (5) are fixedly arranged at the top end of the testing circuit board (1), a trapezoidal insulating plate (6) is fixedly arranged at the top end of the testing circuit board (1), the inside of the bottom end of the trapezoidal insulating plate (6) is in embedded contact with the first guide contact piece (4) and the second guide contact piece (5), a ring cylinder (7) and a plate rod (8) are fixedly arranged at the top end of the trapezoidal insulating plate (6), laminated plates (9) are fixedly arranged on the inner sides of the front end and the rear end of the plate rod (8), a pressing groove shell (10) is fixedly arranged in embedded contact with a buckle plate (11), a semiconductor device (12) is in embedded contact with the inner side of the top end of the buckle plate (11), and pins (13) are fixedly arranged at the bottom end of the semiconductor device (12).

2. A novel semiconductor device according to claim 1, wherein: the annular cylinder (7) fixedly arranged at the top of the trapezoid insulating plate (6) and the plate rod (8) are arranged in parallel.

3. A novel semiconductor device according to claim 1, wherein: the two annular cylinders (7), the laminate (9), the pressing groove shell (10) and the pinch plate (11) are arranged, and the vertical central axes of the trapezoid insulating plates (6) are arranged on two sides of the symmetrical distribution position.

4. A novel semiconductor device according to claim 1, wherein: the outer sides of the left end and the right end of the semiconductor device (12) are contacted with the inner end surface of the pinch plate (11).

5. A novel semiconductor device according to claim 1, wherein: the outer side of the bottom of the pin (13) is slidably arranged in the annular cylinder (7), and the bottom end of the pin (13) is respectively contacted with the top ends of the first guide contact piece (4) and the second guide contact piece (5).