CN219917148U - Semiconductor device with a semiconductor layer having a plurality of semiconductor layers - Google Patents
Semiconductor device with a semiconductor layer having a plurality of semiconductor layers Download PDFInfo
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- CN219917148U CN219917148U CN202321333908.5U CN202321333908U CN219917148U CN 219917148 U CN219917148 U CN 219917148U CN 202321333908 U CN202321333908 U CN 202321333908U CN 219917148 U CN219917148 U CN 219917148U
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 108
- 229910052751 metal Inorganic materials 0.000 claims abstract description 147
- 239000002184 metal Substances 0.000 claims abstract description 147
- 239000010410 layer Substances 0.000 claims description 194
- 230000017525 heat dissipation Effects 0.000 claims description 130
- 239000011229 interlayer Substances 0.000 claims description 71
- 239000000758 substrate Substances 0.000 claims description 32
- 238000002161 passivation Methods 0.000 claims description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 8
- 229920005591 polysilicon Polymers 0.000 claims description 8
- 229910021332 silicide Inorganic materials 0.000 claims description 5
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 3
- 238000009825 accumulation Methods 0.000 abstract description 8
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- 230000005855 radiation Effects 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 6
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- 230000008569 process Effects 0.000 description 5
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
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- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The utility model provides a semiconductor device. The semiconductor device comprises a sheet resistor and at least one extended radiating part, wherein the extended radiating part is obtained by extending the sheet resistor from the electrode contact end to the periphery, has the functions of radiating heat generated by the sheet resistor and conducting heat to the upper heat conducting plug and the first metal radiating layer, can accelerate heat radiation, reduces the risk of resistance change and even burning out of the resistor caused by heat accumulation at the sheet resistor, does not influence the resistance of the sheet resistor because the extended radiating part is formed at the periphery of the sheet resistor, ensures the accuracy of the resistance of the sheet resistor, and simultaneously can be larger in area, and can be provided with a plurality of heat conducting plugs so as to obtain higher radiating efficiency.
Description
Technical Field
The utility model relates to the technical field of semiconductors, in particular to a semiconductor device.
Background
In semiconductor Integrated Circuit (IC) processes, it is often necessary to fabricate sheet resistance, for example, since polysilicon has advantages of easy patterning and low parasitic resistance, different kinds of polysilicon resistance can be obtained by adjusting doping ions and doping levels.
The existing sheet resistance is mainly surrounded by an insulating structure, such as a polysilicon resistor formed on an isolation structure or a gate oxide layer, and joule heat generated by the sheet resistance cannot be conducted and dissipated quickly due to poor thermal conductivity of the insulating structure, so that resistance change and even burning out of the resistor are easily caused by heat accumulation, and especially for small-size sheet resistance, the heat accumulation problem is more serious due to smaller heat dissipation area.
Disclosure of Invention
The present utility model provides a semiconductor device in which heat of sheet resistance can be conducted and dissipated quickly, and the risk of resistance change and even burning out of resistance caused by heat accumulation can be reduced.
The semiconductor device provided by the utility model comprises a semiconductor substrate and a sheet resistor formed on the semiconductor substrate, wherein the sheet resistor is provided with two electrode contact ends; and, the semiconductor device further includes:
at least one extended heat sink, each of the extended heat sinks being a portion of the sheet resistance extending laterally from one of the electrode contact ends to a periphery of the sheet resistance;
a first interlayer dielectric layer covering the sheet resistance, the extended heat spreader and the semiconductor substrate; and
the first metal heat dissipation layer is arranged on the surface of the first interlayer dielectric layer and is connected with the extended heat dissipation part through a heat conduction plug arranged in the first interlayer dielectric layer.
Optionally, the semiconductor device includes two extended heat dissipation parts, and the two extended heat dissipation parts are respectively connected with the two electrode contact ends.
Optionally, a part of the first metal heat dissipation layer is connected with one electrode contact end through at least one heat conduction plug and the corresponding extended heat dissipation part, another part of the first metal heat dissipation layer is connected with the other electrode contact end through at least one heat conduction plug and the corresponding extended heat dissipation part, and parts of the first metal heat dissipation layer respectively connected with the two electrode contact ends are mutually disconnected.
Optionally, the semiconductor device further includes two metal electrodes disposed on a surface of the first interlayer dielectric layer, and each metal electrode is connected to one of the electrode contact terminals through an electrode plug formed in the first interlayer dielectric layer. Optionally, the first metal heat sink layer portion and the metal electrode connected to the same electrode contact end are connected to each other.
Optionally, the first metal heat dissipation layer extends from directly above the heat conductive plug in the first interlayer dielectric layer to directly above the sheet resistance.
Optionally, the semiconductor device further includes:
the second interlayer dielectric layer is stacked on the first interlayer dielectric layer and covers the first metal heat dissipation layer and the first interlayer dielectric layer; and
the second metal heat dissipation layer is arranged on the surface of the second interlayer dielectric layer and is connected with the first metal heat dissipation layer through a heat conduction plug arranged in the second interlayer dielectric layer.
Optionally, the second metal heat dissipation layer extends from directly above the heat conductive plug in the second interlayer dielectric layer to directly above the sheet resistance.
Optionally, the semiconductor device further includes a passivation layer disposed on the second metal heat dissipation layer, the passivation layer having a heat dissipation hole exposing the second metal heat dissipation layer or exposing a metal heat dissipation layer between the second metal heat dissipation layer and the passivation layer.
Optionally, the sheet resistance is a polysilicon resistance, a monocrystalline silicon resistance, a metal resistance, or a metal silicide resistance.
In the semiconductor device provided by the utility model, the extended radiating part has the function of radiating the heat generated by the sheet resistance, and can further transfer the heat generated by the sheet resistance to the heat conduction plug and the first metal radiating layer, so that the heat radiation can be accelerated, the risk of resistance change and even burning out of the resistance caused by heat accumulation at the sheet resistance is reduced, and the resistance of the sheet resistance is not influenced due to the fact that the extended radiating part is formed at the periphery of the sheet resistance.
Drawings
Fig. 1 is a partial plan view schematically showing a semiconductor device in accordance with an embodiment of the present utility model.
Fig. 2 is a schematic cross-sectional view taken along line AA' of fig. 1.
Fig. 3 is a partial plan view schematically showing a semiconductor device in another embodiment of the present utility model.
Fig. 4 is a schematic cross-sectional view taken along line BB' in fig. 3.
Fig. 5 is a schematic partial cross-sectional view of a semiconductor device in yet another embodiment of the utility model.
Reference numerals illustrate:
100-a first semiconductor device; 200-a second semiconductor device; 300-a third semiconductor device; a semiconductor substrate; r-sheet resistance; 102-a first electrode contact; 103-a second electrode contact; 110 a-a first extended heat sink; 110 b-a second extended heat sink; 120-a first interlayer dielectric layer; 130-a first metal heat sink layer; 10-a heat conducting plug; 140 a-a first metal electrode; 140 b-a second metal electrode; 20-electrode plugs; 150-a second interlayer dielectric layer; 160-a second metal heat sink layer; 170-a passivation layer; 170 a-heat dissipation holes.
Detailed Description
The semiconductor device of the present utility model will be described in further detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present utility model will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely to facilitate a convenient and clear description of embodiments of the utility model.
Fig. 1 is a partial plan view schematically showing a semiconductor device in accordance with an embodiment of the present utility model. Fig. 2 is a schematic cross-sectional view taken along line AA' of fig. 1. Referring to fig. 1 and 2, an embodiment of the present utility model relates to a semiconductor device, specifically, a first semiconductor device 100, where the first semiconductor device 100 includes a semiconductor substrate 101 and a sheet resistor R formed on the semiconductor substrate 101, where the sheet resistor R has two electrode contact terminals, a first electrode contact terminal 102 and a second electrode contact terminal 103 as shown in fig. 1, and the two electrode contact terminals are used to connect the sheet resistor R into a circuit, which defines a resistance calculation range of the sheet resistor R.
Semiconductor substrate 101 may be a silicon substrate, a silicon germanium substrate, a silicon carbide substrate, a silicon-on-insulator (SOI) substrate, a germanium-on-insulator substrate, a iii-v compound substrate (e.g., a gallium nitride substrate or a gallium arsenide substrate), etc., or may be other substrates known to those skilled in the art for carrying semiconductor components, and doped regions and/or isolation structures may be formed in semiconductor substrate 101. The first semiconductor device 100 may include active or passive circuit elements, such as memory cells and/or logic circuits, formed based on the semiconductor substrate 101. The sheet resistance R may be formed on the semiconductor substrate 101 through a semiconductor process. The sheet resistance R may be a polysilicon resistance, a monocrystalline silicon resistance, a metal resistance, or a metal silicide resistance, or the sheet resistance R may be a resistance of other materials. For polysilicon resistors and monocrystalline resistors, dopant ions may be included. In the following examples, the sheet resistance R is, for example, a polysilicon resistance.
The first semiconductor device 100 may include one, two, or more sheet resistances R, such as Shallow Trench Isolation (STI) surfaces formed in the semiconductor substrate 101, as illustrated in this embodiment, depending on device structure requirements.
Referring to fig. 1 and 2, the first semiconductor device 100 further includes at least one extended heat spreader, a first interlayer dielectric layer 120, and a first metal heat spreader layer 130.
Specifically, each of the extended heat dissipation portions is a portion of the sheet resistance R extending laterally from one of the electrode contact ends toward the periphery of the sheet resistance R. Illustratively, the first semiconductor device 100 includes two extended heat sinks, a first extended heat sink 110a and a second extended heat sink 110b as shown in fig. 1 and 2, respectively, wherein the first extended heat sink 110a extends laterally from the first electrode contact terminal 102 to the periphery of the sheet resistance R by the sheet resistance R, so that the first extended heat sink 110a is connected to the first electrode contact terminal 102, and the second extended heat sink 110b extends laterally from the second electrode contact terminal 103 to the periphery of the sheet resistance R by the sheet resistance R, so that the second extended heat sink 110b is connected to the second electrode contact terminal 103. Here, "laterally extending" means extending in a direction along the layer plane of the sheet resistance R. Since the extended heat dissipation parts are connected with the sheet resistance R, the extended heat dissipation parts have the functions of dissipating heat of the sheet resistance R and conducting out the heat of the sheet resistance R, and since the extended heat dissipation parts are parts of the sheet resistance R extending transversely from the electrode contact ends to the periphery of the sheet resistance R, each of the extended heat dissipation parts is located outside the corresponding electrode contact end without affecting the resistance of the sheet resistance R.
The first interlayer dielectric layer 120 covers the sheet resistance R, the extended heat spreader and the semiconductor substrate 101. The first interlayer dielectric layer 120 may include one or a combination of dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride, and NDC (Nitrogen dopedSiliconCarbide ).
The first metal heat dissipation layer 130 is disposed on the surface of the first interlayer dielectric layer 120, and the first metal heat dissipation layer 130 may be embedded on the surface of the first interlayer dielectric layer 120 or located on the surface of the first interlayer dielectric layer 120 according to different forming processes. In this embodiment, the first metal heat dissipation layer 130 is connected to the extended heat dissipation portion through the heat conductive plugs 10 disposed in the first interlayer dielectric layer 120. The thermally conductive plug 10 comprises, for example, a metal such as copper or tungsten. The first metal heat dissipation layer 130 is connected to the sheet resistance R through the heat conduction plug 10 and the corresponding extended heat dissipation portion, so as to dissipate heat conducted by the extended heat dissipation portion and the heat conduction plug 10, and avoid heat accumulation generated by the sheet resistance R.
Referring to fig. 1 and 2, a portion of the first metal heat sink layer 130 is connected to one electrode contact terminal (e.g., the first electrode contact terminal 102) of the sheet resistor R through at least one heat conductive plug 10 and the corresponding extended heat sink (e.g., the first extended heat sink 110 a), and another portion of the first metal heat sink layer 130 is connected to the other electrode contact terminal (e.g., the second electrode contact terminal 103) of the sheet resistor R through at least one heat conductive plug 10 and the corresponding extended heat sink (e.g., the second extended heat sink 110 b). The portions of the first metal heat dissipation layer 130 connected to the two electrode contact ends are disconnected from each other, for example, so that the influence of the first metal heat dissipation layer 130 on the resistance of the sheet resistance R is reduced, and the accuracy of the resistance of the sheet resistance R can be improved.
The first semiconductor device 100 may further include two metal electrodes formed on the surface of the first interlayer dielectric layer 120, such as the first metal electrode 140a and the second metal electrode 140b shown in fig. 1. The first interlayer dielectric layer 120 further has an electrode plug 20 formed therein, wherein the first metal electrode 140a is connected to the first electrode contact 102 through at least one electrode plug 20, the second metal electrode 140b is connected to the second electrode contact 103 through at least one electrode plug 20, and the first metal electrode 140a and the second metal electrode 140b are used for connecting the sheet resistor R to a circuit.
The first metal heat sink layer 130 and the metal electrode may be made of the same metal material and obtained by the same metal deposition and patterning process. In order to reduce the contact resistance of the heat conductive plug 10 and the corresponding extended heat sink and to reduce the contact resistance of the electrode plug 20 and the corresponding electrode contact terminal while enhancing heat dissipation, the surfaces of the extended heat sink and the electrode contact terminal may be formed with a metal silicide layer (not shown).
In the first semiconductor device 100 of the present embodiment, the extended heat dissipation portion is helpful to dissipate the heat generated by the sheet resistance R, and can further transfer the heat generated by the sheet resistance R to the heat conduction plug 10 and the first metal heat dissipation layer 130, so that the heat dissipation can be accelerated, in addition, a part of the heat generated by the sheet resistance R can also be transferred to the first metal heat dissipation layer 130 through the first interlayer dielectric layer 120, so that the heat conduction efficiency of the first semiconductor device 100 is higher, and the risk of resistance change and even burning out of the resistance caused by heat accumulation at the sheet resistance R is reduced; further, since the extended heat dissipation portion is formed at the periphery of the sheet resistance R, the resistance of the sheet resistance R is not affected, and the first semiconductor device 100 can be provided with a plurality of extended heat dissipation portions, the heat conductive plugs 10, and the first metal heat dissipation layer 130 while ensuring the accuracy of the resistance of the sheet resistance R, wherein the areas of the extended heat dissipation portion, the heat conductive plugs 10, and the first metal heat dissipation layer 130 can be set to be large, so that a high heat dissipation efficiency can be obtained.
Fig. 3 is a partial plan view schematically showing a semiconductor device in another embodiment of the present utility model. Fig. 4 is a schematic cross-sectional view taken along line BB' in fig. 3. Referring to fig. 3 and 4, another embodiment of the present utility model relates to a semiconductor device, specifically a second semiconductor device 200. Similar to the first semiconductor device 100 described above, the second semiconductor device 200 also includes the semiconductor substrate 101 and a sheet resistance R formed on the semiconductor substrate 101, for example, a Shallow Trench Isolation (STI) surface formed in the semiconductor substrate 101. The sheet resistance R has two electrode contact terminals, namely a first electrode contact terminal 102 and a second electrode contact terminal 103, and the second semiconductor device 200 further includes at least one extended heat spreader (e.g., a first extended heat spreader 110a and a second extended heat spreader 110 b), a first interlayer dielectric layer 120, and a first metal heat spreader 130 formed on the surface of the first interlayer dielectric layer 120; each of the extended heat dissipation parts is a part of the sheet resistance R extending laterally from one of the electrode contact ends to the periphery of the sheet resistance R, the first interlayer dielectric layer 120 covers the sheet resistance R, the extended heat dissipation parts and the semiconductor substrate 101, and the first metal heat dissipation layer 130 is connected to the extended heat dissipation parts through the heat conductive plugs 10 disposed in the first interlayer dielectric layer 120. The second semiconductor device 200 may further include a metal electrode formed on the surface of the first interlayer dielectric layer 120, wherein the first metal electrode 140a is connected to the first electrode contact terminal 102 through at least one electrode plug 20, and the second metal electrode 140b is connected to the second electrode contact terminal 103 through at least one electrode plug 20.
The second semiconductor device 200 is different from the first semiconductor device 100 in that the first metal heat sink layer 130 is provided differently. The specific description is as follows.
As shown in fig. 1 and 2, in the first semiconductor device 100, the first metal heat dissipation layer 130 is distributed on the outer side of the sheet resistance R, specifically, the first metal heat dissipation layer 130 is connected to the first electrode contact 102 through the first extended heat dissipation portion 110a, and the portion of the first metal heat dissipation layer 130 connected to the first electrode contact 102 and the first extended heat dissipation portion 110a are both located on the outer side of the first electrode contact 102; the first metal heat sink layer 130 is further connected to the second electrode contact terminal 103 through a second extended heat sink portion 110b, and a portion of the first metal heat sink layer 130 connected to the second electrode contact terminal 103 and the second extended heat sink portion 110b are both located outside the second electrode contact terminal 103. In addition, in the first semiconductor device 100, the first metal heat dissipation layer 130 is disconnected from the metal electrode.
Referring to fig. 3 and 4, in the second semiconductor device 200, the first metal heat dissipation layer 130 is connected to one of the extended heat dissipation parts through the heat conductive plug 10, so that the first metal heat dissipation layer 130 has a portion located directly above the heat conductive plug 10, and the first metal heat dissipation layer 130 also extends from directly above the heat conductive plug 10 to directly above the sheet resistance R, that is, a portion of an orthographic projection of the first metal heat dissipation layer 130 on a two-dimensional plane in which the sheet resistance R is located within a range of the sheet resistance R, that is, a portion of the first metal heat dissipation layer 130 is disposed directly above the sheet resistance R with the first interlayer dielectric layer 120 therebetween, further, the first metal heat dissipation layer 130 may cover almost the entire range of the sheet resistance R, and the portions of the first metal heat dissipation layer 130 respectively connecting the two electrode contact ends are disconnected. In this case, the first metal heat dissipation layer 130 may dissipate the heat transferred by the first interlayer dielectric layer 120 on the sheet resistance R in addition to the heat transferred by the heat conductive plug 10 and the surrounding first interlayer dielectric layer 120, so as to further improve the heat dissipation efficiency.
In the second semiconductor device 200, the first metal heat sink layer 130 and the metal electrode may be made of the same metal material and obtained by the same metal deposition and patterning process, wherein the first metal heat sink layer 130 is connected to the corresponding electrode contact terminal of the sheet resistor R through the heat conductive plug 10 and the corresponding extended heat sink, and the metal electrode is connected to the corresponding electrode contact terminal of the sheet resistor R through the electrode plug 20. In this embodiment, the first metal heat dissipation layer 130 connected to the same electrode contact end and the metal electrode may be connected to each other; specifically, the first metal heat dissipation layer 130 portion connected to the first electrode contact 102 and the corresponding metal electrode (i.e., the first metal electrode 140 a) are connected to each other, and/or the first metal heat dissipation layer 130 portion connected to the second electrode contact 103 and the corresponding metal electrode (i.e., the second metal electrode 140 b) are connected to each other, which helps to increase the heat dissipation area of the first metal heat dissipation layer 130, and the layout of the first metal heat dissipation layer 130 and the layer where the metal electrodes are located can be simplified.
Fig. 5 is a schematic partial cross-sectional view of a semiconductor device in yet another embodiment of the utility model. Referring to fig. 5, another embodiment of the present utility model relates to a semiconductor device, specifically a third semiconductor device 300. Similar to the first semiconductor device 100 described above, the third semiconductor device 300 also includes the semiconductor substrate 101 and a sheet resistance R formed on the semiconductor substrate 101, for example, a Shallow Trench Isolation (STI) surface formed in the semiconductor substrate 101. The sheet resistor R has two electrode contact terminals, namely a first electrode contact terminal 102 and a second electrode contact terminal 103, and the third semiconductor device 300 further includes at least one extended heat spreader (e.g., a first extended heat spreader 110a and a second extended heat spreader 110 b), a first interlayer dielectric layer 120, and a first metal heat spreader 130 disposed on the surface of the first interlayer dielectric layer 120; each of the extended heat dissipation parts is a part of the sheet resistance R extending laterally from one of the electrode contact ends to the periphery of the sheet resistance R, the first interlayer dielectric layer 120 covers the sheet resistance R, the extended heat dissipation parts and the semiconductor substrate 101, and the first metal heat dissipation layer 130 is connected to the extended heat dissipation parts through the heat conductive plugs 10 disposed in the first interlayer dielectric layer 120. The first metal heat dissipation layer 130 is embedded on the surface of the first interlayer dielectric layer 120, but not limited thereto, and the first metal heat dissipation layer 130 may be located on the surface of the first interlayer dielectric layer 120 according to different manufacturing processes.
The third semiconductor device 300 may further include a metal electrode formed on the surface of the first interlayer dielectric layer 120, wherein the first metal electrode 140a is connected to the first electrode contact terminal 102 through at least one electrode plug 20, and the second metal electrode 140b is connected to the second electrode contact terminal 103 through at least one electrode plug 20.
The third semiconductor device 300 is mainly different from the first semiconductor device 100 in that the third semiconductor device 300 further has other layers formed on the first interlayer dielectric layer 120 and the first metal heat sink layer 130, which will be described below.
The third semiconductor device 300 further includes a second interlayer dielectric layer 150 stacked on the first interlayer dielectric layer 120 and a second metal heat dissipation layer 160 disposed on a surface of the second interlayer dielectric layer 150, where the second interlayer dielectric layer 150 covers the first metal heat dissipation layer 130 and the first interlayer dielectric layer 120, and the second metal heat dissipation layer 160 is connected to the first metal heat dissipation layer 130 through a heat conduction plug 10 disposed in the second interlayer dielectric layer 150. The second metal heat dissipation layer 160 may dissipate heat conducted by the second interlayer dielectric layer 150 and the heat conductive plugs 10 in the second interlayer dielectric layer 150, which helps to further improve heat dissipation efficiency. In order to reduce the contact resistance between the heat conductive plug 10 in the second interlayer dielectric layer 150 and the first metal heat sink layer 130 and enhance heat dissipation, a metal silicide layer (not shown) may be formed on the upper surface of the first metal heat sink layer 130.
In the third semiconductor device 300, a portion of the second metal heat dissipation layer 160 is connected to one electrode contact end (e.g., the first electrode contact end 102) of the sheet resistor R through at least one heat conduction plug 10, the first metal heat dissipation layer 130 and one of the extended heat dissipation portions (e.g., the first extended heat dissipation portion 102), another portion of the second metal heat dissipation layer 160 is connected to the other electrode contact end (e.g., the second electrode contact end 103) of the sheet resistor R through at least one heat conduction plug 10, the first metal heat dissipation layer 130 and the other of the extended heat dissipation portions (e.g., the second extended heat dissipation portion 103), and the portions of the second metal heat dissipation layer 160 respectively connected to the two electrode contact ends may be configured to be disconnected from each other, so as to help reduce the influence of the second metal heat dissipation layer 160 on the resistance value of the sheet resistor R and improve the resistance accuracy of the sheet resistor R.
In the third semiconductor device 300, the second metal heat dissipation layer 160 may be disposed directly above the heat conductive plugs 10 in the second interlayer dielectric layer 150. But is not limited thereto, alternatively, the second metal heat dissipation layer 160 may extend from directly above the heat conductive plug 10 in the second interlayer dielectric layer 150 to directly above the sheet resistance R. Further, the second metal heat dissipation layer 160 may cover almost the entire range of the sheet resistance R in order to dissipate heat conducted by the second interlayer dielectric layer 150. In addition, the first metal heat dissipation layer 130 may also extend from directly above the heat conductive plug 10 in the first interlayer dielectric layer 120 to directly above the sheet resistance R.
Optionally, the third semiconductor device 300 may further include an interlayer dielectric layer stacked on the second interlayer dielectric layer 150, a heat conductive plug disposed in the corresponding interlayer dielectric layer, and a metal heat dissipation layer disposed on a surface of the corresponding interlayer dielectric layer, where the metal heat dissipation layer may be connected to the sheet resistor R through the heat conductive plug formed in each interlayer dielectric layer, the second metal heat dissipation layer 160, the first metal heat dissipation layer 130, and the extended heat dissipation portion, so as to dissipate heat, thereby contributing to further improving heat dissipation efficiency.
Referring to fig. 5, the third semiconductor device 300 may further include a passivation layer 170 formed on the metal heat sink layer, the passivation layer 170 having heat sink holes 170a, the heat sink holes 170a exposing the second metal heat sink layer 160 when the passivation layer 170 is stacked on the second metal heat sink layer 160, or the heat sink holes 170a exposing the metal heat sink layer between the second metal heat sink layer 160 and the passivation layer 170 when the metal heat sink layer is further disposed between the second metal heat sink layer 160 and the passivation layer 170, the heat sink holes 170a facilitating rapid dissipation of heat within the semiconductor device 300 to the outside of the device.
In the semiconductor devices (such as the first semiconductor device 100, the second semiconductor device 200 and the third semiconductor device 300) described in the above embodiments, the extended heat dissipation portion has the function of dissipating heat generated by the sheet resistance R and conducting heat, and at least one metal heat dissipation layer (such as the first metal heat dissipation layer 130 and the second metal heat dissipation layer 160) is connected to the sheet resistance R through the heat conduction plug 10 disposed in the interlayer dielectric layer and the extended heat dissipation portion, so that heat dissipation can be accelerated, and the risk of resistance change and even burning out of the resistance caused by heat accumulation can be reduced. Since the extended heat dissipation portion is formed on the periphery of the sheet resistance R, the resistance of the sheet resistance R is not affected, and the areas of the extended heat dissipation portion, the heat conductive plugs 10, and the metal heat dissipation layers 130 can be set larger while the accuracy of the resistance of the sheet resistance R is ensured, and the heat conductive plugs 10 can be set plural, so that higher heat dissipation efficiency can be obtained.
The foregoing description is only illustrative of the preferred embodiments of the present utility model, and is not intended to limit the scope of the claims, and any person skilled in the art may make any possible variations and modifications to the technical solution of the present utility model using the method and technical content disclosed above without departing from the spirit and scope of the utility model, so any simple modification, equivalent variation and modification made to the above embodiments according to the technical matter of the present utility model fall within the scope of the technical solution of the present utility model.
Claims (10)
1. A semiconductor device comprising a semiconductor substrate and a sheet resistor disposed on the semiconductor substrate, the sheet resistor having two electrode contact terminals; and, the semiconductor device further includes:
at least one extended heat sink, each of the extended heat sinks being a portion of the sheet resistance extending laterally from one of the electrode contact ends to a periphery of the sheet resistance;
a first interlayer dielectric layer covering the sheet resistance, the extended heat spreader and the semiconductor substrate; and
the first metal heat dissipation layer is arranged on the surface of the first interlayer dielectric layer and is connected with the extended heat dissipation part through a heat conduction plug arranged in the first interlayer dielectric layer.
2. The semiconductor device of claim 1, wherein the semiconductor device comprises two of the extended heat sinks, the two extended heat sinks being connected to the two electrode contact terminals, respectively.
3. The semiconductor device according to claim 2, wherein a part of the first metal heat dissipation layer is connected to one of the electrode contact terminals through at least one of the heat conductive plugs and the corresponding extended heat dissipation portion, and another part of the first metal heat dissipation layer is connected to the other of the electrode contact terminals through at least one of the heat conductive plugs and the corresponding extended heat dissipation portion, and portions of the first metal heat dissipation layer respectively connected to the two electrode contact terminals are disconnected from each other.
4. The semiconductor device according to claim 2, further comprising:
and the two metal electrodes are arranged on the surface of the first interlayer dielectric layer, and each metal electrode is connected with one electrode contact end through an electrode plug formed in the first interlayer dielectric layer.
5. The semiconductor device of claim 4, wherein said first metal heat sink layer portion and said metal electrode connected to the same electrode contact are connected to each other.
6. The semiconductor device of claim 1, wherein the first metal heat spreader layer extends from directly above the thermally conductive plug in the first interlayer dielectric layer to directly above the sheet resistance.
7. The semiconductor device according to claim 1, further comprising:
the second interlayer dielectric layer is stacked on the first interlayer dielectric layer and covers the first metal heat dissipation layer and the first interlayer dielectric layer; and
the second metal heat dissipation layer is arranged on the surface of the second interlayer dielectric layer and is connected with the first metal heat dissipation layer through a heat conduction plug arranged in the second interlayer dielectric layer.
8. The semiconductor device of claim 7, wherein the second metal heat spreader layer extends from directly above the thermally conductive plug in the second interlayer dielectric layer to directly above the sheet resistance.
9. The semiconductor device according to claim 7, further comprising:
the passivation layer is arranged on the second metal heat dissipation layer and is provided with heat dissipation holes, and the heat dissipation holes expose the second metal heat dissipation layer or expose the metal heat dissipation layer between the second metal heat dissipation layer and the passivation layer.
10. The semiconductor device according to any one of claims 1 to 9, wherein the sheet resistance is a polysilicon resistance, a single crystal silicon resistance, a metal resistance, or a metal silicide resistance.
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