CN219799708U

CN219799708U - Storage battery internal resistance detection circuit

Info

Publication number: CN219799708U
Application number: CN202321251081.3U
Authority: CN
Inventors: 李明远; 郝春华
Original assignee: Qingdao Hantek Electronic Co ltd
Current assignee: Qingdao Hantek Electronic Co ltd
Priority date: 2023-05-23
Filing date: 2023-05-23
Publication date: 2023-10-03
Anticipated expiration: 2033-05-23

Abstract

The utility model discloses a storage battery internal resistance detection circuit, which comprises a sine wave generation circuit, a narrow-band filter circuit, a current conversion circuit, a common mode suppression circuit and a sampling module, wherein the sine wave generation circuit is connected with the narrow-band filter circuit; the current conversion circuit is provided with a resistor network, and the current conversion circuit selects resistors with different sizes through the resistor network to realize current multiplexing output with different sizes; the output end of the current conversion circuit is coupled to the input end of the common mode rejection circuit, and the output end of the common mode rejection circuit outputs a sinusoidal current signal to the internal resistance of the battery through SOURCE+ and SOURCE-; the sampling module comprises: the device comprises a sampling input circuit, a gain amplifying circuit, a true effective value converting circuit and a sampling circuit. According to the utility model, currents with different magnitudes are output to the internal resistance of the battery through the current conversion circuit according to actual application requirements, and the alternating-current voltage and the direct-current voltage of the internal resistance of the battery are respectively used for calculating the internal resistance value and measuring and displaying the voltage after being processed and sampled.

Description

Storage battery internal resistance detection circuit

Technical Field

The utility model relates to the technical field of measurement, in particular to a storage battery internal resistance detection circuit.

Background

The internal resistance of the battery is an important parameter for judging the electric quantity of the battery, when the battery is produced in a factory, the internal resistance value of the battery is required to be detected, and defective batteries which do not meet the requirement are selected to be eliminated;

the prior art can not meet the demands of people at present, and based on the present situation, the prior art needs to be improved.

Disclosure of Invention

The utility model aims to provide a storage battery internal resistance detection circuit which is used for solving the problems in the background technology.

The utility model provides a storage battery internal resistance detection circuit which comprises a sine wave generation circuit, a narrow-band filter circuit, a current conversion circuit, a common mode suppression circuit and a sampling module, wherein the sine wave generation circuit is connected with the narrow-band filter circuit;

the sine wave generation circuit includes: the device comprises an MCU, a first DAC and a first operational amplifier, wherein the first DAC is a current type DAC; the MCU is coupled to the control end of the first DAC, the output end of the first DAC is coupled to the positive input end of the first operational amplifier, the output end of the first DAC is coupled to the negative input end of the first operational amplifier, the output end of the first operational amplifier can directly output voltage signals with positive and negative polarities, and a stepped sine wave with the period of 1ms is generated;

the DAC rear stage is coupled to a narrow-band filter circuit, and the narrow-band filter circuit is used for filtering direct current and low frequency components of sine waves on one hand and filtering high frequency components on the other hand after narrow-band filtering, so that step-shaped sine waves are filtered into smooth sine waves

The current conversion circuit mainly includes: transistor Q1, transistor Q2, transistor Q3, transistor Q4, amplifier U3B, amplifier U3A, and a resistor network; the transistor Q1, the transistor Q2, the transistor Q3 and the transistor Q4 form a power expansion circuit of the amplifier U3B, the transistor Q1 and the pin 1 of the transistor Q2 are mutually coupled to form a constant current source, the pin 2 of the transistor Q1 is coupled to the pin 1 of the transistor Q3, the pin 2 of the transistor Q2 is coupled to the pin 1 of the transistor Q4, and the transistors Q1 and Q2 provide static bias currents for the transistors Q3 and Q4; the output end of the amplifier U3B is respectively coupled to the pins 1 of the triode Q3 and the triode Q4 through a diode D3, the triode Q3 and the triode Q4 are complementary transistors, the power output by the amplifier U3B is amplified, the output ends of the triode Q3 and the triode Q4 are coupled to a resistor network, and the current signals output by the triode Q3 and the triode Q4 are subjected to the resistor network to select resistors with different sizes so as to realize the current multiplexing output with different sizes;

the common mode rejection circuit includes: the device comprises an inductor L1, an inductor L2, a capacitor C15, a capacitor C14, a capacitor C16, a capacitor C21, a capacitor C37, a capacitor C158 and a transformer T1, wherein the capacitor C21, the inductor L1, the inductor L2 and the capacitor C15 form a pi filter, a common mode filter is formed by the capacitor C14, the capacitor C16, the capacitor C37, the capacitor C158 and the transformer T1, the common mode high frequency noise is filtered, and a sinusoidal current signal is output to the internal resistance of a battery through SOURCE+ and SOURCE-;

the sampling module comprises: the device comprises a sampling input circuit, a gain amplifying circuit, a true effective value converting circuit and a sampling circuit; wherein,,

the sampling input circuit includes: sinusoidal current signal input ends sense+ and SENSE-, a filter, a relay and a blocking capacitor;

the sinusoidal current signal flows through the internal resistance of the battery from the SOURCE+ and SOURCE-output, a sinusoidal voltage signal is formed on the internal resistance of the battery, and the sinusoidal voltage signal is superposed on the battery voltage, so that the sinusoidal voltage signal is firstly taken out through SENSE+ and SENSE-in the sampling input circuit, and after being filtered through a filter, one path of sinusoidal voltage signal is isolated by a relay through adopting a blocking capacitor C62, and alternating voltage is output; the other path directly outputs direct-current voltage through relay selection;

the gain amplification circuit includes: the alternating voltage output by the blocking capacitor C62 in the sampling input circuit is loaded at the input end of the first-stage amplifying circuit, the first-stage amplifying circuit amplifies a fixed multiple, the first-stage amplifying circuit and the second-stage amplifying circuit are connected in cascade, the reverse input end of the second-stage amplifying circuit is coupled with an analog switch, and the second-stage amplifying circuit amplifies the adjustable multiple through the analog switch

The true valid value conversion circuit includes: the output end of the gain amplification circuit is loaded to the input end of the true effective value conversion module, the true effective value conversion module converts the effective value of the sinusoidal alternating current signal into a direct current signal, the direct current signal is processed by the rectification and filtration circuit, and the direct current signal is amplified by the amplifier U15 and then is sent to the sampling circuit to acquire voltage;

the sampling circuit includes: an analog switch, a single-ended differential circuit and a unipolar ADC; the output end of the true effective value conversion circuit is coupled to the input end of the analog switch, the output end of the analog switch is loaded to the unipolar ADC through being coupled with the single-ended to differential circuit, and the negative voltage signal can be sent to the unipolar ADC to acquire the voltage V1 after being converted by the single-ended to differential circuit;

for bipolar ADC which can collect both positive voltage and negative voltage, a second technical scheme is adopted: the sampling circuit adopted in the embodiment comprises a bipolar ADC, the output end of the true effective value conversion circuit is directly coupled to the input end of the bipolar ADC, and the bipolar ADC can directly collect positive voltage or negative voltage, so that voltage V1 can also be collected; therefore, according to ohm's law, resistance=voltage/current, where the voltage is the voltage V1 and the current is the current output by the current conversion circuit, so as to calculate the internal resistance value.

The utility model has the following beneficial effects:

according to the utility model, currents with different magnitudes are output to the internal resistance of the battery through the current conversion circuit according to actual application requirements, and the alternating voltage and the direct voltage of the extracted internal resistance of the battery are respectively used for calculating the internal resistance value and measuring and displaying the voltage after being processed and sampled.

Drawings

FIG. 1 is a block diagram of the overall structure of the present utility model;

FIG. 2 is a schematic diagram of a sine wave generating circuit according to a first embodiment of the present utility model;

FIG. 3 is a schematic diagram of a sine wave generating circuit according to a second embodiment of the present utility model;

FIG. 4 is a schematic diagram of a current conversion circuit according to the present utility model;

FIG. 5 is a schematic diagram of a common mode rejection circuit of the present utility model;

FIG. 6 is a schematic diagram of a sampling input circuit of the sampling module of the present utility model;

FIG. 7 is a schematic diagram of a gain amplifying circuit of the sampling module of the present utility model;

FIG. 8 is a schematic diagram of a true effective value conversion circuit of the sampling module of the present utility model;

FIG. 9 is a schematic diagram of a sampling circuit according to a first embodiment of the sampling module of the present utility model;

FIG. 10 is a schematic diagram of a sampling circuit according to a second embodiment of the sampling module of the present utility model;

fig. 11 is a circuit diagram of the voltage measurement circuit of the present utility model.

Detailed Description

The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments obtained by those skilled in the art based on the present utility model without making any inventive effort fall within the scope of the present utility model.

Referring to fig. 1, the utility model provides a storage battery internal resistance detection circuit, which comprises a sine wave generation circuit, a narrow-band filter circuit, a current conversion circuit, a common mode rejection circuit and a sampling module;

referring to fig. 2, as an alternative embodiment of the present utility model, the sine wave generating circuit may adopt the technical scheme in fig. 2, wherein the first technical scheme is that the sine wave generating circuit includes: the device comprises an MCU, a first DAC and a first operational amplifier, wherein the first DAC is a current type DAC; the MCU is coupled to the control end of the first DAC, the output end of the first DAC is coupled to the positive input end of the first operational amplifier, the output end of the first DAC is coupled to the negative input end of the first operational amplifier, the output end of the first operational amplifier can directly output voltage signals with positive and negative polarities, and a stepped sine wave with the period of 1ms is generated;

referring to fig. 3, as an alternative embodiment of the present utility model, the sine wave generating circuit may further adopt a second technical solution, including: the device comprises an MCU, a second DAC, a first resistor, a second resistor and a second operational amplifier, wherein the second DAC is a voltage type DAC; the MCU is coupled to the control end of the second DAC, the output end of the second DAC is coupled to the positive input end of the second operational amplifier through the first resistor, and the MCU provides a reference voltage FREF and is coupled to the negative input end of the second operational amplifier through the second resistor; a unipolar voltage type second DAC is adopted to output a voltage signal, and the voltage signal is converted into a positive and negative voltage signal through a second operational amplifier.

In the embodiment, the MCU embeds a sine signal table, the DAC is written in by table lookup at fixed intervals, the DAC outputs a step-shaped sine wave, and the waveform contains a high-frequency signal, so that the embodiment is coupled to a narrow-band filter circuit at the rear stage of the DAC, and after the narrow-band filter circuit is adopted to carry out narrow-band filtering, on one hand, direct current and low-frequency components of the sine wave can be filtered, and on the other hand, high-frequency components can be filtered, and the step-shaped sine wave is filtered into a smooth sine wave.

Referring to fig. 4, in the embodiment, the DAC is a sinusoidal signal of a voltage type obtained by narrow-band filtering, and the measuring resistor needs to be a current signal, so the current converting circuit is used to convert the voltage into the current signal, and the current converting circuit mainly includes: transistor Q1, transistor Q2, transistor Q3, transistor Q4, amplifier U3B, amplifier U3A, and a resistor network; the transistor Q1, the transistor Q2, the transistor Q3 and the transistor Q4 form a power expansion circuit of the amplifier U3B, the transistor Q1 and the pin 1 of the transistor Q2 are mutually coupled to form a constant current source, the pin 2 of the transistor Q1 is coupled to the pin 1 of the transistor Q3, the pin 2 of the transistor Q2 is coupled to the pin 1 of the transistor Q4, and the transistors Q1 and Q2 provide static bias currents for the transistors Q3 and Q4; the output end of the amplifier U3B is respectively coupled to the pins 1 of the triode Q3 and the triode Q4 through a diode D3, the triode Q3 and the triode Q4 are complementary transistors, the power output by the amplifier U3B is amplified, the output ends of the triode Q3 and the triode Q4 are coupled to a resistor network, and the current signals output by the triode Q3 and the triode Q4 are subjected to the resistor network to select resistors with different sizes so as to realize the current multiplexing output with different sizes; according to the current range, the resistor network comprises a resistor R26, a resistor R22, a resistor R23, a resistor R24 and a resistor R25, and the resistance values of the resistor R26, the resistor R22, the resistor R23, the resistor R24 and the resistor R25 are increased by 10 times in sequence, and the resistor values are as follows: 0.01KΩ, 0.1KΩ, 1KΩ,10 KΩ,100 KΩ, 5 current output steps being realized: 100mA,10mA,1MA,100uA and 10uA.

Referring to fig. 5, in an embodiment, since a current signal output from a current conversion circuit has high frequency noise, the present utility model adopts a common mode rejection circuit to filter out common mode high frequency noise, the common mode rejection circuit includes: the device comprises an inductor L1, an inductor L2, a capacitor C15, a capacitor C14, a capacitor C16, a capacitor C21, a capacitor C37, a capacitor C158 and a transformer T1, wherein the capacitor C21, the inductor L1, the inductor L2 and the capacitor C15 form a pi filter, a common mode filter is formed by the capacitor C14, the capacitor C16, the capacitor C37, the capacitor C158 and the transformer T1, the common mode high frequency noise is filtered, and a sinusoidal current signal is output to the internal resistance of a battery through SOURCE+ and SOURCE-.

Since the final objective of the present utility model is to measure a specific value of the internal resistance of the battery, and the current conversion circuit can output currents with different magnitudes by selecting resistors with different magnitudes, the internal resistance of the battery can be obtained by measuring the resistance=voltage/current according to ohm's law, in the embodiment, the voltage V1 is measured by using a sampling module, and the sampling module includes: the device comprises a sampling input circuit, a gain amplifying circuit, a true effective value converting circuit and a sampling circuit; wherein,,

referring to fig. 6, the sampling input circuit includes: sinusoidal current signal input ends sense+ and SENSE-, a filter, a relay and a blocking capacitor;

in the embodiment, sine current signals flow through the internal resistance of the battery from SOURCE+ and SOURCE-outputs, sine voltage signals are formed on the internal resistance of the battery, and the sine voltage signals are superposed on the voltage of the battery, so that the sine voltage signals are firstly taken out through SENSE+ and SENSE-in a sampling input circuit, filtered through a filter, and then one path of sine voltage signals is isolated from direct current through a relay by adopting a blocking capacitor C62, and alternating voltage is output; the other path directly outputs direct-current voltage through relay selection;

referring to fig. 7, in the embodiment, after a current flows through an external resistor, a voltage drop formed on the resistor is small and is not easy to measure, and the embodiment adopts a gain amplification circuit to amplify an output ac voltage, where the gain amplification circuit includes: the alternating voltage output by the blocking capacitor C62 in the sampling input circuit is loaded at the input end of the first-stage amplifying circuit, the first-stage amplifying circuit and the second-stage amplifying circuit are connected in cascade, the reverse input end of the second-stage amplifying circuit is coupled with an analog switch, the second-stage amplifying circuit amplifies the adjustable multiple through the analog switch, for example, the first-stage amplifying multiple is 180 times, the second-stage amplifying multiple is 1, 10 and 100 times respectively, and the specific amplified data are processed as shown in the following table:

resistance measuring range	Current measuring range	Second stage gain	Amplification process
				3mΩ	100mA	100	3mΩ×100mA×180×100＝5.4V
30mΩ	100mA	10	30mΩ×100mA×180×10＝5.4V
				300mΩ	10mA	10	300mΩ×10mA×180×10＝5.4V
3Ω	1mA	10	3Ω×1mA×180×10＝5.4V
				30Ω	100uA	10	30Ω×100uA×180×10＝5.4V
300Ω	10uA	10	300Ω×10uA×180×10＝5.4V
				3000Ω	10uA	1	3000Ω×10uA×180×1＝5.4V

Referring to fig. 8, in an embodiment, the sinusoidal voltage signal output by the gain amplifying circuit cannot directly drive the ADC, and the ADC cannot collect the voltage, so in an embodiment, the present utility model uses a true effective value conversion circuit to convert the effective value of the sinusoidal ac signal, where the true effective value conversion circuit includes: the output end of the gain amplification circuit is loaded to the input end of the true effective value conversion module, the true effective value conversion module converts the effective value of the sinusoidal alternating current signal into a direct current signal, the direct current signal is processed by the rectification and filtration circuit, and the direct current signal is amplified by the amplifier U15 and then is sent to the sampling circuit to collect voltage.

In the embodiment, the alternating current signal is always a positive voltage signal after the conversion of the effective value, and the battery can be connected positively or reversely, and the positive voltage is generated during positive connection, and the negative voltage is generated during reverse connection, so that the sampling circuit can collect both the positive voltage and the negative voltage, but the single-polarity ADC can collect only the positive voltage and can not collect the negative voltage, and the utility model provides the following two technical schemes of the sampling circuit;

referring to fig. 9, for a unipolar ADC that can collect only a positive voltage and cannot collect a negative voltage, a first technical solution is adopted: the sampling circuit adopted in this embodiment includes: an analog switch, a single-ended differential circuit and a unipolar ADC; the output end of the true effective value conversion circuit is coupled to the input end of the analog switch, the output end of the analog switch is loaded to the unipolar ADC through being coupled with the single-ended to differential circuit, and the negative voltage signal can be sent to the unipolar ADC to acquire the voltage V1 after being converted by the single-ended to differential circuit;

referring to fig. 10, for a bipolar ADC capable of collecting both positive voltage and negative voltage, a second technical scheme is adopted: the sampling circuit adopted in the embodiment comprises a bipolar ADC, the output end of the true effective value conversion circuit is directly coupled to the input end of the bipolar ADC, and the bipolar ADC can directly collect positive voltage or negative voltage, so that voltage V1 can also be collected; therefore, according to ohm's law, resistance=voltage/current, where voltage is the above-mentioned voltage V1 and current is the current output by the current conversion circuit.

Referring to fig. 11, as another alternative solution of the present utility model, the present embodiment further provides a voltage measurement circuit that provides a voltage measurement function displayed in real time, the voltage measurement circuit including: the input end of the attenuation circuit is coupled with one end of the relay for selecting direct output direct current voltage, the output end of the attenuation circuit is coupled with the low-pass filter circuit, and the output end of the low-pass filter circuit is used as the output end of the voltage measuring circuit to be loaded to the input end of the ADC; in addition, the ac current extracted from sense+ and SENSE-produces an ac voltage on the battery, which is superimposed on the voltage of the battery and collected by the subsequent sampling circuit, so that the voltage V2 is collected by the sampling circuit after low-pass filtering by the low-pass filtering circuit.

In the embodiment, the output end of the voltage measurement circuit and the output end of the true effective value conversion circuit are both loaded to the input end of the ADC of the sampling circuit, and if the first sampling circuit technical scheme is adopted, the sampling circuit selectively collects the voltage V1 output by the true effective value conversion circuit or the voltage V2 output by the voltage measurement circuit through the analog switch; if the second sampling circuit technical scheme is adopted, the bipolar ADC is provided with a chip selection pin, and the sampling circuit selectively collects the voltage V1 output by the true effective value conversion circuit or the voltage V2 output by the voltage measurement circuit through the chip selection pin; whether the first sampling circuit technical scheme or the second sampling circuit technical scheme is adopted, when the sampling circuit selects to collect the voltage V1 output by the true effective value conversion circuit, the collected voltage V1 is used for calculating the internal resistance of the battery; when the sampling circuit selects to collect the voltage V2 output by the voltage measurement circuit, the collected voltage V2 is used for being coupled to a display screen, and the voltage V2 is displayed.

Although the present utility model has been described with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described, or equivalents may be substituted for elements thereof, and any modifications, equivalents, improvements and changes may be made without departing from the spirit and principles of the present utility model.

Claims

1. A battery internal resistance detection circuit, characterized by comprising: the device comprises a sine wave generating circuit, a narrow-band filter circuit, a current conversion circuit, a common mode rejection circuit and a sampling module;

the sine wave generation circuit includes: the device comprises an MCU, a first DAC and a first operational amplifier, wherein the first DAC is a current type DAC; the MCU is coupled to the control end of the first DAC, the output end of the first DAC is coupled to the positive input end of the first operational amplifier, the output end of the first DAC is coupled to the negative input end of the first operational amplifier, the output end of the first operational amplifier outputs voltage signals with positive and negative polarities, and a stepped sine wave with the period of 1ms is generated;

the first DAC rear stage is coupled to the narrow-band filter circuit, and the output end of the narrow-band filter circuit is coupled to the input end of the current conversion circuit;

the current conversion circuit is provided with a resistor network, and the current conversion circuit selects resistors with different sizes through the resistor network to realize current multiplexing output with different sizes;

the output end of the current conversion circuit is coupled to the input end of the common mode rejection circuit, and the output end of the common mode rejection circuit outputs a sinusoidal current signal to the internal resistance of the battery through SOURCE+ and SOURCE-;

the sampling input circuit takes out sinusoidal voltage signals from the internal resistance of the battery through sinusoidal current signal input ends sense+ and SENSE-, the sinusoidal current signal input ends sense+ and SENSE-are coupled to a filter, the output end of the filter is coupled to a relay, and one output end of the relay isolates direct current through a blocking capacitor C62 and outputs alternating voltage; the other output end of the relay directly outputs direct-current voltage;

the gain amplification circuit includes: the sampling circuit comprises a first-stage amplifying circuit, a second-stage amplifying circuit and an analog switch, wherein alternating voltage output by a blocking capacitor C62 in the sampling input circuit is loaded at the input end of the first-stage amplifying circuit, and the first-stage amplifying circuit amplifies a fixed multiple; the first-stage amplifying circuit and the second-stage amplifying circuit are connected in cascade, the reverse input end of the second-stage amplifying circuit is coupled with the analog switch, and the second-stage amplifying circuit amplifies the adjustable multiple through the analog switch;

the true valid value conversion circuit includes: the output end of the gain amplifying circuit is loaded to the input end of the true effective value conversion module, and the true effective value conversion module converts the effective value of the sinusoidal alternating current signal into a direct current signal;

the sampling circuit includes: an analog switch, a single-ended differential circuit and a unipolar ADC; the output end of the true effective value conversion circuit is coupled to the input end of the analog switch, the output end of the analog switch is loaded to the unipolar ADC through the coupling single-ended to differential circuit, and the negative voltage signal is sent to the unipolar ADC to collect the voltage V1 after being converted by the single-ended to differential circuit.

2. The internal resistance detection circuit for a storage battery according to claim 1, wherein: the current conversion circuit further includes: transistor Q1, transistor Q2, transistor Q3, transistor Q4, amplifier U3B, amplifier U3A; the transistor Q1, the transistor Q2, the triode Q3 and the triode Q4 form a power expansion circuit of the amplifier U3B;

the constant current source is formed by mutually coupling the pins 1 of the transistor Q1 and the transistor Q2, the pin 2 of the transistor Q1 is coupled to the pin 1 of the triode Q3, the pin 2 of the transistor Q2 is coupled to the pin 1 of the triode Q4, and the transistors Q1 and Q2 provide static bias currents for the triodes Q3 and Q4;

the output end of the amplifier U3B is respectively coupled to the No. 1 pins of the triode Q3 and the triode Q4 through a diode D3, the triode Q3 and the triode Q4 are complementary transistors, and the output ends of the triode Q3 and the triode Q4 are coupled to a resistor network.

3. The internal resistance detection circuit for a storage battery according to claim 1, wherein: the common mode rejection circuit includes: the capacitor comprises an inductor L1, an inductor L2, a capacitor C15, a capacitor C14, a capacitor C16, a capacitor C21, a capacitor C37, a capacitor C158 and a transformer T1, wherein the capacitor C21, the inductor L1, the inductor L2 and the capacitor C15 form a pi filter, and the capacitor C14, the capacitor C16, the capacitor C37, the capacitor C158 and the transformer T1 form a common-mode filter.

4. The internal resistance detection circuit for a storage battery according to claim 1, wherein: the sampling circuit also comprises a voltage measuring circuit, and the voltage measuring circuit comprises: the input end of the attenuation circuit is coupled with one end of the relay for selecting direct output direct current voltage, the output end of the attenuation circuit is coupled with the low-pass filter circuit, and the output end of the low-pass filter circuit is used as the output end of the voltage measuring circuit to be loaded to the input end of the ADC;

the output end of the voltage measuring circuit and the output end of the true effective value converting circuit are both loaded to the input end of the ADC of the sampling circuit, and the sampling circuit selectively collects the voltage V1 output by the true effective value converting circuit or the voltage V2 output by the voltage measuring circuit through an analog switch.

5. The storage battery internal resistance detection circuit is characterized by comprising a sine wave generation circuit, a narrow-band filter circuit, a current conversion circuit, a common mode suppression circuit and a sampling module;

the sine wave generation circuit includes: the device comprises an MCU, a second DAC, a first resistor, a second resistor and a second operational amplifier, wherein the second DAC is a voltage type DAC; the MCU is coupled to the control end of the second DAC, the output end of the second DAC is coupled to the positive input end of the second operational amplifier through the first resistor, and the MCU provides a reference voltage FREF and is coupled to the negative input end of the second operational amplifier through the second resistor; the second DAC outputs a voltage signal and converts the voltage signal into a positive and negative voltage signal through a second operational amplifier;

the second DAC rear stage is coupled to the narrow-band filter circuit, and the output end of the narrow-band filter circuit is coupled to the input end of the current conversion circuit;

the sampling circuit includes: an analog switch, a single-ended differential circuit and a unipolar ADC; the output end of the true effective value conversion circuit is coupled to the input end of the analog switch, the output end of the analog switch is loaded to the unipolar ADC through the coupling single-ended to differential circuit, and the negative voltage signal can be sent to the unipolar ADC to acquire the voltage V1 after being converted by the single-ended to differential circuit.

6. The internal resistance detection circuit for a storage battery according to claim 5, wherein: the sampling circuit further comprises a voltage measuring circuit, and the voltage measuring circuit comprises: the input end of the attenuation circuit is coupled with one end of the relay for selecting direct output direct current voltage, the output end of the attenuation circuit is coupled with the low-pass filter circuit, and the output end of the low-pass filter circuit is used as the output end of the voltage measuring circuit to be loaded to the input end of the ADC;

7. The storage battery internal resistance detection circuit is characterized by comprising a sine wave generation circuit, a narrow-band filter circuit, a current conversion circuit, a common mode suppression circuit and a sampling module;

the sampling circuit comprises a bipolar ADC, the output end of the true effective value conversion circuit is directly coupled to the input end of the bipolar ADC, and the bipolar ADC can directly collect positive voltage or negative voltage and collect voltage V1.

8. The internal resistance detection circuit for a storage battery according to claim 7, wherein: the sampling circuit further comprises a voltage measuring circuit, and the voltage measuring circuit comprises: the input end of the attenuation circuit is coupled with one end of the relay for selecting direct output direct current voltage, the output end of the attenuation circuit is coupled with the low-pass filter circuit, and the output end of the low-pass filter circuit is used as the output end of the voltage measuring circuit to be loaded to the input end of the ADC;

the output end of the voltage measuring circuit and the output end of the true effective value converting circuit are both loaded to the input end of the ADC of the sampling circuit, and the sampling circuit selectively collects the voltage V1 output by the true effective value converting circuit or the voltage V2 output by the voltage measuring circuit through a chip selection pin of the ADC.

9. The storage battery internal resistance detection circuit is characterized by comprising a sine wave generation circuit, a narrow-band filter circuit, a current conversion circuit, a common mode suppression circuit and a sampling module;

10. The internal resistance detection circuit for a storage battery according to claim 9, wherein: the sampling circuit further comprises a voltage measuring circuit, and the voltage measuring circuit comprises: the input end of the attenuation circuit is coupled with one end of the relay for selecting direct output direct current voltage, the output end of the attenuation circuit is coupled with the low-pass filter circuit, and the output end of the low-pass filter circuit is used as the output end of the voltage measuring circuit to be loaded to the input end of the ADC;

the output end of the voltage measuring circuit and the output end of the true effective value conversion circuit are both loaded to the input end of the ADC of the sampling circuit;

the sampling circuit selectively collects the voltage V1 output by the true effective value conversion circuit or the voltage V2 output by the voltage measurement circuit through the chip selection pin of the ADC.