CN219739949U - Commercial power overvoltage and undervoltage protection circuit - Google Patents

Commercial power overvoltage and undervoltage protection circuit Download PDF

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Publication number
CN219739949U
CN219739949U CN202320973867.XU CN202320973867U CN219739949U CN 219739949 U CN219739949 U CN 219739949U CN 202320973867 U CN202320973867 U CN 202320973867U CN 219739949 U CN219739949 U CN 219739949U
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China
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circuit
pin
nand gate
resistor
capacitor
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CN202320973867.XU
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Chinese (zh)
Inventor
周瑾
凌湘
殷俊秋
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Jiangsu Huazhou Electric Co ltd
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Jiangsu Huazhou Electric Co ltd
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Abstract

The utility model discloses a mains supply overvoltage and undervoltage protection circuit in the field of mains supply protection, which comprises a transformation circuit, a rectification circuit, a sampling circuit, a filtering voltage stabilizing circuit, a triggering circuit, a load circuit and a load circuit, wherein the transformation circuit is respectively connected with the power supply and the rectification circuit; the utility voltage is reduced through the voltage transformation circuit, and then the voltage is converted into stable direct current through the rectifying circuit and the filtering voltage stabilizing circuit, so that stable voltage is provided for the trigger circuit, the sampling circuit directly obtains the output direct current voltage after the rectifying circuit, and the change condition of the power voltage can be obtained more truly and fed back to the trigger circuit, so that the on-off of the load circuit is realized.

Description

Commercial power overvoltage and undervoltage protection circuit
Technical Field
The utility model relates to a mains supply overvoltage and undervoltage protection circuit in the field of mains supply protection.
Background
In the prior art, publication numbers: CN 209169934U, announcement date: 2019.07.26 an input mains supply overvoltage and undervoltage protection circuit comprises a mains supply network, and the input mains supply overvoltage and undervoltage protection circuit further comprises: the circuit comprises a mains supply detection module, a first detection module and a second detection module which are connected to the mains supply detection module, a first switch module connected to the first detection module, a low-level control module connected to the first switch module, a second switch module connected to the second detection module, and a voltage regulation module connected to the second switch module, wherein the voltage regulation module is also electrically connected with a constant voltage module; in the circuit, after the direct current filtering treatment is carried out on the utility grid, the divided voltage is compared with the reference voltage of the controlled thyristor in a resistor voltage division mode, so that the circuit is rapidly disconnected or conducted, the signal output of the low-voltage control end is controlled, and the environment-friendly protection circuit with high efficiency, high accuracy, low energy consumption and low cost is formed. However, the sampled voltage is stabilized, so that the sampled voltage cannot truly reflect the change of the voltage and cannot feed back the real condition of the voltage to the comparison control circuit, and therefore the protection circuit can be subjected to the problem of false disconnection and false connection.
Disclosure of Invention
The utility model aims to provide a mains supply overvoltage and undervoltage protection circuit which is more accurate in sampling and more accurately reflects the real situation of mains supply voltage, so that the on-off of a load circuit is more accurately controlled, and the overvoltage and undervoltage protection is realized.
In order to achieve the above purpose, the utility model provides a mains supply overvoltage and undervoltage protection circuit, which comprises a voltage transformation circuit, wherein the voltage transformation circuit is respectively connected with a power supply and a rectification circuit, the rectification circuit is respectively connected with a sampling circuit and a filtering voltage stabilizing circuit, the filtering voltage stabilizing circuit is connected with a trigger circuit, the trigger circuit is connected with the sampling circuit, the trigger circuit is also connected with a load circuit, and the load circuit is connected with the power supply.
Compared with the prior art, the utility model has the beneficial effects that the voltage of the commercial power is reduced through the voltage transformation circuit, and then the voltage is converted into stable direct current through the rectifying circuit and the filtering voltage stabilizing circuit, so that the stable voltage is provided for the trigger circuit, and the sampling circuit directly obtains the output direct current voltage after the rectifying circuit, so that the change condition of the power supply voltage can be obtained more truly and fed back to the trigger circuit, and the on-off of the load circuit is realized.
As a further improvement of the utility model, the transformation circuit comprises a transformer T1, the rectification circuit comprises a rectification bridge D1, the input end of the transformer T1 is connected with the mains supply, the output end of the transformer is connected with the pin 2 and the pin 3 of the rectification bridge D1, and the pin 1 of the rectification bridge D1 is respectively connected with the sampling circuit and the filtering voltage stabilizing circuit.
In this way, the transformer is used for reducing the voltage of the commercial power, and then the rectifier bridge is used for finishing, so that the four diodes in the rectifier bridge D1 are alternately turned on or turned off no matter whether the commercial power is in a positive half period or a negative half period, and the pulsating direct current in a single direction can be obtained.
As a further improvement of the utility model, the filtering voltage stabilizing circuit comprises a capacitor C1, the positive electrode of the capacitor C1 is respectively connected with the No. 1 pin of the rectifier bridge D1 and one end of a resistor R4, the negative electrode of the capacitor C1 is connected with the No. 4 pin of the rectifier bridge D1, the other end of the resistor R4 is connected with the positive electrode of the capacitor C4, the negative electrode of the capacitor C4 is connected with the negative electrode of the capacitor C1, and the capacitor C4 is also connected with a voltage stabilizing diode D2 in parallel.
Thus, the capacitors C1 and C4, the resistor R4 and the zener diode switch D2 are matched to realize the filtering and voltage stabilization of direct current, so that stable direct current voltage is provided for subsequent circuits.
As a further improvement of the utility model, the sampling circuit comprises a variable resistor RP1, one end of the variable resistor RP1 is connected with the pin 1 of the rectifier bridge D1 through a resistor R6, the other end of the variable resistor RP1 is grounded, the variable end of the variable resistor RP1 is connected with the pin B of the nand gate U1, the pin a of the nand gate U1 is respectively connected with the cathode of the zener diode D2 and the pin a of the nand gate U3, and the pin Y of the nand gate U1 is respectively connected with the pin a of the nand gate U2 and the pin a of the nand gate U4; the pin B of the NAND gate U2 is connected with the variable end of the variable resistor RP2, one end of the variable resistor RP2 is connected with one end of the variable resistor RP1, the other end of the variable resistor RP2 is grounded, the pin A of the NAND gate U2 is connected with the cathode of the light-emitting diode VD2, the anode of the light-emitting diode VD2 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the cathode of the zener diode D2, and the pin Y of the NAND gate U2 is respectively connected with the pin B of the NAND gate U3 and the pin B of the NAND gate U4; the Y pin of NAND gate U3 links to each other with trigger circuit, and the Y pin of NAND gate U4 links to each other with the negative pole of emitting diode VD1, and emitting diode VD 1's positive pole links to each other with resistance R1's one end, and resistance R1's the other end links to each other with zener diode D2's negative pole, and resistance R2's the other end still links to each other with resistance R3's one end, and resistance R3's the other end links to each other with emitting diode VD 3's positive pole, and emitting diode VD 3's negative pole ground.
When the supply voltage of the mains supply rises to the highest allowable voltage, the sampling voltage output by the variable resistor RP1 is loaded to the pin B of the NAND gate U1, the sampling voltage is directly obtained from the rectified direct current voltage, the A of the NAND gate U1 is also loaded with the direct current voltage after filtering voltage stabilization treatment, so that the pin Y of the U1 outputs a low level and is directly loaded on the cathode of the VD2, so that the VD2 emits light to instruct, and the other path is added to the pin A of the U2, so that the U2 outputs a high level, is inverted to a low level through the U3 and is then added to the trigger circuit, thereby providing a trigger signal for the trigger circuit and further cutting off the load circuit; similarly, when the power supply voltage is lower than the minimum allowable voltage, the load circuit is cut off; only the mains voltage is in the normal range and the load circuit is continuously energized.
As a further improvement of the utility model, the trigger circuit comprises a 555 monostable trigger U5, wherein a RST pin and a VCC pin of the 555 monostable trigger U5 are connected with the other end of a resistor R1, a DIS pin and a THR pin of the 555 monostable trigger U5 are connected, a DIS pin of the 555 monostable trigger U5 is connected with the negative electrode of a voltage stabilizing diode D2 through the resistor R5, a THR pin of the 555 monostable trigger U5 is connected with the positive electrode of a capacitor C2, the negative electrode of the capacitor C2 is grounded, a CON pin of the 555 monostable trigger U5 is grounded through a capacitor C3, a GND pin of the 555 monostable trigger U5 is grounded, an OUT pin of the 555 monostable trigger U5 is connected with the positive electrode of a light emitting diode VD4 through a resistor R7, the negative electrode of the light emitting diode VD4 is grounded, the light emitting diode VD4 is connected with a coil of a relay K in parallel, and a normally-closed contact of the relay is connected with a load circuit.
When the TRI pin of the 555 monostable trigger U5 is loaded with low level of U3 reverse phase output, the OUT pin of the 555 monostable trigger U5 outputs high level, so that the coil of the relay K is electrified and sucked, the normally closed contact is disconnected, and the load circuit is cut off from the mains voltage, so that the load circuit is protected; when the TRI pin of the 555 monostable trigger U5 is loaded with the high level of the U3 inverted output, the OUT pin of the 555 monostable trigger U5 outputs the low level, so that the coil of the relay K is powered off, the normally closed contact is used for reconnecting the load circuit with the mains voltage, and the load circuit is powered on continuously.
Drawings
Fig. 1 is a block diagram of the present utility model.
Fig. 2 is a circuit diagram of the present utility model.
Description of the embodiments
The utility model is further described below with reference to the accompanying drawings:
the utility power overvoltage and undervoltage protection circuit as shown in fig. 1-2 comprises a transformation circuit, wherein the transformation circuit is respectively connected with a power supply and a rectification circuit, the rectification circuit is respectively connected with a sampling circuit and a filtering voltage stabilizing circuit, the filtering voltage stabilizing circuit is connected with a trigger circuit, the trigger circuit is connected with the sampling circuit, the trigger circuit is also connected with a load circuit, and the load circuit is connected with the power supply.
The transformation circuit includes transformer T1, and rectifier circuit includes rectifier bridge D1, and transformer T1's input links to each other with the commercial power, and the output of transformer links to each other with rectifier bridge D1's No. 2 foot and No. 3 foot, and rectifier bridge D1's No. 1 foot links to each other with sampling circuit and filtering voltage stabilizing circuit respectively.
The filter voltage stabilizing circuit comprises a capacitor C1, the positive electrode of the capacitor C1 is connected with the No. 1 pin of the rectifier bridge D1 and one end of a resistor R4 respectively, the negative electrode of the capacitor C1 is connected with the No. 4 pin of the rectifier bridge D1, the other end of the resistor R4 is connected with the positive electrode of the capacitor C4, the negative electrode of the capacitor C4 is connected with the negative electrode of the capacitor C1, and the capacitor C4 is connected with a voltage stabilizing diode D2 in parallel.
The sampling circuit comprises a variable resistor RP1, one end of the variable resistor RP1 is connected with a pin 1 of a rectifier bridge D1 through a resistor R6, the other end of the variable resistor RP1 is grounded, the variable end of the variable resistor RP1 is connected with a pin B of a NAND gate U1, a pin A of the NAND gate U1 is respectively connected with the negative electrode of a zener diode D2 and a pin A of a NAND gate U3, and a pin Y of the NAND gate U1 is respectively connected with a pin A of a NAND gate U2 and a pin A of a NAND gate U4; the pin B of the NAND gate U2 is connected with the variable end of the variable resistor RP2, one end of the variable resistor RP2 is connected with one end of the variable resistor RP1, the other end of the variable resistor RP2 is grounded, the pin A of the NAND gate U2 is connected with the cathode of the light-emitting diode VD2, the anode of the light-emitting diode VD2 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the cathode of the zener diode D2, and the pin Y of the NAND gate U2 is respectively connected with the pin B of the NAND gate U3 and the pin B of the NAND gate U4; the Y pin of NAND gate U3 links to each other with trigger circuit, and the Y pin of NAND gate U4 links to each other with the negative pole of emitting diode VD1, and emitting diode VD 1's positive pole links to each other with resistance R1's one end, and resistance R1's the other end links to each other with zener diode D2's negative pole, and resistance R2's the other end still links to each other with resistance R3's one end, and resistance R3's the other end links to each other with emitting diode VD 3's positive pole, and emitting diode VD 3's negative pole ground.
The trigger circuit comprises a 555 monostable trigger U5, wherein a RST pin and a VCC pin of the 555 monostable trigger U5 are connected with the other end of a resistor R1, a DIS pin and a THR pin of the 555 monostable trigger U5 are connected, a DIS pin of the 555 monostable trigger U5 is connected with the negative electrode of a voltage stabilizing diode D2 through the resistor R5, a THR pin of the 555 monostable trigger U5 is connected with the positive electrode of a capacitor C2, the negative electrode of the capacitor C2 is grounded, a CON pin of the 555 monostable trigger U5 is grounded through the capacitor C3, a GND pin of the 555 monostable trigger U5 is grounded, an OUT pin of the 555 monostable trigger U5 is connected with the positive electrode of a light emitting diode VD4 through a resistor R7, the negative electrode of the light emitting diode VD4 is grounded, the light emitting diode VD4 is connected with a coil of a relay K in parallel, and a normally-closed contact of the relay is connected with a load circuit.
In the utility model, the circuit needs to be debugged before use, firstly, the power supply voltage is adjusted to the upper limit voltage allowed by the mains supply, then the variable resistor RP2 is adjusted to the lowest end, and the variable resistor RP1 is adjusted to enable the light-emitting diode VD1 to just emit light for indication, and meanwhile, the coil of the relay K can be attracted; then, the connected power supply voltage for debugging is adjusted to the allowable lower limit voltage of the commercial power, at the moment, the variable resistor RP1 is unchanged, the variable resistor RP2 is adjusted, the light-emitting diode VD1 just emits light to indicate, and the coil of the relay K also absorbs the light.
When the power supply voltage is in the normal range, the light emitting diode VD3 emits light to indicate that the coil of the relay K is not powered, the normally closed contact point communicates a load circuit (the load circuit is shown in fig. 2 and takes a bulb as an example) with the power supply, and the load circuit works normally.
When the power supply voltage of the mains supply rises to the highest allowable voltage, the sampling voltage output by the variable resistor RP1 is loaded to the pin B of the NAND gate U1, the sampling voltage is directly obtained from the rectified direct current voltage, the A of the NAND gate U1 is also loaded with the direct current voltage after filtering voltage stabilization treatment, so that the pin Y of the U1 outputs a low level and is directly loaded on the cathode of the VD2, so that the VD2 emits light to instruct, the other path is added to the pin A of the U2, so that the U2 outputs a high level, the U3 is inverted to a low level and then is added to the THR pin of the 555 monostable trigger U5, so that a trigger signal is given to the 555 monostable trigger U5, the pin OUT of the trigger signal outputs a high level, so that the coil of the relay K is electrified and closed, and the contact is disconnected, so that the load circuit and the mains supply voltage are cut off, and the load circuit is protected; and when the mains supply is recovered to be normal, the coil of the relay K is powered off, and the normally closed contact is closed again to connect and conduct the load circuit with the mains supply again.
When the supply voltage of the mains supply is reduced to the lowest allowable voltage, the sampling voltage output by the variable resistor RP2 is loaded to the B pin of the NAND gate U2, the sampling voltage is directly obtained from the rectified direct current voltage and is low level, the A pin of the NAND gate U2 is loaded with high level, so that the Y pin of the U2 outputs high level, is inverted into low level by U3 and is then added to the THR pin of the 555 monostable trigger U5, thereby providing a trigger signal for the 555 monostable trigger U5, the OUT pin of the same outputs high level, so that the coil of the relay K is electrified and closed, the normally closed contact is disconnected, and the load circuit and the mains supply voltage are cut off, so that the load circuit is protected; and when the mains supply is recovered to be normal, the coil of the relay K is powered off, and the normally closed contact is closed again to connect and conduct the load circuit with the mains supply again.
Since U2 outputs a high level, pin B of U4 is also loaded with a high level, and pin a of the other input terminal of U4 is also high level, then U4 outputs a low level, and at this time, the light emitting diode VD1 emits a light indication.
When the mains voltage is normal, the light-emitting diode VD3 emits light, and the relay K is not electrified; when the commercial power is over-voltage, the light emitting diodes VD3 and VD2 emit light, the relay K is powered on, and the connection between the load circuit and the commercial power is disconnected; when the mains supply is under-voltage, the light emitting diodes VD1 and VD3 emit light, the relay K is powered, and the connection between the load circuit and the mains supply is disconnected.
According to the utility model, the undervoltage and overvoltage states of the mains supply can be accurately and truly judged, so that the on-off state and the off state of the relay can be more accurately controlled, the load circuit is timely disconnected when the mains supply is in the undervoltage and overvoltage states, and the load circuit is connected with the mains supply again after the mains supply is recovered to be normal, so that the protection of the load circuit is realized.
In the present utility model, the present utility model is not limited to the above embodiments, and based on the technical solution of the present disclosure, those skilled in the art may make some substitutions and modifications to some technical features thereof without creative effort according to the technical disclosure, and all the substitutions and modifications are within the scope of the present utility model.

Claims (5)

1. The utility power overvoltage and undervoltage protection circuit is characterized by comprising a voltage transformation circuit, wherein the voltage transformation circuit is respectively connected with a power supply and a rectifying circuit, the rectifying circuit is respectively connected with a sampling circuit and a filtering voltage stabilizing circuit, the filtering voltage stabilizing circuit is connected with a trigger circuit, the trigger circuit is connected with the sampling circuit, the trigger circuit is further connected with a load circuit, and the load circuit is connected with the power supply.
2. The mains overvoltage and undervoltage protection circuit of claim 1, wherein: the transformation circuit includes transformer T1, and rectifier circuit includes rectifier bridge D1, and transformer T1's input links to each other with the commercial power, and the output of transformer links to each other with rectifier bridge D1's No. 2 foot and No. 3 foot, and rectifier bridge D1's No. 1 foot links to each other with sampling circuit and filtering voltage stabilizing circuit respectively.
3. The mains overvoltage and undervoltage protection circuit of claim 2, wherein: the filter voltage stabilizing circuit comprises a capacitor C1, the positive electrode of the capacitor C1 is connected with the No. 1 pin of the rectifier bridge D1 and one end of a resistor R4 respectively, the negative electrode of the capacitor C1 is connected with the No. 4 pin of the rectifier bridge D1, the other end of the resistor R4 is connected with the positive electrode of the capacitor C4, the negative electrode of the capacitor C4 is connected with the negative electrode of the capacitor C1, and the capacitor C4 is connected with a voltage stabilizing diode D2 in parallel.
4. A mains overvoltage and undervoltage protection circuit as recited in claim 3, wherein: the sampling circuit comprises a variable resistor RP1, one end of the variable resistor RP1 is connected with a pin 1 of a rectifier bridge D1 through a resistor R6, the other end of the variable resistor RP1 is grounded, the variable end of the variable resistor RP1 is connected with a pin B of a NAND gate U1, a pin A of the NAND gate U1 is respectively connected with the negative electrode of a zener diode D2 and a pin A of a NAND gate U3, and a pin Y of the NAND gate U1 is respectively connected with a pin A of a NAND gate U2 and a pin A of a NAND gate U4;
the pin B of the NAND gate U2 is connected with the variable end of the variable resistor RP2, one end of the variable resistor RP2 is connected with one end of the variable resistor RP1, the other end of the variable resistor RP2 is grounded, the pin A of the NAND gate U2 is connected with the cathode of the light-emitting diode VD2, the anode of the light-emitting diode VD2 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the cathode of the zener diode D2, and the pin Y of the NAND gate U2 is respectively connected with the pin B of the NAND gate U3 and the pin B of the NAND gate U4;
the Y pin of NAND gate U3 links to each other with trigger circuit, and the Y pin of NAND gate U4 links to each other with the negative pole of emitting diode VD1, and emitting diode VD 1's positive pole links to each other with resistance R1's one end, and resistance R1's the other end links to each other with zener diode D2's negative pole, and resistance R2's the other end still links to each other with resistance R3's one end, and resistance R3's the other end links to each other with emitting diode VD 3's positive pole, and emitting diode VD 3's negative pole ground.
5. The mains overvoltage and undervoltage protection circuit of claim 4, wherein: the trigger circuit comprises a 555 monostable trigger U5, wherein a RST pin and a VCC pin of the 555 monostable trigger U5 are connected with the other end of a resistor R1, a DIS pin and a THR pin of the 555 monostable trigger U5 are connected, a DIS pin of the 555 monostable trigger U5 is connected with the negative electrode of a voltage stabilizing diode D2 through the resistor R5, a THR pin of the 555 monostable trigger U5 is connected with the positive electrode of a capacitor C2, the negative electrode of the capacitor C2 is grounded, a CON pin of the 555 monostable trigger U5 is grounded through the capacitor C3, a GND pin of the 555 monostable trigger U5 is grounded, an OUT pin of the 555 monostable trigger U5 is connected with the positive electrode of a light emitting diode VD4 through a resistor R7, the negative electrode of the light emitting diode VD4 is grounded, the light emitting diode VD4 is connected with a coil of a relay K in parallel, and a normally-closed contact of the relay is connected with a load circuit.
CN202320973867.XU 2023-04-26 2023-04-26 Commercial power overvoltage and undervoltage protection circuit Active CN219739949U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202320973867.XU CN219739949U (en) 2023-04-26 2023-04-26 Commercial power overvoltage and undervoltage protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202320973867.XU CN219739949U (en) 2023-04-26 2023-04-26 Commercial power overvoltage and undervoltage protection circuit

Publications (1)

Publication Number Publication Date
CN219739949U true CN219739949U (en) 2023-09-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202320973867.XU Active CN219739949U (en) 2023-04-26 2023-04-26 Commercial power overvoltage and undervoltage protection circuit

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CN (1) CN219739949U (en)

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