CN219718213U - Characteristic current generation circuit for topology identification - Google Patents
Characteristic current generation circuit for topology identification Download PDFInfo
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- CN219718213U CN219718213U CN202321235284.3U CN202321235284U CN219718213U CN 219718213 U CN219718213 U CN 219718213U CN 202321235284 U CN202321235284 U CN 202321235284U CN 219718213 U CN219718213 U CN 219718213U
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Abstract
The utility model relates to a characteristic current generating circuit for topology identification, which comprises a characteristic current signal generating module, a characteristic current driving module, a characteristic current switching module and an optical coupler.
Description
Technical Field
The utility model relates to the technical field of intelligent power grid terminals, in particular to a characteristic current generation circuit for topology identification.
Background
The prior characteristic current generating circuit has two schemes, firstly, the forward anode of the thyristor is adopted to conduct the reverse anode to close the characteristic, so that the control signal of the thyristor can only open the thyristor, the closing is realized only after the alternating voltage is reversed, the characteristic current has continuous uncontrollability, unstable performance and high resistance required power, therefore, the resistor has large volume and is unfavorable for being embedded into a terminal of equipment, and secondly, a relay is adopted as a switch for generating the characteristic current, the switching time of the relay has discreteness, the pulse width of the output characteristic current pulse has inconsistency, the identification is inconvenient, and the relay has certain delay due to the starting and the closing, so that the output characteristic current pulse width has minimum time limit and unstable performance. Both schemes have the defect of unstable performance, and the magnitude of the characteristic current depends on the magnitude of the voltage when the characteristic current starts, if the voltage fluctuates or the starting point deviates to be close to the voltage peak point, the current is increased, thus the device is damaged by overcurrent faults, and the method has the defect of low reliability.
Disclosure of Invention
In view of the above, an object of the present utility model is to provide a characteristic current generating circuit for topology identification, which has stable performance, high reliability, and overcurrent protection.
In order to achieve the above purpose, the utility model adopts the characteristic current generating circuit for topology identification, which comprises a characteristic current signal generating module, a characteristic current driving module, a characteristic current switching module and an optocoupler, wherein the input end of the characteristic current signal generating module is connected with a PWM control pin of a singlechip, the output end of the characteristic current signal generating module is connected with an optocoupler luminous end, the optocoupler luminous end is connected with the characteristic current driving module, the characteristic current driving module is connected with the characteristic current switching module, the characteristic current driving module comprises a current limiting circuit and an MOS tube, the characteristic current driving module further comprises a driving amplifying circuit, the input end of the driving amplifying circuit is connected with the optocoupler luminous end, the output end of the driving amplifying circuit is connected with the grid electrode of the MOS tube, the source electrode of the MOS tube is connected with one end of the current limiting circuit, the drain electrode of the MOS tube is grounded, the other end of the current limiting circuit is connected with the characteristic current switching module, and the driving amplifying circuit is further provided with an enabling input end which can control the starting and stopping of the driving amplifying circuit.
The utility model discloses further set up to be used for topology identification's characteristic current generating circuit still including overcurrent fault protection module, overcurrent fault protection module includes current detection circuit, detects protection circuit, the drain electrode of MOS pipe is all connected to current detection circuit's one end, detection protection circuit's positive input, current detection circuit's the other end, detection protection circuit's negative power supply end all ground connection, detection protection circuit's negative input connects reference voltage, detection protection circuit's positive power supply end connects power 12V, detection protection circuit's output connection drive amplifier circuit's enable input.
The utility model discloses further set up to current detection circuit and be the fourteenth resistance.
The utility model is further provided with a detection protection circuit which is a comparator.
The utility model discloses further set up to be used for topology identification's characteristic current generating circuit still including the freewheel module, the one end and the current limiting circuit of freewheel module and the public end of characteristic current switching module are connected, the other end of freewheel module and the drain electrode of MOS pipe all ground connection.
The utility model discloses further set up to the freewheel module and be formed by four resistance series connection.
The utility model is further provided with three resistors connected in series to form the current limiting circuit.
The utility model discloses further set up to characteristic current and cut the module and include rectifier bridge, electric wire netting binding post, the direct current positive end of rectifier bridge is connected to current limiting circuit, the direct current negative end ground connection of rectifier bridge, the first end of exchanging of rectifier bridge is connected to electric wire netting binding post's live wire end, the second end of exchanging of rectifier bridge is connected to electric wire netting binding post's zero line end.
The utility model is further provided with a driving chip with the model EG3001 as a driving amplifying circuit.
Compared with the prior art, the utility model has the beneficial effects that: by adopting the drive amplifying circuit, compared with the existing characteristic current generating circuit, the advantage of stable performance is realized, the drive amplifying circuit adopts the overcurrent fault protection module, compared with the existing characteristic current generating circuit, the advantage of overcurrent protection is realized, when the overcurrent fault phenomenon occurs, the two ends of the current detection circuit can generate an overcurrent voltage signal, the overcurrent voltage signal is input to the positive input end of the comparator through the resistor, the negative input end of the comparator is connected with reference voltage, when the overcurrent voltage signal is lower than the voltage value of the reference voltage, the comparator outputs a low-level signal, when the overcurrent voltage signal is higher than the voltage value of the reference voltage, the comparator outputs a high-level signal, when the enabling input end of the drive amplifying circuit receives the high-level signal, no matter whether the input end PWM signal of the drive amplifying circuit is high-level or low-level, the output end of the drive amplifying circuit outputs low-level, the grid electrode of the MOS tube is low-level, the MOS tube is closed, the MOS tube is also used for protecting the MOS tube, and the MOS tube plays a role of shunting the current flowing through the MOS tube loop from on to off at the moment, and the advantage of high reliability is realized.
Drawings
Fig. 1 is a schematic circuit diagram and a schematic current flow diagram of a characteristic current generating circuit according to a first embodiment of the present utility model.
Fig. 2 is a schematic circuit diagram and a schematic current flow diagram of a characteristic current generating circuit only including an overcurrent fault protection module according to a second embodiment of the present utility model.
Fig. 3 is a schematic circuit diagram and a schematic current flow diagram of a characteristic current generating circuit including only a freewheel module according to a third embodiment of the present utility model.
Fig. 4 is a schematic circuit diagram of a characteristic current generating circuit including an overcurrent fault protection module and a freewheel module according to a fourth embodiment of the present utility model.
Fig. 5 is a schematic diagram of the current flow at PWM low level according to the fourth embodiment of the present utility model.
Fig. 6 is a schematic diagram of the current flow at PWM high level according to the fourth embodiment of the present utility model.
Detailed Description
As shown in fig. 1, a first embodiment of the present utility model is a characteristic current generating circuit and a current flow schematic for topology identification, including a characteristic current signal generating module, a characteristic current driving module, a characteristic current switching module, and an optocoupler, where an input end of the characteristic current signal generating module is connected to a PWM control pin of a single chip microcomputer, an output end of the characteristic current signal generating module is connected to a light emitting end of the optocoupler, a light receiving end of the optocoupler is connected to the characteristic current driving module, and the characteristic current driving module is connected to the characteristic current switching module.
The characteristic current driving module consists of a current limiting circuit, an MOS tube Q2, a driving amplifying circuit, an enabling circuit, a third resistor R3, a pull-up resistor, a twelfth resistor R12, a first capacitor C1, a second capacitor C2 and a diode D2, wherein the pull-up resistor is a ninth resistor R9, the enabling circuit consists of a thirteenth resistor R13 and a fourteenth resistor R14, the current limiting circuit consists of a first resistor R1, a fourth resistor R4 and a seventh resistor R7 which are connected in series, the input end of a second pin of the driving amplifying circuit U1 is respectively connected with one end of the ninth resistor R9 and the collector of the light receiving end of the optocoupler V1, the power supply voltage end of an eighth pin of the driving amplifying circuit U1 is respectively connected with the other end of the ninth resistor R9, the positive electrode of the first capacitor C1, one end of the second capacitor C2, one end of the third resistor R3 and one end of the thirteenth resistor R13, the negative electrode of the first capacitor C1 and the other end of the second capacitor C2 are grounded, the other end of the third resistor R3 is connected with the cathode of the diode D2, the output end of the seventh pin of the driving amplifying circuit U1 is connected with one end of the twelfth resistor R12, the other end of the twelfth resistor R12, the output end of the sixth pin of the driving amplifying circuit U1 and the anode of the diode D2 are all connected to the grid electrode of the MOS tube Q2, the source electrode of the MOS tube Q2 is connected with one end of a current limiting circuit formed by connecting the first resistor R1, the fourth resistor R4 and the seventh resistor R7 in series, the other end of the current limiting circuit formed by connecting the first resistor R1, the fourth resistor R4 and the seventh resistor R7 in series is connected with a characteristic current switching module, the drain electrode of the MOS tube Q2 is grounded, the third pin enabling input end of the driving amplifying circuit U1 is respectively connected with the other end of the thirteenth resistor R13, one end of the fourteenth resistor R14, the other end of the fourteenth resistor R14 and the emitting electrode of the light receiving end of the optical coupler V1 are grounded, the fifth pin of the driving amplifying circuit is grounded in common, one end of the thirteenth resistor R13 is also connected with a power supply 12V, specifically, the driving amplifying circuit U1 is composed of a driving chip with the model EG3001, and the voltage from the common end of the thirteenth resistor R13 to the ground is more than or equal to 2.5V and less than or equal to 7V.
The characteristic current signal generating module is composed of a sixth resistor R6, a tenth resistor R10 and a triode Q1, wherein one end of the sixth resistor R6 is connected with a PWM control pin of the singlechip, the other end of the sixth resistor R6 is connected with a base electrode of the triode Q1, an emitter electrode of the triode Q1 is connected with one end of the tenth resistor R10, the other end of the tenth resistor R10 is connected with a power supply 3.3V, a collector electrode of the triode Q1 is connected with an anode of a light emitting end of the optocoupler V1, a cathode of the light emitting end of the optocoupler V1 is grounded, a collector electrode and an emitter electrode of a light receiving end of the optocoupler V1 are both connected with a characteristic current driving module, and particularly, the collector electrode of the light receiving end of the optocoupler V1 is connected with an input end of a second pin of a driving amplifying circuit U1 in the characteristic current driving module, and the emitter electrode of the light receiving end of the optocoupler V1 is grounded with the other end of the tenth resistor R14 in the characteristic current driving module.
The characteristic current switching module is composed of a rectifier bridge D1 and a power grid wiring terminal P2, specifically, the direct current positive end of the rectifier bridge D1 is connected to the current limiting circuit, the direct current negative end of the rectifier bridge D1 is grounded, the alternating current first end of the rectifier bridge D1 is connected to the live wire end (L end) of the power grid wiring terminal P2, and the alternating current second end of the rectifier bridge D1 is connected to the zero line end (N end) of the power grid wiring terminal P2.
The above is a solution of an embodiment one of a characteristic current generating circuit for topology identification of the present utility model,
in addition, the present utility model includes three embodiments, which are specifically as follows:
as shown in fig. 2, a second embodiment of the present utility model is a characteristic current generating circuit and a current flow schematic diagram, which only include an overcurrent fault protection module, and mainly includes a characteristic current signal generating module, a characteristic current driving module, a characteristic current switching module, an optocoupler, and an overcurrent fault protection module, wherein an input end of the characteristic current signal generating module is connected to a PWM control pin of a singlechip, an output end of the characteristic current signal generating module is connected to an optocoupler light emitting end, an optocoupler light receiving end is connected to the characteristic current driving module, and the characteristic current driving module is respectively connected to the characteristic current switching module and the overcurrent fault protection module.
The characteristic current driving module consists of a current limiting circuit, an MOS tube Q2, a driving amplifying circuit, a third resistor R3, a pull-up resistor, a twelfth resistor R12, a first capacitor C1, a second capacitor C2 and a diode D2, wherein the pull-up resistor is a ninth resistor R9, the current limiting circuit consists of the first resistor R1, a fourth resistor R4 and a seventh resistor R7 which are connected in series, the input end of a second pin of the driving amplifying circuit U1 is respectively connected with one end of the ninth resistor R9 and the collector of the light receiving end of the optocoupler V1, the power supply voltage end of an eighth pin of the driving amplifying circuit U1 is respectively connected with the other end of the ninth resistor R9, the positive electrode of the first capacitor C1, one end of the second capacitor C2 and one end of the third resistor R3, the negative electrode of the first capacitor C1 and the other end of the second capacitor C2 are grounded, the other end of the third resistor R3 is connected with the negative electrode of the diode D2, the output end of a seventh pin of the driving amplifying circuit U1 is connected with one end of a twelfth resistor R12, the other end of the twelfth resistor R12, the output end of a sixth pin of the driving amplifying circuit U1 and the positive electrode of a diode D2 are all connected to the grid electrode of a MOS tube Q2, the source electrode of the MOS tube Q2 is connected with one end of a current limiting circuit formed by connecting a first resistor R1, a fourth resistor R4 and a seventh resistor R7 in series, the other end of the current limiting circuit formed by connecting the first resistor R1, the fourth resistor R4 and the seventh resistor R7 in series is connected with a characteristic current switching module, the drain electrode of the MOS tube Q2 is connected with the input end of an overcurrent fault protection module, the enabling input end of the driving amplifying circuit U1 is connected with the output end of the overcurrent fault protection module, the common end of the fifth pin of the driving amplifying circuit is grounded, the other end of the ninth resistor R9 is also connected with a power supply 12V, and the driving amplifying circuit U1 is composed of a driving chip with the model EG 3001.
The overcurrent fault protection module consists of a current detection circuit, a detection protection circuit, a thirteenth resistor R13, a third capacitor C3 and a fifteenth resistor R15, wherein the current detection circuit is specifically a fourteenth resistor R14, the detection protection circuit is a comparator U2, one end of the fourteenth resistor R14 and one end of the thirteenth resistor R13 are both connected with the drain electrode of the MOS tube Q2, the positive input end of the comparator U2 is respectively connected with one end of the third capacitor C3 and the other end of the thirteenth resistor R13, the negative input end of the comparator U2 is connected with a reference voltage Vref, the negative power end of the comparator U2, the other end of the third capacitor C3 and the other end of the fourteenth resistor R14 are grounded, the positive power end of the comparator U2 is respectively connected with one end of the fifteenth resistor R15 and the power supply 12V, and the output end of the comparator U2 is respectively connected with the other end of the fifteenth resistor R15 and the third pin enabling input end of the driving amplification circuit U1.
The characteristic current signal generating module is composed of a sixth resistor R6, a tenth resistor R10 and a triode Q1, wherein one end of the sixth resistor R6 is specifically connected with a PWM control pin of the singlechip, the other end of the sixth resistor R6 is connected with a base electrode of the triode Q1, an emitter electrode of the triode Q1 is connected with one end of the tenth resistor R10, the other end of the tenth resistor R10 is connected with a power supply 3.3V, a collector electrode of the triode Q1 is connected with an anode of a light emitting end of the optocoupler V1, a cathode of the light emitting end of the optocoupler V1 is grounded, a collector electrode of a light receiving end of the optocoupler V1 is specifically connected with an input end of a second pin of the driving amplifying circuit U1 in the characteristic current driving module.
The characteristic current switching module is composed of a rectifier bridge D1 and a power grid wiring terminal P2, specifically, the direct current positive end of the rectifier bridge D1 is connected to the current limiting circuit, the direct current negative end of the rectifier bridge D1 is grounded, the alternating current first end of the rectifier bridge D1 is connected to the live wire end (L end) of the power grid wiring terminal P2, and the alternating current second end of the rectifier bridge D1 is connected to the zero line end (N end) of the power grid wiring terminal P2.
As shown in fig. 3, a third embodiment of the present utility model is a characteristic current generating circuit and a current flow schematic diagram, which only include a freewheel module, and mainly includes a characteristic current signal generating module, a characteristic current driving module, a characteristic current switching module, an optocoupler, and a freewheel module, wherein an input end of the characteristic current signal generating module is connected to a PWM control pin of a singlechip, an output end of the characteristic current signal generating module is connected to an optocoupler light emitting end, an optocoupler light receiving end is connected to a characteristic current driving module, and the characteristic current driving module is respectively connected to the characteristic current switching module and the freewheel module.
The characteristic current driving module consists of a current limiting circuit, an MOS tube Q2, a driving amplifying circuit, an enabling circuit, a third resistor R3, a pull-up resistor, a twelfth resistor R12, a first capacitor C1, a second capacitor C2 and a diode D2, wherein the pull-up resistor is a ninth resistor R9, the enabling circuit consists of a thirteenth resistor R13 and a fourteenth resistor R14, the current limiting circuit consists of a first resistor R1, a fourth resistor R4 and a seventh resistor R7 which are connected in series, the input end of a second pin of the driving amplifying circuit U1 is respectively connected with one end of the ninth resistor R9 and the collector of the light receiving end of the optocoupler V1, the power supply voltage end of an eighth pin of the driving amplifying circuit U1 is respectively connected with the other end of the ninth resistor R9, the positive electrode of the first capacitor C1, one end of the second capacitor C2, one end of the third resistor R3 and one end of the thirteenth resistor R13, the negative electrode of the first capacitor C1 and the other end of the second capacitor C2 are grounded, the other end of the third resistor R3 is connected with the cathode of the diode D2, the output end of the seventh pin of the driving amplifying circuit U1 is connected with one end of the twelfth resistor R12, the other end of the twelfth resistor R12, the output end of the sixth pin of the driving amplifying circuit U1 and the anode of the diode D2 are all connected to the grid electrode of the MOS tube Q2, the source electrode of the MOS tube Q2 is connected with one end of a current limiting circuit formed by connecting the first resistor R1, the fourth resistor R4 and the seventh resistor R7 in series, the other end of the current limiting circuit formed by connecting the first resistor R1, the fourth resistor R4 and the seventh resistor R7 in series is connected with a characteristic current switching module, one end of the freewheel module is connected with the common end of the current limiting circuit and the characteristic current switching module, the drain electrode of the MOS tube Q2 and the other end of the freewheel module are grounded, the third pin enabling input end of the driving amplifying circuit U1 is respectively connected with the other end of the thirteenth resistor R13 and one end of the fourteenth resistor R14, the other end of the fourteenth resistor R14 and the emitter of the light receiving end of the optocoupler V1 are grounded, the common end of the fifth pin of the driving amplifying circuit is grounded, one end of the thirteenth resistor R13 is also connected with a power supply 12V, the driving amplifying circuit U1 is specifically formed by a driving chip with the model EG3001, and the voltage from the common end to the ground of the thirteenth resistor R13 and the fourteenth resistor R14 is greater than or equal to 2.5V and less than or equal to 7V.
The freewheel module is formed by connecting a second resistor R2, a fifth resistor R5, an eighth resistor R8 and an eleventh resistor R11 in series, specifically, one end of the freewheel module formed by connecting the second resistor R2, the fifth resistor R5, the eighth resistor R8 and the eleventh resistor R11 in series is connected with the public end of the current limiting circuit and the characteristic current switching module, and the other end of the freewheel module formed by connecting the second resistor R2, the fifth resistor R5, the eighth resistor R8 and the eleventh resistor R11 in series is grounded with the drain electrode of the MOS tube Q2.
The characteristic current signal generating module is composed of a sixth resistor R6, a tenth resistor R10 and a triode Q1, wherein one end of the sixth resistor R6 is connected with a PWM control pin of the singlechip, the other end of the sixth resistor R6 is connected with a base electrode of the triode Q1, an emitter electrode of the triode Q1 is connected with one end of the tenth resistor R10, the other end of the tenth resistor R10 is connected with a power supply 3.3V, a collector electrode of the triode Q1 is connected with an anode of a light emitting end of the optocoupler V1, a cathode of the light emitting end of the optocoupler V1 is grounded, a collector electrode and an emitter electrode of a light receiving end of the optocoupler V1 are both connected with a characteristic current driving module, and particularly, the collector electrode of the light receiving end of the optocoupler V1 is connected with an input end of a second pin of a driving amplifying circuit U1 in the characteristic current driving module, and the emitter electrode of the light receiving end of the optocoupler V1 is grounded with the other end of the tenth resistor R14 in the characteristic current driving module.
The characteristic current switching module is composed of a rectifier bridge D1 and a power grid wiring terminal P2, specifically, the direct current positive end of the rectifier bridge D1 is respectively connected to the current limiting circuit and the follow current module, the direct current negative end of the rectifier bridge D1 is grounded, the alternating current first end of the rectifier bridge D1 is connected to the live wire end (L end) of the power grid wiring terminal P2, and the alternating current second end of the rectifier bridge D1 is connected to the zero line end (N end) of the power grid wiring terminal P2.
As shown in fig. 4, a third embodiment of the present utility model is a characteristic current generating circuit including an overcurrent fault protection module and a freewheel module, which mainly includes a characteristic current signal generating module, a characteristic current driving module, a characteristic current switching module, an optocoupler, an overcurrent fault protection module, and a freewheel module, wherein an input end of the characteristic current signal generating module is connected with a PWM control pin of a singlechip, an output end of the characteristic current signal generating module is connected with an optocoupler light emitting end, an optocoupler light receiving end is connected with the characteristic current driving module, and the characteristic current driving module is respectively connected with the characteristic current switching module, the overcurrent fault protection module, and the freewheel module.
The characteristic current driving module consists of a current limiting circuit, an MOS tube Q2, a driving amplifying circuit, a third resistor R3, a pull-up resistor, a twelfth resistor R12, a first capacitor C1, a second capacitor C2 and a diode D2, wherein the pull-up resistor is a ninth resistor R9, the current limiting circuit consists of the first resistor R1, a fourth resistor R4 and a seventh resistor R7 which are connected in series, the input end of a second pin of the driving amplifying circuit U1 is respectively connected with one end of the ninth resistor R9 and the collector of the light receiving end of the optocoupler V1, the power supply voltage end of an eighth pin of the driving amplifying circuit U1 is respectively connected with the other end of the ninth resistor R9, the positive electrode of the first capacitor C1, one end of the second capacitor C2 and one end of the third resistor R3, the negative electrode of the first capacitor C1 and the other end of the second capacitor C2 are grounded, the other end of the third resistor R3 is connected with the negative electrode of the diode D2, the output end of the seventh pin of the driving amplifying circuit U1 is connected with one end of the twelfth resistor R12, the other end of the twelfth resistor R12, the output end of the sixth pin of the driving amplifying circuit U1 and the positive electrode of the diode D2 are all connected to the grid electrode of the MOS tube Q2, the source electrode of the MOS tube Q2 is connected with one end of a current limiting circuit formed by connecting the first resistor R1, the fourth resistor R4 and the seventh resistor R7 in series, the other end of the current limiting circuit formed by connecting the first resistor R1, the fourth resistor R4 and the seventh resistor R7 in series is connected with a characteristic current switching module, one end of the freewheel module is connected with the common end of the current limiting circuit and the characteristic current switching module, the drain electrode of the MOS tube Q2 is respectively connected with the other end of the freewheel module and the input end of the overcurrent fault protection module, the enabling input end of the driving amplifying circuit U1 is connected with the output end of the overcurrent fault protection module, the common pin of the driving amplifying circuit R9 is grounded, the other end of the ninth resistor R9 is also connected with a power supply 12V, specifically, the drive amplifier circuit U1 is constituted by a drive chip of the model EG 3001.
The characteristic current signal generating module is composed of a sixth resistor R6, a tenth resistor R10 and a triode Q1, wherein one end of the sixth resistor R6 is specifically connected with a PWM control pin of the singlechip, the other end of the sixth resistor R6 is connected with a base electrode of the triode Q1, an emitter electrode of the triode Q1 is connected with one end of the tenth resistor R10, the other end of the tenth resistor R10 is connected with a power supply 3.3V, a collector electrode of the triode Q1 is connected with an anode of a light emitting end of the optocoupler V1, a cathode of the light emitting end of the optocoupler V1 is grounded, a collector electrode of a light receiving end of the optocoupler V1 is specifically connected with an input end of a second pin of the driving amplifying circuit U1 in the characteristic current driving module.
The overcurrent fault protection module consists of a current detection circuit, a detection protection circuit, a thirteenth resistor R13, a third capacitor C3 and a fifteenth resistor R15, wherein the current detection circuit is specifically a fourteenth resistor R14, the detection protection circuit is a comparator U2, one end of the fourteenth resistor R14 and one end of the thirteenth resistor R13 are both connected with the drain electrode of the MOS tube Q2, the positive input end of the comparator U2 is respectively connected with one end of the third capacitor C3 and the other end of the thirteenth resistor R13, the negative input end of the comparator U2 is connected with a reference voltage Vref, the negative power end of the comparator U2, the other end of the third capacitor C3 and the other end of the fourteenth resistor R14 are grounded, the positive power end of the comparator U2 is respectively connected with one end of the fifteenth resistor R15 and the power supply 12V, and the output end of the comparator U2 is respectively connected with the other end of the fifteenth resistor R15 and the third pin enabling input end of the driving amplification circuit U1.
The freewheel module is formed by connecting a second resistor R2, a fifth resistor R5, an eighth resistor R8 and an eleventh resistor R11 in series, specifically, one end of the freewheel module formed by connecting the second resistor R2, the fifth resistor R5, the eighth resistor R8 and the eleventh resistor R11 in series is connected with the public end of the current limiting circuit and the characteristic current switching module, and the other end of the freewheel module formed by connecting the second resistor R2, the fifth resistor R5, the eighth resistor R8 and the eleventh resistor R11 in series is connected with the drain electrode of the MOS tube Q2.
The characteristic current switching module is composed of a rectifier bridge D1 and a power grid wiring terminal P2, specifically, the direct current positive end of the rectifier bridge D1 is respectively connected to the current limiting circuit and the follow current module, the direct current negative end of the rectifier bridge D1 is grounded, the alternating current first end of the rectifier bridge D1 is connected to the live wire end (L end) of the power grid wiring terminal P2, and the alternating current second end of the rectifier bridge D1 is connected to the zero line end (N end) of the power grid wiring terminal P2.
Fig. 5 is a schematic diagram of a current flow at PWM low level according to a fourth embodiment of the present utility model. When the characteristic current PWM signal is at a low level, the input end of the characteristic current signal generating module is connected with a low signal, the base electrode of the triode Q1 is at a low level, the triode Q1 is conducted, the light emitting diode at the input end of the optocoupler V1 is conducted, the output end of the optocoupler V1 is connected with an IN pin of the driving amplifying circuit U1 IN the characteristic current driving module, the output end of the driving amplifying circuit U1 is controlled by the IN pin and outputs a low level, the MOS tube Q2 of the driving amplifying circuit U1 is not conducted, and at the moment, the current flowing through the characteristic current switching module is the schematic diagram.
Fig. 6 is a schematic diagram of a current flow at PWM high level according to a fourth embodiment of the present utility model. When the characteristic current PWM signal is at a high level, the input end of the characteristic current signal generating module is connected with a high signal, the triode Q1 is cut off, the light emitting diode at the input end of the optocoupler V1 is not conducted, the triode at the output end of the optocoupler V1 is cut off (the third pin and the fourth pin are not conducted), the output end of the optocoupler V1 is connected with the IN pin of the driving amplifying circuit U1 IN the characteristic current driving module, the IN pin is connected with the high level through a pull-up resistor, the output end of the driving amplifying circuit U1 is controlled by the IN pin, the high level is output, the MOS tube Q2 of the driving amplifying circuit U1 is conducted, and at the moment, the current flowing through the characteristic current switching module is the schematic diagram.
In addition to the above embodiments, the present utility model may be further modified and varied in various ways, and the modifications and variations can be made by those skilled in the art without departing from the spirit and scope of the utility model.
Claims (9)
1. The utility model provides a characteristic current generating circuit for topology identification, includes characteristic current signal generating module, characteristic current drive module, characteristic current switching module, opto-coupler, the PWM control pin of singlechip is connected to the input of characteristic current signal generating module, opto-coupler luminous end is connected to the output of characteristic current signal generating module, the characteristic current drive module is connected to the opto-coupler light receiving end, characteristic current drive module connects characteristic current switching module, characteristic current drive module includes current limiting circuit, MOS pipe, its characterized in that: the characteristic current driving module further comprises a driving amplifying circuit, the input end of the driving amplifying circuit is connected with the optocoupler light receiving end, the output end of the driving amplifying circuit is connected with the grid electrode of the MOS tube, the source electrode of the MOS tube is connected with one end of the current limiting circuit, the drain electrode of the MOS tube is grounded, the other end of the current limiting circuit is connected with the characteristic current switching module, the driving amplifying circuit further comprises an enabling input end, and the enabling input end can control the starting and stopping of the driving amplifying circuit.
2. The characteristic current generating circuit for topology identification of claim 1, wherein: the characteristic current generating circuit for topology identification further comprises an overcurrent fault protection module, the overcurrent fault protection module comprises a current detection circuit and a detection protection circuit, one end of the current detection circuit and the positive input end of the detection protection circuit are both connected with the drain electrode of the MOS tube, the other end of the current detection circuit and the negative power end of the detection protection circuit are both grounded, the negative input end of the detection protection circuit is connected with a reference voltage, the positive power end of the detection protection circuit is connected with a power supply 12V, and the output end of the detection protection circuit is connected with the enabling input end of the driving amplification circuit.
3. The characteristic current generating circuit for topology identification of claim 2, wherein: the current detection circuit is a fourteenth resistor.
4. The characteristic current generating circuit for topology identification of claim 2, wherein: the detection protection circuit is a comparator.
5. The characteristic current generating circuit for topology identification of claim 1, wherein: the characteristic current generation circuit for topology identification further comprises a follow current module, one end of the follow current module is connected with the common end of the current limiting circuit and the characteristic current switching module, and the other end of the follow current module is grounded with the drain electrode of the MOS tube.
6. The characteristic current generating circuit for topology identification of claim 5, wherein: the follow current module is formed by connecting four resistors in series.
7. The characteristic current generating circuit for topology identification of claim 1, wherein: the current limiting circuit is formed by connecting three resistors in series.
8. The characteristic current generating circuit for topology identification according to any one of claims 1 to 7, wherein: the characteristic current switching module comprises a rectifier bridge and a power grid wiring terminal, wherein the direct current positive end of the rectifier bridge is connected to the current limiting circuit, the direct current negative end of the rectifier bridge is grounded, the alternating current first end of the rectifier bridge is connected to the live wire end of the power grid wiring terminal, and the alternating current second end of the rectifier bridge is connected to the zero line end of the power grid wiring terminal.
9. The characteristic current generating circuit for topology identification of claim 8, wherein: the driving amplifying circuit is composed of a driving chip with the model EG 3001.
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| CN202321235284.3U CN219718213U (en) | 2023-05-19 | 2023-05-19 | Characteristic current generation circuit for topology identification |
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| CN202321235284.3U CN219718213U (en) | 2023-05-19 | 2023-05-19 | Characteristic current generation circuit for topology identification |
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