CN219715512U - Intermittent service life aging test system - Google Patents
Intermittent service life aging test system Download PDFInfo
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- CN219715512U CN219715512U CN202320364748.4U CN202320364748U CN219715512U CN 219715512 U CN219715512 U CN 219715512U CN 202320364748 U CN202320364748 U CN 202320364748U CN 219715512 U CN219715512 U CN 219715512U
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- 238000012360 testing method Methods 0.000 title claims abstract description 58
- 230000032683 aging Effects 0.000 title claims abstract description 34
- 239000004065 semiconductor Substances 0.000 claims abstract description 23
- 238000009434 installation Methods 0.000 claims description 3
- 210000001503 joint Anatomy 0.000 claims description 3
- 238000010998 test method Methods 0.000 description 3
- 101100028477 Drosophila melanogaster Pak gene Proteins 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
Abstract
The utility model discloses an intermittent service life aging test system, which relates to the technical field of test equipment, and is particularly suitable for an intermittent service life aging test system, and comprises: the device comprises a power supply (1), an aging board (2), a tester (3), a semiconductor discrete device (4), a high-temperature test module (5), an alarm device (6), an operation table (7) and an operation host (8). The test system is simple, effectively saves cost and realizes electric energy saving.
Description
Technical Field
The utility model relates to the technical field of test equipment, and is particularly suitable for an intermittent service life aging test system.
Background
At present, the intermittent life test is one of the most important tests of the power device, but because the semiconductor industry starts later, the materials, designs, processes and standards are all relatively lagged, and particularly the test method and the test method are almost blank. Only a test frame and thought are given in the existing intermittent life test method, the operability is extremely poor, key steps are blank, and the test or the test cannot be effectively guided.
Therefore, how to solve the above-mentioned problems is a urgent need for those skilled in the art.
Disclosure of Invention
In view of this, the present utility model provides an intermittent life aging test system.
In order to achieve the above purpose, the present utility model adopts the following technical scheme:
an intermittent life aging test system, comprising: the device comprises a power supply, an aging board, a tester, a semiconductor discrete device, a high-temperature test module, an alarm device, an operation table and an operation host;
the first port of the power supply is electrically connected with the first port of the semiconductor discrete device, the first port of the high-temperature test module and the first port of the alarm device respectively; the second port of the power supply is electrically connected with the first port of the aging plate; the second port of the aging plate is electrically connected with the first port of the testing machine; the second port of the tester is electrically connected with the third port of the semiconductor discrete device; the second port of the semiconductor discrete device is electrically connected with the third port of the high-temperature test module; the second port of the high-temperature test module is electrically connected with the second port of the alarm device; the first port of the operation table is electrically connected with the fourth port of the semiconductor discrete device and the third port of the testing machine respectively; the second port of the operation table is electrically connected with the fourth port of the high-temperature test module and the third port of the alarm device respectively, and the third port of the operation table is electrically connected with the operation host.
Optionally, the burn-in board is composed of a burn-in board body and a burn-in board.
Optionally, the ageing platelet is installed on ageing board body through the structure that row needle and row pinhole are docked, is equipped with 4 device installation positions that await measuring on every ageing platelet.
Optionally, the testing machine adopts a parallel test circuit.
Optionally, the alarm device is provided with a temperature alarm and a buzzer.
Optionally, the power supply voltage is 0-60V and the current is 0-20A.
Optionally, the number of the burn-in boards is 16, and the specification is a standard DPAK package.
Compared with the prior art, the utility model discloses an intermittent service life aging test system,
1. the technical scheme of the utility model has simple test system, effectively saves cost and realizes the saving of electric energy;
2. the semiconductor discrete device is electrified and powered off regularly and intermittently, the tester can test the failure rate of the chip, the intermittent service life of the chip is further obtained, and the accuracy of the test is ensured;
3. the burn-in board is provided with the burn-in small board and the burn-in board body which are in butt joint through the pin header, so that the burn-in small board can be changed under the condition of different burn-in packaging devices, the purposes of one board with multiple purposes and no mutual influence are realized.
Drawings
In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present utility model, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of the structure of the present utility model;
the device comprises a 1-power supply, a 2-burn-in board, a 3-tester, a 4-semiconductor discrete device, a 5-high temperature test module, a 6-alarm device, a 7-operation desk and an 8-operation host.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
Referring to fig. 1, the present utility model discloses an intermittent life aging test system,
comprising the following steps: the testing device comprises a power supply 1, an aging board 2, a testing machine 3, a semiconductor discrete device 4, a high-temperature testing module 5, an alarm device 6, an operation table 7 and an operation host 8;
the first port of the power supply 1 is electrically connected with the first port of the semiconductor discrete device 4, the first port of the high-temperature test module 5 and the first port of the alarm device 6 respectively; the second port of the power supply 1 is electrically connected with the first port of the aging plate 2; the second port of the burn-in board 2 is electrically connected with the first port of the testing machine 3; the second port of the tester 3 is electrically connected with the third port of the semiconductor discrete device 4; the second port of the semiconductor discrete device 4 is electrically connected with the third port of the high-temperature test module 5; the second port of the high-temperature test module 5 is electrically connected with the second port of the alarm device 6; the first port of the operation table 7 is electrically connected with the fourth port of the semiconductor discrete device 4 and the third port of the tester 3 respectively; the second port of the operation table 7 is electrically connected with the fourth port of the high-temperature test module 5 and the third port of the alarm device 6 respectively, and the third port of the operation table 7 is electrically connected with the operation host 8.
Further, the burn-in board 2 is composed of a burn-in board body and a burn-in board.
Further, the ageing small plates are arranged on the ageing plate body through a pin arrangement and pin arrangement hole butt joint structure, and each ageing small plate is provided with 4 device installation positions to be tested.
Further, the tester 3 adopts a parallel test circuit.
Further, the alarm device 6 is provided with a temperature alarm and a buzzer.
Further, the voltage in the power supply 1 is 0-60V, and the current is 0-20A.
Further, the number of burn-in boards is 16, and the specification is a standard DPAK package.
Further, when the temperature of the high-temperature test module 5 exceeds 100 ℃, the temperature alarm gives an alarm, and the power supply 1 of the high-temperature test module 5 is cut off.
The specific implementation process of the utility model is as follows: the semiconductor discrete device 4 to be detected is sequentially placed into a high-temperature test module 5, a tester 3 and an aging board 2, high-temperature aging and measurement are carried out on the semiconductor discrete device 4, an intermittent life test is carried out on the semiconductor discrete device 4 through an operation host 8 on an operation table 7, the failure rate of the semiconductor discrete device 4 is finally obtained on the operation host 8, and when a temperature alarm alarms, the power supply 1 of the high-temperature test module 5 is cut off; when the intermittent life test system is in an abnormal working state, the buzzer gives out an alarm, the emergency stop button is pressed, and the whole system is closed, so that safety accidents are avoided.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present utility model. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the utility model. Thus, the present utility model is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (5)
1. An intermittent life aging test system, comprising: the device comprises a power supply (1), an aging board (2), a tester (3), a semiconductor discrete device (4), a high-temperature test module (5), an alarm device (6), an operation table (7) and an operation host (8);
the first port of the power supply (1) is electrically connected with the first port of the semiconductor discrete device (4), the first port of the high-temperature test module (5) and the first port of the alarm device (6) respectively; the second port of the power supply (1) is electrically connected with the first port of the aging plate (2); the second port of the aging plate (2) is electrically connected with the first port of the testing machine (3); the second port of the tester (3) is electrically connected with the third port of the semiconductor discrete device (4); the second port of the semiconductor discrete device (4) is electrically connected with the third port of the high-temperature test module (5); the second port of the high-temperature test module (5) is electrically connected with the second port of the alarm device (6); the first port of the operation table (7) is electrically connected with the fourth port of the semiconductor discrete device (4) and the third port of the tester (3) respectively; the second port of the operation table (7) is electrically connected with the fourth port of the high-temperature test module (5) and the third port of the alarm device (6), and the third port of the operation table (7) is electrically connected with the operation host (8).
2. An intermittent life aging test system according to claim 1,
the burn-in board (2) is composed of a burn-in board body and a burn-in board.
3. An intermittent life aging test system according to claim 2,
the aging small plates are arranged on the aging plate body through pin arrangement and pin arrangement hole butt joint structures, and each aging small plate is provided with 4 device installation positions to be tested.
4. An intermittent life aging test system according to claim 1,
the tester (3) adopts a parallel test circuit.
5. An intermittent life aging test system according to claim 1,
the alarm device (6) is provided with a temperature alarm and a buzzer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320364748.4U CN219715512U (en) | 2023-03-02 | 2023-03-02 | Intermittent service life aging test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320364748.4U CN219715512U (en) | 2023-03-02 | 2023-03-02 | Intermittent service life aging test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219715512U true CN219715512U (en) | 2023-09-19 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320364748.4U Active CN219715512U (en) | 2023-03-02 | 2023-03-02 | Intermittent service life aging test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219715512U (en) |
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2023
- 2023-03-02 CN CN202320364748.4U patent/CN219715512U/en active Active
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