CN219695351U - Semiconductor chip test equipment with double detection units - Google Patents
Semiconductor chip test equipment with double detection units Download PDFInfo
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- CN219695351U CN219695351U CN202222932773.6U CN202222932773U CN219695351U CN 219695351 U CN219695351 U CN 219695351U CN 202222932773 U CN202222932773 U CN 202222932773U CN 219695351 U CN219695351 U CN 219695351U
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- chip tray
- chip
- tray
- carrying
- test
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- 238000012360 testing method Methods 0.000 title claims abstract description 66
- 238000001514 detection method Methods 0.000 title claims abstract description 52
- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 230000009977 dual effect Effects 0.000 claims description 7
- 238000007689 inspection Methods 0.000 claims 5
- 238000000034 method Methods 0.000 description 3
- 238000011084 recovery Methods 0.000 description 3
- 239000000725 suspension Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
The utility model relates to a semiconductor chip testing device with double detection units, which comprises a case, wherein a chip tray is arranged on the case, chip detection stations are respectively arranged on two sides of the chip tray, a carrying mechanism is arranged on the case and is used for carrying chips to the chip tray or the detection stations, the double detection stations are designed on the case, the chip tray is designed again, the detection stations are distributed at two ends of the chip tray, and the chips are carried from the chip tray to the detection stations or back to the chip tray from the detection stations by matching with the carrying mechanism, so that the structure of an original four-axis robot can be optimized, the original device is simplified, the testing time can be saved well, and the detection efficiency is improved.
Description
[ field of technology ]
The utility model relates to the technical field of chip test equipment, in particular to semiconductor chip test equipment with double detection units.
[ background Art ]
After the semiconductor chip is manufactured, the performance of the produced chip is required to be tested, however, in the existing semiconductor chip testing equipment, the four-axis robot mechanism is adopted to carry the chip for carrying out flow operation in detection, and only a single testing unit is arranged in the process of testing, so that the cost input required by the test is excessive in the process of mass production of the chip, the testing time is long, and the testing efficiency is low.
[ utility model ]
In order to be convenient for reducing the input cost during the mass production detection of chips and solving the problem of the prior art that the test time is too long and the test efficiency is low, the utility model designs the test equipment with double detection stations and a carrying mechanism.
The utility model provides the following scheme:
the utility model provides a semiconductor chip test equipment with two detecting element, includes the quick-witted case, be equipped with the chip tray on the machine case, the chip tray both sides respectively are equipped with the chip detection station, be equipped with handling mechanism on the machine case, handling mechanism is used for carrying the chip to the chip tray or on the detection station.
The semiconductor chip testing equipment with the double detection units is characterized in that the detection units are arranged on the detection stations and are used for detecting chips to be tested in an electrified mode.
The semiconductor chip testing equipment with the double detection units comprises the vacuum chuck and the conveying mechanism driving device for driving the vacuum chuck to transversely move, wherein the conveying mechanism driving device comprises the conveying sliding rail arranged along the width direction of the chassis, the conveying sliding block in sliding fit with the conveying sliding rail, the conveying belt pulley arranged at the end part of the conveying sliding rail and the conveying motor coaxially arranged with the conveying belt pulley.
The vacuum chuck is provided with the suction head driving device for driving the suction head of the vacuum chuck to lift, and the suction head driving device comprises a lifting slide rail, a lifting slide block for driving the vacuum chuck to move and being in sliding fit with the lifting slide rail, a lifting belt pulley arranged at the end part of the lifting slide rail and a lifting motor coaxially arranged with the lifting belt pulley.
The semiconductor chip testing equipment with the double detection units comprises the testing chip tray and the problem chip tray, wherein the problem chip tray is arranged above the testing chip tray, the case is provided with the first driving device for driving the problem chip tray to move to the unfolding or shrinking position, when the problem chip tray is located at the unfolding position, the problem chip tray covers the testing chip tray, and when the problem chip tray is located at the shrinking position, the testing chip tray is exposed.
The semiconductor chip testing equipment with the double detection units is characterized in that the tray hanging frame is further arranged on the chassis, and the first driving device comprises a first motor arranged on one side of the tray hanging frame, a first sliding rail arranged on the other side of the tray hanging frame, a first sliding block in sliding fit with the first sliding rail, and a problematic chip tray support arranged on the first sliding block.
The semiconductor chip testing equipment with the double detection units is characterized in that the second driving device for driving the test chip tray to move along the length direction of the chassis is arranged on the test chip tray.
The second driving device comprises a second sliding rail, a second sliding block in sliding fit with the first sliding rail, vertical belt pulleys arranged at two ends of the second sliding rail, a second motor coaxially arranged with one of the two vertical belt pulleys, and a test chip tray bracket arranged on the second sliding block.
The semiconductor chip testing equipment with the double detection units further comprises an electrical control system, wherein the electrical control system is electrically connected with the first driving device, the second driving device, the conveying mechanism driving device, the suction head driving device and the detection station, and the electrical control system comprises a PLC module.
Compared with the prior art, the utility model has the following advantages:
according to the utility model, the double detection stations are designed on the chassis, the chip tray is designed again, the detection stations are distributed at two ends of the chip tray, and the chip is carried from the chip tray to the detection stations or back to the chip tray from the detection stations by matching with the carrying mechanism, so that the structure of the original four-axis robot is optimized, the original device is simplified, the test time is saved well, and the detection efficiency is improved.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are required to be used in the description of the embodiments will be briefly described below.
FIG. 1 is a front perspective view of a semiconductor chip test apparatus of the present utility model;
FIG. 2 is a schematic rear perspective view of a semiconductor chip test apparatus according to the present utility model;
FIG. 3 is a schematic diagram of a second drive arrangement of the test rig of the present utility model;
fig. 4 is a schematic view of a first driving device of the test equipment of the present utility model.
[ detailed description ] of the utility model
As shown in fig. 1 to 4, this embodiment provides a semiconductor chip testing device with dual detection units, including a chassis 1, a chip tray 2 is provided on the chassis 1, chip detection stations 3 are provided on two sides of the chip tray 2, a handling mechanism 4 is provided on the chassis 1, the handling mechanism 4 is used for handling chips to the chip tray 2 or the detection stations 3, by designing dual detection stations on the chassis, redesigning the chip tray, distributing the detection stations at two ends of the chip tray, and using the handling mechanism in cooperation, handling chips from the chip tray to the detection stations or from the detection stations to return chips to the chip tray, thereby optimizing the original four-axis robot structure, simplifying the original device, saving testing time and improving the detection efficiency.
Preferably, the detection unit 31 is arranged on the detection station 3, and the detection unit 31 is used for detecting the chip to be detected by electrifying, so that the chip can be better detected, and the automation of the chip test is ensured.
Preferably, the carrying mechanism 4 includes a vacuum chuck 41 and a carrying mechanism driving device 42 for driving the vacuum chuck 41 to move transversely, the carrying mechanism driving device 42 includes a carrying slide rail 421 disposed along a width direction of the chassis 1, a carrying slide block 422 slidably engaged with the carrying slide rail 421, a carrying belt pulley 423 disposed at an end of the carrying slide rail 421, and a carrying motor 424 coaxially disposed with the carrying belt pulley 423, so as to drive the vacuum chuck 41 to move back and forth in the two detecting stations 3 and the two chip trays 2, thereby greatly improving the detecting efficiency.
Preferably, the vacuum chuck 41 is provided with a suction head driving device 43 for driving the suction head of the vacuum chuck 41 to lift, the suction head driving device 43 comprises a lifting slide rail 431, a lifting slide block 432 for driving the vacuum chuck 41 to move and slidingly matched with the lifting slide rail 431, a lifting belt pulley 433 arranged at the end part of the lifting slide rail 431, and a lifting motor 434 coaxially arranged with the lifting belt pulley 433, and the lifting slide rail 431 drives the vacuum chuck 41 to move up and down to complete the actions of adsorbing and placing chips, so that the chips can be rapidly detected, and the detection efficiency is improved.
Preferably, the chip tray 2 includes a test chip tray 21 and a problem chip tray 22, the problem chip tray 22 is disposed above the test chip tray 21, a first driving device 23 for driving the problem chip tray 22 to move to an expanded or contracted position is disposed on the chassis 1, when the problem chip tray 22 is located at the expanded position, the problem chip tray 22 covers the test chip tray 21, when the problem chip tray 22 is located at the contracted position, the test chip tray 21 is exposed, and by means of disposing the test chip tray 21 and the problem chip recovery tray 22 in two layers, the design space can be greatly reduced, the design structure is optimized, and the device is miniaturized and designed more reasonably.
Preferably, the chassis 1 is further provided with a tray suspension 11, and the first driving device 23 includes a first motor 231 disposed on one side of the tray suspension 11, a first sliding rail 232 disposed on the other side of the tray suspension 11, a first sliding block 233 slidably engaged with the first sliding rail 232, and a problem chip tray support 234 disposed on the first sliding block 233, and by setting a sliding rail, the motor and the sliding rail are linked, so that the problem chip recovery tray 22 can be driven to move better, and thus the automatic recovery of the problem chip can be completed better.
Preferably, the second driving device 24 for driving the test chip tray 21 to move along the length direction of the chassis 1 is disposed on the test chip tray 21, and when the chip test starts, the second driving device 24 drives the test chip tray 21, so that the handling mechanism 4 can handle the chip to be tested, and can better drive the test chip tray 21 to move, thereby better completing the automatic sorting work of the chip.
Preferably, the second driving device 24 includes a second slide rail 241, a second slide block 242 slidably engaged with the first slide rail 232, a transverse belt pulley 243 disposed at two ends of the second slide rail 241, a second motor 245 coaxially disposed with one of the two transverse belt pulleys 243, and a test chip tray support 244 disposed on the second slide block 242, and the second driving device 24 further links the motor and the slide rail by means of the slide rail, so as to better drive the test chip tray 21 to move, thereby better completing the automatic sorting operation of chips.
Preferably, the automatic cleaning device further comprises an electrical control system 5, the electrical control system 5 is electrically connected with the first driving device 23, the second driving device 24, the conveying mechanism driving device 42, the suction head driving device 43 and the detection station 3, and the electrical control system 5 comprises a PLC module, and the operation of the system can be accurately controlled through the PLC system, so that each part is driven to accurately operate, and errors can be well avoided. Thereby saving test time and improving detection efficiency.
The above description of one embodiment provided in connection with the specific content does not set forth a limitation on the practice of the utility model. The method, structure, etc. similar to or identical to those of the present utility model, or some technical deductions or substitutions are made on the premise of the inventive concept, should be regarded as the protection scope of the present utility model.
Claims (9)
1. The utility model provides a semiconductor chip test equipment with two detecting element, includes quick-witted case (1), its characterized in that is equipped with chip tray (2) on machine case (1), chip tray (2) both sides respectively are equipped with chip detection station (3), be equipped with handling mechanism (4) on machine case (1), handling mechanism (4) are used for carrying the chip to chip tray (2) or on detection station (3).
2. The semiconductor chip testing equipment with double detection units according to claim 1, wherein the detection station (3) is provided with a detection unit (31), and the detection unit (31) is used for detecting a chip to be tested through electrifying.
3. The semiconductor chip testing equipment with the double detection units according to claim 1, wherein the carrying mechanism (4) comprises a vacuum chuck (41) and a carrying mechanism driving device (42) for driving the vacuum chuck (41) to move transversely, and the carrying mechanism driving device (42) comprises a carrying sliding rail (421) arranged along the width direction of the chassis (1), a carrying sliding block (422) in sliding fit with the carrying sliding rail (421), a carrying belt pulley (423) arranged at the end part of the carrying sliding rail (421) and a carrying motor (424) coaxially arranged with the carrying belt pulley (423).
4. A semiconductor chip testing apparatus with dual detecting units according to claim 3, wherein the vacuum chuck (41) is provided with a suction head driving device (43) for driving the suction head of the vacuum chuck (41) to lift, the suction head driving device (43) comprises a lifting slide rail (431), a lifting slide block (432) for driving the vacuum chuck (41) to move and being in sliding fit with the lifting slide rail (431), a lifting belt pulley (433) arranged at the end part of the lifting slide rail (431) and a lifting motor (434) coaxially arranged with the lifting belt pulley (433).
5. A semiconductor chip testing apparatus with dual inspection units according to claim 1, characterized in that the chip tray (2) comprises a test chip tray (21) and a problem chip tray (22), the problem chip tray (22) is arranged above the test chip tray (21), the chassis (1) is provided with a first driving device (23) for driving the problem chip tray (22) to move to an expanded or contracted position, when the problem chip tray (22) is located at the expanded position, the problem chip tray (22) covers the test chip tray (21), and when the problem chip tray (22) is located at the contracted position, the test chip tray (21) is exposed.
6. The semiconductor chip testing device with the double detection units according to claim 5, wherein the chassis (1) is further provided with a tray hanging frame (11), the first driving device (23) comprises a first motor (231) arranged on one side of the tray hanging frame (11), a first sliding rail (232) arranged on the other side of the tray hanging frame (11), a first sliding block (233) in sliding fit with the first sliding rail (232), and a problem chip tray support (234) arranged on the first sliding block (233).
7. A semiconductor chip testing apparatus with dual inspection units according to claim 6, characterized in that the test chip tray (21) is provided with a second driving device (24) for driving the test chip tray (21) to move along the length direction of the chassis (1).
8. The semiconductor chip testing apparatus with dual inspection units according to claim 7, wherein the second driving device (24) comprises a second slide rail (241), a second slider (242) slidingly engaged with the first slide rail (232), transverse pulleys (243) disposed at two ends of the second slide rail (241), a second motor (245) coaxially disposed with one of the two transverse pulleys (243), and a test chip tray support (244) disposed on the second slider (242).
9. The semiconductor chip test apparatus with dual inspection unit according to claim 7, further comprising an electrical control system (5), the electrical control system (5) being electrically connected to the first driving means (23), the second driving means (24), the handling mechanism driving means (42), the tip driving means (43) and the inspection station (3), the electrical control system (5) comprising a PLC module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222932773.6U CN219695351U (en) | 2022-11-03 | 2022-11-03 | Semiconductor chip test equipment with double detection units |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222932773.6U CN219695351U (en) | 2022-11-03 | 2022-11-03 | Semiconductor chip test equipment with double detection units |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219695351U true CN219695351U (en) | 2023-09-15 |
Family
ID=87939959
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222932773.6U Active CN219695351U (en) | 2022-11-03 | 2022-11-03 | Semiconductor chip test equipment with double detection units |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219695351U (en) |
-
2022
- 2022-11-03 CN CN202222932773.6U patent/CN219695351U/en active Active
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