CN219611739U - Filter circuit for inhibiting second harmonic and Wi-Fi6E module - Google Patents
Filter circuit for inhibiting second harmonic and Wi-Fi6E module Download PDFInfo
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- CN219611739U CN219611739U CN202223420591.7U CN202223420591U CN219611739U CN 219611739 U CN219611739 U CN 219611739U CN 202223420591 U CN202223420591 U CN 202223420591U CN 219611739 U CN219611739 U CN 219611739U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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- Y02E40/40—Arrangements for reducing harmonics
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Abstract
The utility model discloses a filter circuit for inhibiting second harmonic and a Wi-Fi6E module, wherein the filter circuit comprises: the filter circuit comprises a dielectric substrate, a capacitor C1, an inductor L1, a capacitor C2, a first lead, a second lead, a first grounding via hole and a second grounding via hole which are arranged on the dielectric substrate, wherein the first end of the inductor L1 is connected with the first end of the capacitor C1, the common node of the inductor L1 and the capacitor C1 is connected with the input end of the filter circuit, the second end of the inductor L1 is connected with the first end of the capacitor C2, and the common node of the inductor L1 and the capacitor C2 is connected with the output end of the filter circuit; the second end of the capacitor C1 is connected to the first ground via a first lead, and the second end of the capacitor C2 is connected to the second ground via a second lead. The parasitic inductance of the lead wire and the grounding via hole is used for replacing the inductance with small inductance used in the high-frequency resonance circuit with the frequency of more than 10GHz, so that the feasibility in production is realized. The second harmonic of the high frequency band can be effectively suppressed.
Description
Technical Field
The utility model relates to the technical field of wireless local area networks, in particular to a filter circuit for inhibiting second harmonic and a Wi-Fi6E module.
Background
To follow the rapid development of wireless local area network technology, the 6 th generation Wi-Fi technology has been a commercial enhancement to Wi-Fi 6E. Compared with Wi-Fi6, the Wi-Fi6E technology is prominently reflected in that the working frequency is expanded from a 5GHz frequency band to a 6GHz frequency band, and the channel bandwidth is expanded from 80MHz to 160MHz, so that the communication rate of equipment applying the Wi-Fi6E technology is greatly improved. But at the same time as the performance is improved, the electromagnetic interference between different devices is also more serious. In order to ensure that the device can normally operate in a complex electromagnetic wave environment, and ensure the use experience of users, an electromagnetic compatibility (EMC, electromagnetic Magnetic Compatibility) design is also important.
In wireless devices, higher harmonic suppression is one of the most important EMC indicators, and in the past Wi-Fi module harmonic suppression has mostly relied on diplexers. Wi-Fi6E expands the frequency band from 6GHz to 7.2GHz, the second harmonic frequency band is from 10GHz to 14.4GHz, and the harmonic suppression degree of most of the diplexers per se is low.
Disclosure of Invention
The utility model provides a filter circuit for inhibiting second harmonic and a Wi-Fi6E module, which are used for solving the problem that most of duplexers have lower inhibition degree on the second harmonic from 10GHz to 14.4GHz of the Wi-Fi6E module.
In a first aspect, the present utility model provides a filter circuit for suppressing a second harmonic, comprising: a dielectric substrate, a capacitor C1, an inductor L1, a capacitor C2, a first lead, a second lead, a first grounding via hole and a second grounding via hole which are arranged on the dielectric substrate,
the first end of the inductor L1 is connected with the first end of the capacitor C1, the common node of the inductor L1 and the capacitor C1 is connected with the input end of the filter circuit, the second end of the inductor L1 is connected with the first end of the capacitor C2, and the common node of the inductor L1 and the capacitor C2 is connected with the output end of the filter circuit;
a second end of the capacitor C1 is connected to the first ground via the first lead, and a second end of the capacitor C2 is connected to the second ground via the second lead.
In a second aspect, the present utility model provides a Wi-Fi6E module, comprising: the filter circuit of the first aspect comprises a radio frequency chip, a duplexer, an antenna and the filter circuit of the first aspect, wherein the input end of the filter circuit is connected with the radio frequency chip, the output end of the filter circuit is connected with the duplexer, and the duplexer is also connected with the antenna.
The embodiment of the utility model provides a filter circuit for inhibiting second harmonic, which is characterized by comprising: the filter circuit comprises a dielectric substrate, a capacitor C1, an inductor L1, a capacitor C2, a first lead, a second lead, a first grounding via hole and a second grounding via hole which are arranged on the dielectric substrate, wherein the first end of the inductor L1 is connected with the first end of the capacitor C1, the common node of the inductor L1 and the capacitor C1 is connected with the input end of the filter circuit, the second end of the inductor L1 is connected with the first end of the capacitor C2, and the common node of the inductor L1 and the capacitor C2 is connected with the output end of the filter circuit; the second end of the capacitor C1 is connected to the first ground via a first lead, and the second end of the capacitor C2 is connected to the second ground via a second lead. The parasitic inductance caused by the first lead, the second lead, the first grounding via hole and the second grounding via hole is utilized to replace the inductance with small inductance value used in the high-frequency resonance circuit with the frequency of more than 10GHz, so that the feasibility in production is realized. The values of the capacitor C1, the inductor L1 and the capacitor C2 are combined and matched, so that the filter circuit can be used for suppressing the second harmonic of the frequency range from 10GHz to 14.4GHz, namely the frequency range from 5GHz to 6GHz of Wi-Fi6E, the minimum suppression degree can reach-25 dB, the suppression of a duplexer can reach-50 dB, the EMC index of a system can be effectively improved, and the emission quality of signals is improved; on the other hand, with three discrete devices of capacitor C1, inductor L1 and capacitor C2, cost can be reduced and yield can be improved, with great advantages in highly integrated module design.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the utility model or to delineate the scope of the utility model. Other features of the present utility model will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a filter circuit for suppressing second harmonic according to a first embodiment of the present utility model;
fig. 2 is an equivalent circuit diagram of a filter circuit according to a first embodiment of the present utility model;
FIG. 3 is a schematic diagram of a filtering simulation result according to a first embodiment of the present utility model;
fig. 4 is a schematic structural diagram of a Wi-Fi6E module according to a second embodiment of the present utility model.
Detailed Description
In order that those skilled in the art will better understand the present utility model, a technical solution in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present utility model without making any inventive effort, shall fall within the scope of the present utility model.
Example 1
Fig. 1 is a schematic structural diagram of a filter circuit for suppressing second harmonic according to a first embodiment of the present utility model, where, as shown in fig. 1, the filter circuit for suppressing second harmonic includes: a dielectric substrate, a capacitor C1, an inductor L1, a capacitor C2, a first lead S1, a second lead S2, a first grounding via D1 and a second grounding via D2 which are arranged on the dielectric substrate,
the first end of the inductor L1 is connected with the first end of the capacitor C1, the common node of the inductor L1 and the capacitor C1 is connected with the input end of the filter circuit, the second end of the inductor L1 is connected with the first end of the capacitor C2, and the common node of the inductor L1 and the capacitor C2 is connected with the output end of the filter circuit;
the second end of the capacitor C1 is connected to the first ground via D1 via the first lead S1, and the second end of the capacitor C2 is connected to the second ground via D2 via the second lead S2.
When the filter circuit is used for suppressing the second harmonic, the input end of the filter circuit is connected with the radio frequency chip, and the output end of the filter circuit is connected with the duplexer. The dielectric substrate is a sheet-shaped bonding material synthesized by resin and a carrier, and is used for bearing and bonding copper foil and also is used as a carrier for the mounted components.
The inductor can block high frequency from passing, the capacitor can block low frequency from passing, and signals with various frequencies can be filtered by proper combination of the inductor and the capacitor. The bandwidth of the frequency band of 6GHz is 1.2GHz, so that the bandwidth of 6GHz reaches 7.2GHz, and the second harmonic of 5GHz-6GHz is 10GHz-14.4GHz. For LC resonance circuits above 10GHz, the inductance used is very small and discrete devices (inductors) cannot be used to construct the resonance circuit. Therefore, the present embodiment considers that the leads and the through holes on the dielectric substrate have parasitic inductances, and the parasitic inductances are generally smaller, so that the parasitic inductances generated by the leads and the through holes can be used to replace inductance values required by the LC resonant circuit.
In the filter circuit of this embodiment, as shown in fig. 2, the inductance values of the serially connected inductance elements may be superimposed, and fig. 2 is an equivalent circuit of the filter circuit shown in fig. 1, where the first lead S1 is serially connected with the first ground via D1, so that the parasitic inductance of the first lead S1 and the first ground via D1 is equal to the inductance L2, and the second lead S2 is serially connected with the second ground via D2, so that the parasitic inductance of the second lead S2 and the second ground via D2 is equal to the inductance L3. The capacitor C1 and the inductor L2 form a first trap circuit, and the capacitor C2 and the inductor L3 form a second trap circuit.
As shown in fig. 3, fig. 3 is a schematic diagram showing a simulation result of the filter circuit of the present embodiment, in fig. 3, the notch point of the first notch circuit is m1, the notch point of the second notch circuit is m2, and the size of L1 determines the notch depth of the entire notch circuit, and it can be seen from the simulation diagram that the filter circuit has attenuation of-25 Db for 10GHz to 14.4GHz, which is superimposed on the duplexer, so as to provide a harmonic suppression degree of the entire system.
The embodiment of the utility model provides a filter circuit for inhibiting second harmonic, which is characterized by comprising: the capacitor comprises a dielectric substrate, a capacitor C1, an inductor L1, a capacitor C2, a first lead S1, a second lead S2, a first grounding via hole D1 and a second grounding via hole D2 which are arranged on the dielectric substrate, wherein a first end of the inductor L1 is connected with a first end of the capacitor C1, a common node of the inductor L1 and the capacitor C1 is connected with an input end of a filter circuit, a second end of the inductor L1 is connected with a first end of the capacitor C2, and a common node of the inductor L1 and the capacitor C2 is connected with an output end of the filter circuit; the second end of the capacitor C1 is connected to the first ground via D1 via the first lead S1, and the second end of the capacitor C2 is connected to the second ground via D2 via the second lead S2. The parasitic inductance caused by the first lead S1, the second lead S2, the first grounding via hole D1 and the second grounding via hole D2 is utilized to replace the inductance with small inductance used in the high-frequency resonance circuit with the frequency of more than 10GHz, so that the feasibility in production is realized. The values of the capacitor C1, the inductor L1 and the capacitor C2 are combined and matched, so that the filter circuit can reach-25 dB at the lowest inhibition degree for the frequency band of the second harmonic of the frequency band of 10GHz to 14.4GHz, namely the 5GHz-6GHz of Wi-Fi6E, and can reach-50 dB in cooperation with the inhibition of a duplexer, the EMC index of a system can be effectively improved, and the emission quality of signals is improved; on the other hand, with three discrete devices of capacitor C1, inductor L1 and capacitor C2, cost can be reduced and yield can be improved, with great advantages in highly integrated module design.
In an alternative embodiment of the present utility model, the first lead S1 and the first ground via D1 together generate a first parasitic inductance, and the second lead S2 and the second ground via D2 together generate a second parasitic inductance. The dielectric substrate is a 1080 prepreg PCB, and has strict specifications on the values of the capacitor C1, the capacitor C2 and the inductor L1, and the diameter and the length of the grounding via hole. The inductance value of the inductance L1 is 1nH, the capacitance value of the capacitance C1 is 0.5pF, the capacitance value of the capacitance C2 is 0.4pF, the first parasitic inductance is 0.5nH, and the second parasitic inductance is 0.3nH, for example. The values of the first parasitic inductance and the second parasitic inductance can be obtained according to simulation.
The parasitic inductances of the two ground vias are calculated as follows:
the inductance calculation formula of the via hole is as follows:
it can be seen that the diameter of the via hole has a small influence on the inductance, while the length of the via hole on the dielectric substrate has a large influence on the inductance, and under 1080pp sheet, the length of the ground via hole is h=0.0075 cm, and the center diameter d=0.01 cm of the ground via hole, the inductance of one ground via hole is 0.03nH. That is, the parasitic inductances of the first ground via D1 and the second ground via D2 are both 0.03nH.
The length of the grounding via hole is the thickness of the dielectric substrate.
The first parasitic inductance is 0.5nH, the parasitic inductance value of the first lead S1 should be set to 0.47nH, and the second parasitic inductance is 0.3nH, and the parasitic inductance value of the second lead S2 should be set to 0.27nH.
The parasitic inductances of the two grounded leads are calculated as follows:
the inductance calculation formula of the lead wire is as follows: l=2l (In (2L/W) +0.5+0.2235W/L)
Wherein, l is the length of the lead, W is the width of the lead, the 50 ohm microstrip line is w=5 mil width under 1080pp sheet, and the parasitic inductances of the first lead S1 and the second lead S2 are substituted into the formula, so as to calculate the length of the first lead S1 to be about 35mil, and the length of the second lead S2 to be about 15mil.
In an alternative embodiment of the present utility model, the inductance L1 is a planar spiral inductance.
In an alternative embodiment of the utility model, a metal disc is arranged on the dielectric substrate, and the capacitor C1, the inductor L1 and the capacitor C2 are connected to the dielectric substrate through the metal disc.
Example two
Fig. 4 is a schematic diagram of a Wi-Fi6E module according to a second embodiment of the present utility model, as shown in fig. 4, where the Wi-Fi6E module includes: the antenna is used for receiving and transmitting signals, the input end of the filter circuit is connected with the radio frequency chip, the output end of the filter circuit is connected with the duplexer, and the duplexer is also connected with the antenna. The filter circuit comprises a dielectric substrate, and the radio frequency chip and the duplexer can be arranged on the dielectric substrate.
In an optional embodiment of this embodiment, the transmitting frequency band of the radio frequency chip includes 5G and 6G frequency bands, that is, the radio frequency chip, the filter, the duplexer are sequentially connected with the antenna, and the signals in the 5G and 6G frequency bands are processed by the filter circuit and the duplexer and then sent out by the antenna, so as to play a role in suppressing the second harmonic of the signals in the 5G and 6G frequency bands.
In an optional embodiment of this embodiment, the radio frequency chip further includes a 2.4G interface, the transmission frequency band of the radio frequency chip includes a 2.4G frequency band, and the 2.4G interface is connected to the duplexer.
The filter circuit provided by the embodiment of the utility model is the filter circuit in the first embodiment, and has the function modules and beneficial effects corresponding to the filter circuit in the first embodiment.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present utility model may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present utility model are achieved, and the present utility model is not limited herein.
The above embodiments do not limit the scope of the present utility model. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included in the scope of the present utility model.
Claims (8)
1. A filter circuit for suppressing second harmonics, comprising: the dielectric substrate, a capacitor C1, an inductor L1, a capacitor C2, a first lead, a second lead, a first grounding via hole and a second grounding via hole which are arranged on the dielectric substrate, wherein the lengths of the two grounding via holes are 0.0075cm, the center diameter is 0.01cm,
the first end of the inductor L1 is connected with the first end of the capacitor C1, the common node of the inductor L1 and the capacitor C1 is connected with the input end of the filter circuit, the second end of the inductor L1 is connected with the first end of the capacitor C2, and the common node of the inductor L1 and the capacitor C2 is connected with the output end of the filter circuit;
a second end of the capacitor C1 is connected to the first grounding via through the first lead, and a second end of the capacitor C2 is connected to the second grounding via through the second lead;
the first lead and the first grounding via hole jointly generate a first parasitic inductance, the second lead and the second grounding via hole jointly generate a second parasitic inductance, the inductance value of the inductance L1 is 1nH, the capacitance value of the capacitance C1 is 0.5pF, the capacitance value of the capacitance C2 is 0.4pF, the first parasitic inductance is 0.5nH, and the second parasitic inductance is 0.3nH.
2. A filter circuit for suppressing a second harmonic as in claim 1,
the length of the first lead is 35mil, and the width is 5mil;
the second lead has a length of 15mil and a width of 5mil;
the diameters of the first grounding via hole and the second grounding via hole are 8mil, and the lengths of the first grounding via hole and the second grounding via hole are 3mil.
3. A filter circuit as claimed in any one of claims 1-2, characterized in that the inductance L1 is a planar spiral inductance.
4. The filter circuit for suppressing a second harmonic as in any one of claims 1-2 wherein the dielectric substrate is 1080 prepreg.
5. A filter circuit as claimed in any one of claims 1-2, characterized in that a metal disc is provided on the dielectric substrate, through which the capacitor C1, the inductance L1 and the capacitor C2 are connected to the dielectric substrate.
6. A Wi-Fi6E module, comprising: the radio frequency chip, the duplexer, the antenna and the filter circuit according to any one of claims 1-5, wherein the input end of the filter circuit is connected with the radio frequency chip, the output end of the filter circuit is connected with the duplexer, and the duplexer is also connected with the antenna.
7. The Wi-Fi6E module of claim 6, wherein the transmit bands of the radio frequency chip comprise 5G and 6G bands.
8. The Wi-Fi6E module of claim 6, wherein the radio frequency chip further comprises a 2.4G interface, the transmit frequency band of the radio frequency chip further comprises a 2.4G frequency band, and the 2.4G interface is coupled to the diplexer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223420591.7U CN219611739U (en) | 2022-12-16 | 2022-12-16 | Filter circuit for inhibiting second harmonic and Wi-Fi6E module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223420591.7U CN219611739U (en) | 2022-12-16 | 2022-12-16 | Filter circuit for inhibiting second harmonic and Wi-Fi6E module |
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| Publication Number | Publication Date |
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| CN219611739U true CN219611739U (en) | 2023-08-29 |
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| CN202223420591.7U Active CN219611739U (en) | 2022-12-16 | 2022-12-16 | Filter circuit for inhibiting second harmonic and Wi-Fi6E module |
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