CN219513829U

CN219513829U - Mixed layered battery equalization circuit

Info

Publication number: CN219513829U
Application number: CN202320611881.5U
Authority: CN
Inventors: 刘弈含
Original assignee: Individual
Current assignee: Individual
Priority date: 2023-03-22
Filing date: 2023-03-22
Publication date: 2023-08-11
Anticipated expiration: 2033-03-22

Abstract

The utility model discloses a battery equalization circuit with mixed layering. The hybrid layered battery equalization circuit provided by the utility model is provided with m battery modules, an acquisition module, a switch gating network, a full-wave rectification circuit, a transformer, an LCC resonance circuit, a half-bridge rectification circuit and a control module which are connected in series, wherein the switch gating network can select different battery modules to be connected with the full-wave rectification circuit, so that the LCC resonance circuit is combined with the half-bridge rectification circuit and the transformer to perform equalization operation between the battery modules connected with the full-wave rectification circuit and other battery modules, and further, a single equalizer and n single batteries connected in series are arranged in the battery modules, so that multi-level equalization of a battery pack is realized, the battery modules can be equalized, the single batteries can be equalized, the accuracy and pertinence of battery equalization are improved, the equalization effect is enhanced, and the circuit complexity is reduced.

Description

Mixed layered battery equalization circuit

Technical Field

The embodiment of the utility model relates to an energy storage battery technology, in particular to a battery equalization circuit with mixed layering.

Background

Common equalization circuit structures mainly include two types, cell-to-Cell (S2C) and Cell-to-Cell (C2C). The C2C equalization circuit can realize electric quantity transmission and equalization between two adjacent battery cells, and the S2C equalization circuit adopts a mode that a plurality of battery cells share one equalizer to reduce the number of elements of the equalization circuit.

The existing equalization method is poor in equalization effect, only single-layer equalization is generally arranged, and a multi-layer equalization circuit is complex and difficult to control.

Disclosure of Invention

The utility model provides a battery equalization circuit with mixed layering, which is used for enhancing the equalization effect and reducing the complexity of the circuit.

The embodiment of the utility model provides a battery equalization circuit with mixed layering, which comprises the following components: the device comprises m battery modules, an acquisition module, a switch gating network, an LCC resonance circuit, a half-bridge rectification circuit, a full-wave rectification circuit, a transformer and a control module which are connected in series;

each battery module comprises a single equalizer and n single batteries connected in series, and the single batteries are connected with the single equalizer;

the acquisition modules are respectively connected with the m battery modules and are used for acquiring module parameter information of the battery modules and monomer parameter information of the single batteries;

the switch gating network is respectively connected with two poles of each battery module and also connected with the full-wave rectifying circuit, and is used for selecting the battery modules to be balanced in the m battery modules, so that the battery modules to be balanced are conducted with the full-wave rectifying circuit, and the battery modules not to be balanced are disconnected with the full-wave rectifying circuit;

the full-wave rectifying circuit is connected with the secondary side of the transformer, the primary side of the transformer is connected with the LCC resonant circuit, and the LCC resonant circuit is connected with the half-bridge rectifying circuit;

the control module is respectively connected with the acquisition module, the switch gating network, the single equalizer and the half-bridge rectifying circuit, and is used for controlling the connection states of the switch gating network, the single equalizer and the full-wave rectifying circuit according to the module parameter information and the single parameter information so as to perform equalization operation on at least one single battery in the battery module to be equalized.

Optionally, the switch gating network includes: the battery module comprises a battery module, a full-wave rectifying circuit and a battery module, wherein the battery module comprises a first controllable switch corresponding to the battery module one by one and a second controllable switch corresponding to the battery module one by one, the positive electrode of the battery module is connected with the full-wave rectifying circuit through the corresponding first controllable switch, and the negative electrode of the battery module is connected with the full-wave rectifying circuit through the corresponding second controllable switch.

Optionally, the secondary side of the transformer comprises a first winding and a second winding; the second end of the first winding is connected with the first end of the second winding to serve as a middle tap;

the full-wave rectifying circuit comprises a first diode, a second diode, a filter capacitor and a filter inductor; the anode of the first diode is connected with the first end of the first winding, and the anode of the second diode is connected with the second end of the second winding; the cathodes of the first diode and the second diode are respectively connected with the first end of the filter inductor, and the second end of the filter inductor is respectively connected with the positive electrode of each battery module through each first controllable switch; the filter capacitor is connected between the first end of the filter capacitor and the middle tap; the middle tap is also connected with the cathodes of the battery modules through the second controllable switches respectively.

Optionally, the LCC resonant circuit includes a series inductor, a series capacitor, and a parallel capacitor, where a first end of the series inductor is connected to the half-bridge rectifier circuit, a second end of the series inductor is connected to a first end of a primary side of the transformer through the series capacitor, and the parallel capacitor is connected in parallel to the primary side.

Optionally, the half-bridge rectifying circuit includes a first transistor and a second transistor, and control ends of the first transistor and the second transistor are respectively connected with the control module; the first end of the first transistor is connected with the total positive electrode of the battery module formed by connecting m battery modules in series, and the second end of the first transistor is connected with the first end of the series inductor; the first end of the series inductor is also connected with the first end of the second transistor, and the second end of the second transistor is respectively connected with the second end of the primary side and the total negative electrode of the battery module.

Optionally, the first transistor and the second transistor are both N-type field effect transistors.

Optionally, the cell equalizer includes a cell equalizing circuit corresponding to a pair of cells, where one pair of cells includes two adjacent cells; the single cell balancing circuit is respectively connected with two poles of the two single cells in the corresponding battery pair and is used for balancing the two single cells in the battery pair.

Optionally, the single equalizer further includes a multi-battery equalizing circuit corresponding to a battery string one by one, where one battery string includes two adjacent battery pairs; the multi-battery balancing circuit is respectively connected with two poles of two battery pairs corresponding to the battery strings, and is used for balancing the two battery pairs in the battery strings.

Optionally, the cell balancing circuit includes a third transistor, a fourth transistor and a first inductor, where the third transistor and the fourth transistor are connected in series between two ends of the corresponding battery pair, a connection point of the third transistor and the fourth transistor is connected with a first end of the first inductor, and a connection point of two cells in the battery pair is connected with a second end of the first inductor;

the multi-battery equalization circuit comprises a fifth transistor, a sixth transistor and a second inductor, wherein the fifth transistor and the sixth transistor are connected in series between two ends of the battery string, the connection point of the fifth transistor and the sixth transistor is connected with the first end of the second inductor, and the connection point of two battery pairs in the battery string is connected with the second end of the second inductor.

Optionally, n=4, the number of the single-cell equalization circuits is 2, and the number of the multi-cell equalization circuits is 1.

The hybrid layered battery equalization circuit provided by the utility model is provided with m battery modules, an acquisition module, a switch gating network, a full-wave rectification circuit, a transformer, an LCC resonance circuit, a half-bridge rectification circuit and a control module which are connected in series, wherein the switch gating network can select different battery modules to be connected with the full-wave rectification circuit, and further, the LCC resonance circuit is used for combining the half-bridge rectification circuit and the transformer to perform equalization operation between the battery modules connected with the full-wave rectification circuit and other battery modules, and the use of the LCC resonance circuit can reduce the complexity of the circuit. And then still be provided with monomer equalizer and n monomer batteries of establishing ties in the battery module, monomer equalizer can also be balanced monomer battery or battery pair to realized the multilayer of group battery is balanced, can be balanced between the battery module, can also be balanced the monomer battery, has improved the balanced accuracy of battery and pertinence, has strengthened balanced effect and has reduced the circuit complexity.

Drawings

Fig. 1 is a schematic circuit diagram of a battery equalization circuit with mixed layering according to an embodiment of the present utility model;

fig. 2 is a schematic circuit diagram of another battery equalization circuit with mixed layering according to an embodiment of the present utility model;

fig. 3 is a schematic circuit diagram of a battery equalization circuit according to another embodiment of the present utility model;

fig. 4 is a schematic circuit diagram of a battery equalization circuit according to another embodiment of the present utility model;

fig. 5 is a schematic circuit diagram of a battery equalization circuit according to another embodiment of the present utility model;

fig. 6 is a schematic circuit diagram of different states of equalization performed on a first battery module according to an embodiment of the present utility model;

fig. 7 is a schematic circuit diagram of different states of equalizing the unit cells in the battery pair according to the present utility model;

fig. 8 is a schematic circuit diagram of a different state of equalizing a battery pair in a battery string according to the present utility model.

Detailed Description

The utility model is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the utility model and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present utility model are shown in the drawings.

In order to solve the problems set forth in the background art, embodiments of the present utility model provide a hybrid layered battery equalization circuit. Fig. 1 is a schematic circuit diagram of a hybrid layered battery equalization circuit according to an embodiment of the present utility model, and referring to fig. 1, a hybrid layered battery equalization circuit 100 includes m battery modules 101, an acquisition module 102, a switch gating network 103, a full-wave rectification circuit 104, a transformer 105, an LCC resonant circuit 106, a half-bridge rectification circuit 107, and a control module 108 connected in series. Each battery module 101 includes a cell equalizer 109 and n cells CE connected in series, where m is a natural number greater than 1 and n is a natural number greater than or equal to 2, and the cell CE is connected to the cell equalizer 109. The acquisition modules 102 are respectively connected with the m battery modules 101, and are used for acquiring module parameter information of the battery modules 101 and monomer parameter information of the single batteries CE. The switch gating network 103 is respectively connected with two poles of each battery module 101 and also connected with the full-wave rectifying circuit 104, and the switch gating network 103 is used for selecting the battery modules 101 to be balanced in the m battery modules 101, so that the battery modules 101 to be balanced are conducted with the full-wave rectifying circuit 104, and the battery modules 101 not to be balanced are disconnected with the full-wave rectifying circuit 104. The full-wave rectifier circuit 104 is connected to the secondary side of the transformer 105, the primary side of the transformer 105 is connected to the LCC resonant circuit 106, and the LCC resonant circuit 106 is connected to the half-bridge rectifier circuit 107. The control module 108 is respectively connected with the acquisition module 102, the switch gating network 103, the single equalizer 109 and the half-bridge rectifying circuit 107, and the control module 108 is used for controlling the connection states of the switch gating network, the single equalizer and the full-wave rectifying circuit according to the module parameter information and the single parameter information so as to perform equalizing operation on at least one single battery in the battery module to be equalized.

Specifically, the battery module 101 includes a cell equalizer 109 and n serial cells CE in sequence, where the cell equalizer 109 is respectively connected to two poles of each cell CE, and the cell equalizer 109 may include a Buck-Boost circuit, and the cell CE in the battery module 101 may be balanced between cells and/or between a pair of cells and a pair of cells by using the multi-layer Buck-Boost circuit. The acquisition module 102 refers to a state acquisition component of the single battery CE and the battery module 101, and may include a plurality of sensing elements such as a current sensor, a voltage sensor and/or a power sensor, where the acquisition module 102 may acquire module parameter information of the battery module 101, and may also acquire single parameter information of each single battery CE. The module parameter information refers to various parameter information that may characterize the charge or state of health of the battery module 101. The cell parameter information refers to various parameter information that can characterize the electric quantity or the state of health of the cell CE.

The switch gating network 103 is a gating circuit including a plurality of switches, and is disposed between the full-wave rectifying circuit 104 and the battery modules 101 connected in series, and can select the battery modules 101 to be balanced among the battery modules 101 under the control of the control module 108, so that conduction is achieved between the battery modules 101 to be balanced and the full-wave rectifying circuit 104, and the battery modules 101 not to be balanced are kept disconnected from the full-wave rectifying circuit 104.

The transformer 105 may be a multi-winding transformer, and the transformation ratio may be k:1:1. The full-wave rectifying circuit 104 is connected to the secondary side of the transformer 105, and can full-wave rectify the secondary side electric signal, thereby equalizing the battery module 101 together with the LCC resonant circuit 106 and the half-bridge rectifying circuit 107. LCC resonant circuit 106 is disposed between half-bridge rectifier circuit 107 and the primary side of transformer 105. The transistors in the half-bridge rectifier circuit 107 are connected to the control module 108. The control module 108 is a central control device of the battery equalization circuit 100, and the control module 108 may include a single chip or a micro control chip having data analysis and control functions, for example. The control module 108 can determine the battery module 101 to be balanced according to the module parameter information uploaded by the acquisition module, and adjust the state of the switch gating network 103 to connect the battery module 101 to be balanced with the full-wave rectifying circuit 104 and disconnect other battery modules 101 not to be balanced with the full-wave rectifying circuit 104, so as to control the half-bridge rectifying circuit 107 to balance the battery module 101 to be balanced with other battery modules 101. The control module 108 may further determine a single battery CE or a battery pair to be balanced according to the single parameter information uploaded by the acquisition module 102, and control the single equalizer 109 to balance the single battery CE or the battery pair.

The mixed layered battery equalization circuit provided by the embodiment is provided with m battery modules, an acquisition module, a switch gating network, a full-wave rectification circuit, a transformer, an LCC resonance circuit, a half-bridge rectification circuit and a control module which are connected in series, wherein the switch gating network can select different battery modules to be connected with the full-wave rectification circuit, and then the LCC resonance circuit is used for combining the half-bridge rectification circuit and the transformer to perform equalization operation between the battery modules connected with the full-wave rectification circuit and other battery modules, and the use of the LCC resonance circuit can reduce the complexity of the circuit. And then still be provided with monomer equalizer and n monomer batteries of establishing ties in the battery module, monomer equalizer can also be balanced monomer battery or battery pair to realized the multilayer of group battery is balanced, can be balanced between the battery module, can also be balanced the monomer battery, has improved the balanced accuracy of battery and pertinence, has strengthened balanced effect and has reduced the circuit complexity.

Optionally, fig. 2 is a schematic circuit diagram of another hybrid layered battery equalization circuit according to an embodiment of the present utility model, referring to fig. 2, based on the foregoing embodiment, the switch gating network 103 (excluding the battery module 101) includes a first controllable switch (with reference numerals of k1, k2, k3, …, km-1 and km respectively) corresponding to one of the battery modules 101 and a second controllable switch (with reference numerals of k1', k2', k3', …, km-1' and km respectively) corresponding to one of the battery modules, where the positive electrode of the battery module 101 is connected to the full-wave rectification circuit 104 via the corresponding first controllable switch, and the negative electrode of the battery module 101 is connected to the full-wave rectification circuit 104 via the corresponding second controllable switch. The on-off of the controllable switch is controlled by the control module. In fig. 2 and the following drawings, the control module and the acquisition module are omitted to reduce the complexity of the circuit.

The secondary side of the transformer 105 comprises a first winding x and a second winding y; the second end of the first winding x is connected to the first end of the second winding y as an intermediate tap. The full-wave rectification circuit 104 includes a first diode D1, a second diode D2, a filter capacitor C, and a filter inductance L; the anode of the first diode D1 is connected with the first end of the first winding x, and the anode of the second diode D2 is connected with the second end of the second winding y; the cathodes of the first diode D1 and the second diode D2 are respectively connected with the first end of the filter inductor L, and the second end of the filter inductor L is respectively connected with the positive electrode of each battery module 101 through each first controllable switch; the filter capacitor C is connected between the first end of the filter inductor L and the middle tap; the center tap is also connected to the negative electrode of each battery module 101 via each second controllable switch, respectively.

The LCC resonant circuit 106 includes a series inductance Lr, a series capacitance Cr, and a parallel capacitance Cp, a first end of the series inductance Lr is connected to the half-bridge rectifier circuit 107, a second end of the series inductance Lr is connected to a first end of the primary side of the transformer 105 via the series capacitance Cr, and the parallel capacitance Cp is connected in parallel to the primary side of the transformer 105.

The half-bridge rectification circuit 107 comprises a first transistor Q1 and a second transistor Q2, and control ends of the first transistor Q1 and the second transistor Q2 are respectively connected with the control module; a first end of the first transistor Q1 is connected with a total positive electrode of a battery module formed by connecting m battery modules 101 in series, and a second end of the first transistor Q1 is connected with a first end of a series inductor Lr; the first end of the series inductor Lr is also connected with the first end of the second transistor Q2, and the second end of the second transistor Q2 is respectively connected with the second end of the primary side and the total negative electrode of the battery module. Illustratively, the first transistor Q1 and the second transistor Q2 are both N-type field effect transistors.

Specifically, the switch gating network 103 is provided with 2m controllable switches controlled to be opened and closed by the control module, and the controllable switches include m first controllable switches (with reference numbers of k1, k2, …, km in sequence) and m second controllable switches (with reference numbers of k1', k2', …, km in sequence), wherein first ends of all the first controllable switches are connected with the full-wave rectifying circuit 104 after being connected, second ends of the first controllable switches are connected with anodes of the corresponding battery modules 101, second ends of all the second controllable switches are connected with the full-wave rectifying circuit 101 after being connected, and first ends of the second controllable switches are connected with cathodes of the corresponding battery modules 101. The control module can determine the equalization requirement according to the information uploaded by the acquisition module, so as to control the on-off of the controllable switch corresponding to each battery module 101.

The transformer 105 is a multi-winding transformer, and the secondary side includes two windings of a first winding x and a second winding y, and the connection ends of the two windings are center taps. The first diode D1 and the second diode D2 of the full-wave rectifying circuit 104 are rectifying diodes, an anode of the first diode D1 is connected to the center tap, and an anode of the second diode D2 is connected to the second end of the second winding y. The cathodes of the first diode D1 and the second diode D2 are connected with the first end of the filter inductor L. The second end of the filter inductor L is connected to the positive electrode of the battery module 101 corresponding to the first controllable switch through each first controllable switch. The center tap is also connected to the negative electrode of the battery module 101 corresponding to the second controllable switch through each second controllable switch.

In the LCC resonant circuit 106, a series inductance Lr and a series capacitance Cr are connected in series between a first end of the primary side of the transformer 105 and a connection point of the half-bridge rectifying circuit 107 (refer to a connection point between the second end of the first transistor and the first end of the second transistor). The first end of the parallel capacitor Cp is connected to the first end of the primary side, and the second end of the parallel capacitor Cp is connected to the second end of the primary side.

The first terminal of the first transistor Q1 is connected to the total positive electrode of the battery modules formed by connecting the m battery modules 101 in series. The second terminal of the first transistor Q1 is connected to the first terminal of the second transistor Q2. A second terminal of the second transistor Q2 is connected to a second terminal of the primary side of the transformer 105, and is also connected to a total negative electrode of the battery modules formed by connecting the m battery modules 101 in series. The first transistor Q1 and the second transistor Q2 of the half-bridge rectifying circuit 107 may be MOS transistors or triodes, and the first transistor Q1 and the second transistor Q2 may change their states according to signals transmitted to the transistor control terminal by the control module, so as to achieve equalization of the battery module 101. For example, the first transistor Q1 and the second transistor Q2 may be N-type MOS transistors, and the signal transmitted to the control terminal of the transistor by the control module may include a PWM signal.

For example, the acquisition module may acquire the terminal voltage of each battery module 101 and upload it to the control module. The control module calculates an average voltage of each battery module 101 in the battery modules according to the terminal voltages of the battery modules 101, and further determines whether the voltage value of the battery module is within a preset range according to the terminal voltage of each battery module 101, wherein the preset range may be related to the average voltage of the battery modules 101. If the voltage value of a certain battery module 101 is not within the preset range, the control module controls the switch gating network 103 to turn on the corresponding switch, and further starts the total equalization circuit composed of the LCC resonant circuit 106, the half-bridge rectifier circuit 107, the full-wave rectifier circuit 104 and the transformer 105, so as to generate PWM signals to act on the first transistor Q1 and the second transistor Q2, thereby realizing equalization of the corresponding battery module 101. When the control module detects that the terminal voltage of the balanced battery module 101 meets the preset range according to the data uploaded by the acquisition module, balancing is completed.

For example, on the one hand, if the mth battery module M _m If the terminal voltage value of (2) is not within the preset range, controlling the mth battery module M _m The corresponding first controllable switch km and second controllable switch km' are turned on. On the basis, the control module outputs PWM signals to act on the control ends of the first transistor Q1 and the second transistor Q2 to realize the mth battery module M _m The amount of electricity between the remaining battery modules is equalized. On the other hand, if the M-1 th battery module M _m-1 And the mth battery module M _m If the terminal voltage value of (2) is not within the preset range, controlling the (m-1)Battery module M _m-1 Corresponding first controllable switch km-1 and second controllable switch km-1' are conducted, and the mth battery module M is also controlled _m The corresponding first controllable switch km and second controllable switch km' are turned on. On the basis, the control module outputs PWM signals to act on the control ends of the first transistor Q1 and the second transistor Q2, so that the electric quantity balance between the m-1 th battery module Mm-1 and the m-th battery module Mm and the rest battery modules is realized. Not only the equalization of a single battery module but also the respective equalization of a plurality of battery modules 101 can be achieved.

The mixed layered battery equalization circuit provided by the embodiment is provided with m battery modules, an acquisition module, a switch gating network, a full-wave rectification circuit, a transformer, an LCC resonance circuit, a half-bridge rectification circuit and a control module which are connected in series, wherein the switch gating network can select different battery modules to be connected with the full-wave rectification circuit, and then the LCC resonance circuit is used for combining the half-bridge rectification circuit and the transformer to perform equalization operation between the battery modules connected with the full-wave rectification circuit and other battery modules, and the use of the LCC resonance circuit can reduce the complexity of the circuit. And then still be provided with monomer equalizer and n monomer batteries of establishing ties in the battery module, monomer equalizer can also be balanced monomer battery or battery pair to realized the multilayer of group battery is balanced, can be balanced between the battery module, can also be balanced the monomer battery, has improved the balanced accuracy of battery and pertinence, has strengthened balanced effect.

Optionally, fig. 3 is a schematic circuit diagram of a battery equalization circuit with mixed layering according to an embodiment of the present utility model, and referring to fig. 2 and fig. 3, on the basis of the foregoing embodiment, the cell equalizer includes a cell equalization circuit 201 corresponding to a pair of batteries 202 one by one, where a pair of batteries 202 includes two adjacent cells CE; the cell balancing circuits 201 are respectively connected to two poles of two cells CE in the corresponding battery pair 202, and the cell balancing circuits 201 are used for balancing the two cells CE in the battery pair 202. The single equalizer further comprises a multi-battery equalizing circuit 301 corresponding to the battery strings 302 one by one, wherein one battery string 302 comprises two adjacent battery pairs 202; the multi-cell balancing circuit 301 is respectively connected to two poles of two battery pairs 202 in the corresponding battery string 302, and the multi-cell balancing circuit 301 is used for balancing the two battery pairs 202 in the battery string 302.

Specifically, fig. 4 is a schematic circuit diagram of a battery balancing circuit with mixed layering according to an embodiment of the present utility model, referring to fig. 4, a single-battery balancing circuit 201 includes a third transistor Q3, a fourth transistor Q4, and a first inductor L1, the third transistor Q3 and the fourth transistor Q4 are connected in series between two ends of a corresponding battery pair 202, a connection point of the third transistor Q3 and the fourth transistor Q4 is connected to a first end of the first inductor L1, and a connection point of two single batteries CE in the battery pair 202 is connected to a second end of the first inductor L1. The third transistor Q3 and the fourth transistor Q4 may be transistors or field effect transistors, the control end is connected to the control module, the third transistor Q3 and the fourth transistor Q4 adjust their states according to the control signal output by the control module, so as to realize the equalization between the two unit batteries CE in the battery pair 202 corresponding to the unit battery equalization circuit, and the third transistor Q3 and the fourth transistor Q4 may be N-type MOS transistors, and the control signal output by the control module to the third transistor Q3 and the fourth transistor Q4 may be PWM signals.

With continued reference to fig. 4, the multi-battery balancing circuit includes a fifth transistor Q5, a sixth transistor Q6, and a second inductor L2, where the fifth transistor Q5 and the sixth transistor Q6 are connected in series between two ends of the corresponding battery string 302, and a connection point of the fifth transistor Q5 and the sixth transistor Q6 is connected to a first end of the second inductor L2, and a connection point of two battery pairs 202 in the battery string 302 is connected to a second end of the second inductor L2. The fifth transistor Q5 and the sixth transistor Q6 may be transistors or field effect transistors, the control end is connected with the control module, the fifth transistor Q5 and the sixth transistor Q6 adjust their states according to control signals output by the control module, so as to realize equalization between two battery pairs in the battery string corresponding to the multi-battery equalization circuit, and in an exemplary embodiment, the fifth transistor Q5 and the sixth transistor Q6 may be N-type MOS transistors, and control signals output by the control module to the fifth transistor Q5 and the sixth transistor Q6 may be PWM signals.

The collection module collects terminal voltages of all the single batteries and uploads the terminal voltages to the control module, and the control module can calculate average voltages of all the single batteries in the battery module according to the terminal voltages, so that the relative relation between the single voltages and a single preset range is compared, wherein the single preset range of the battery module is related to the average voltages of all the single batteries in the battery module. Under the condition that a certain single battery is not in a preset range, the control module can send out a PWM control signal, and a single battery equalization circuit corresponding to the battery pair where the single battery is positioned is started, so that equalization between two batteries in the battery pair is realized. In addition, under the condition that a certain single battery is not in a preset range, the control module can also send out a PWM control signal, and a multi-battery equalization circuit corresponding to the battery string where the single battery is positioned is started, so that equalization between two battery pairs in the battery string is realized.

In the battery equalization circuit of mixed layering provided by the embodiment, the single cell equalizer comprises single cell equalization circuits corresponding to battery pairs one by one, the single cell equalization circuits can equalize two single cells in the battery pairs, the single cell equalizer further comprises multi-cell equalization circuits corresponding to battery strings one by one, the multi-cell equalization circuits are used for equalizing two battery pairs in the battery strings, equalization among single cells in a battery module and equalization among battery pairs in the battery module are achieved, finer equalization of single cells and battery pairs can be achieved on the basis of equalization of the battery modules through arrangement of the multi-cell equalization circuits and the single cell circuits in the battery module, and users can set or select different equalization modes according to needs, so that the equalization effect of the batteries is further improved.

Optionally, fig. 5 is a schematic circuit diagram of a battery equalization circuit with mixed layering according to an embodiment of the present utility model, and referring to fig. 5, m=4 and n=4 are based on the foregoing embodiment. The number of single-cell equalization circuits in a single cell module block is 2, and the number of multi-cell equalization circuits is 1.

As an example, fig. 6 is a schematic circuit diagram of different states of balancing a first battery module according to an embodiment of the present utility model, referring to fig. 6, when a terminal voltage of the first battery module M1 is not within a preset range, a control module may control a first controllable switch k1 and a second controllable switch k2 corresponding to the first battery module M1 to be turned on, and control a second controllable switch k4 corresponding to a last battery module of a battery module formed by connecting four battery modules in series to be turned on, so that rapid balancing of the first battery module M1 may be achieved by adjusting PWM control signals output to the first transistor and the second transistor. In fig. 6 the transistor where the crosses are, is turned off and the arrow indicates the current direction.

Fig. 7 is a schematic circuit diagram of different states for equalizing single batteries in a battery pair according to the present utility model, and referring to fig. 7, when the terminal voltage of a single battery CE is not within a preset single range, the control module may control the single battery equalization circuit corresponding to the battery pair 202 where the single battery CE is located to equalize the single batteries. By adjusting the PWM control signals output to the third transistor and the fourth transistor, a fast equalization of the battery cells in the battery pair can be achieved. In fig. 7 the transistor where the crosses are located is turned off and the arrow indicates the current direction.

Fig. 8 is a schematic circuit diagram of different states for balancing battery pairs in a battery string, and referring to fig. 8, when a terminal voltage of a single battery is not within a preset range of the single battery, a control module may control a multi-battery balancing circuit corresponding to the battery string where the single battery is located to balance the battery pair where the single battery is located. By adjusting the PWM control signals output to the fifth transistor and the sixth transistor, rapid equalization of the battery pairs in the battery string can be achieved. In fig. 8, the cell balancing circuit corresponding to the battery is omitted, the transistor where the fork is located is turned off, and the arrow indicates the current direction.

Note that the above is only a preferred embodiment of the present utility model and the technical principle applied. It will be understood by those skilled in the art that the present utility model is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements, combinations, and substitutions can be made by those skilled in the art without departing from the scope of the utility model. Therefore, while the utility model has been described in connection with the above embodiments, the utility model is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the utility model, which is set forth in the following claims.

Claims

1. A hybrid layered battery equalization circuit, comprising: the device comprises m battery modules, an acquisition module, a switch gating network, an LCC resonance circuit, a half-bridge rectification circuit, a full-wave rectification circuit, a transformer and a control module which are connected in series;

2. The hybrid layered battery equalization circuit of claim 1, wherein said switch-gating network comprises: the battery module comprises a battery module, a full-wave rectifying circuit and a battery module, wherein the battery module comprises a first controllable switch corresponding to the battery module one by one and a second controllable switch corresponding to the battery module one by one, the positive electrode of the battery module is connected with the full-wave rectifying circuit through the corresponding first controllable switch, and the negative electrode of the battery module is connected with the full-wave rectifying circuit through the corresponding second controllable switch.

3. The hybrid layered battery equalization circuit of claim 2, wherein the secondary side of the transformer comprises a first winding and a second winding; the second end of the first winding is connected with the first end of the second winding to serve as a middle tap;

4. The hybrid layered battery equalization circuit of claim 1, wherein the LCC resonant circuit comprises a series inductance, a series capacitance, and a parallel capacitance, a first end of the series inductance being connected to the half-bridge rectifier circuit, a second end of the series inductance being connected to a first end of a primary side of the transformer via the series capacitance, the parallel capacitance being connected in parallel with the primary side.

5. The hybrid layered battery equalization circuit of claim 4, wherein said half-bridge rectifier circuit comprises a first transistor and a second transistor, the control terminals of the first transistor and the second transistor being respectively connected to said control module; the first end of the first transistor is connected with the total positive electrode of the battery module formed by connecting m battery modules in series, and the second end of the first transistor is connected with the first end of the series inductor; the first end of the series inductor is also connected with the first end of the second transistor, and the second end of the second transistor is respectively connected with the second end of the primary side and the total negative electrode of the battery module.

6. The hybrid layered battery equalization circuit of claim 5, wherein said first transistor and said second transistor are both N-type field effect transistors.

7. The hybrid layered battery equalization circuit of claim 1, wherein said cell equalizer comprises a cell equalization circuit in one-to-one correspondence with a pair of cells, wherein one of said pair of cells comprises two adjacent ones of said cells; the single cell balancing circuit is respectively connected with two poles of the two single cells in the corresponding battery pair and is used for balancing the two single cells in the battery pair.

8. The hybrid layered battery equalization circuit of claim 7, wherein said unitary equalizer further comprises a multi-battery equalization circuit in one-to-one correspondence with a battery string, wherein one said battery string comprises two adjacent said battery pairs; the multi-battery balancing circuit is respectively connected with two poles of two battery pairs corresponding to the battery strings, and is used for balancing the two battery pairs in the battery strings.

9. The hybrid layered battery equalization circuit of claim 8, wherein,

the single-cell balancing circuit comprises a third transistor, a fourth transistor and a first inductor, wherein the third transistor and the fourth transistor are connected in series between two ends of the corresponding battery pair, a connection point of the third transistor and the fourth transistor is connected with a first end of the first inductor, and a connection point of two single cells in the battery pair is connected with a second end of the first inductor;

10. The hybrid layered battery equalization circuit of claim 8, wherein n = 4, the number of single cell equalization circuits is 2, and the number of multi-cell equalization circuits is 1.