CN219419031U - Forward-mounted GaN HEMT-LED photoelectric integrated chip - Google Patents

Abstract

The utility model belongs to the technical field of semiconductor manufacturing, and discloses a forward-mounted GaNHEMT-LED photoelectric integrated chip. The chip comprises a HEMT region and an LED region, the HEMT and the LED are monolithically integrated by using MOCVD technology for secondary epitaxy, the LED structure is selected as an object of secondary epitaxial growth by virtue of the control output function of the HEMT, so that the growth quality of the HEMT epitaxial structure in the integrated chip is ensured, the generation of leakage current is reduced, and larger stable saturated current can be output under the condition of unchanged size. In addition, metal contacts are formed between the devices instead of non-metal contacts, and the current is further diffused although additional connection resistance is added. Compared with the prior art, the optical output power of the chip is improved by 10 percent and the maximum output current is improved by 20 percent under the condition that the size of the chip is unchanged and the grid voltage is the same.

Description

Forward-mounted GaN HEMT-LED photoelectric integrated chip

Technical Field

The utility model relates to the technical field of semiconductor manufacturing, in particular to a positive-loading GaN HEMT-LED photoelectric integrated chip.

Background

The power device prepared from the GaN material has higher power density output and higher energy conversion efficiency, so that the system is miniaturized and light, and the volume and weight of a power electronic device are effectively reduced. Currently, third-generation semiconductor material GaN is widely applied to important devices such as high mobility transistors (HEMTs), light Emitting Diodes (LEDs) and the like. The HEMT device is prepared according to the principle that 2DEG is generated by polarization effect between GaN/AlGaN, and can have higher stable current output density on the premise of small size. The GaNLED is prepared according to the principle of photon generation by electron hole pair recombination, and has the advantages of long service life, small power consumption and the like compared with the traditional light-emitting device. According to the current characteristics of the LED, a constant current driving power supply is generally used for driving, stable luminous efficiency is kept, and the high-frequency and output current capability of the GaN/AlGaN HEMT device is utilized to be used as a transistor for driving the LED. The monolithic integration of the LED and HEMT is of great advantage since both devices share the same GaN-based material platform. Parasitic resistance and capacitance due to wire bonding can be greatly reduced, thereby improving power efficiency of the driving circuit. The on-chip AlGaN/GaN HEMT driver is utilized to replace an external system component, so that the packaging can be reduced, the reliability of an LED system is improved, the long-life advantage of a GaNLED chip is fully utilized, and the overall dimension and the manufacturing cost of the LED lighting system can be reduced.

At present, two methods for GaN HEMT-LED monolithic integration are mainly used at the chip level. 1. And selectively etching, wherein the LED structure is grown on the sapphire substrate through MOCVD, and then the AlGaN/GaN HEMT structure is directly grown on the surface of the AlGaN barrier layer. And etching part of the HEMT region by ICP etching to expose the upper surface of the LED, and finally, respectively carrying out chip structure design on the HEMT and the LED. The contact part between the two devices is completely etched by ICP, etched to a sapphire substrate, and deposited with a certain thickness of SiO ₂ Performing device isolation, and finallyAnd (3) metal is evaporated, and the drain electrode of the HEMT device and the LED cathode are connected together. 2. Selective epitaxy, like selective etching, is started, the LED structure grows on the sapphire substrate through MOCVD, then the epitaxial wafer is taken out of the chamber, and SiO is deposited on the surface of the epitaxial wafer ₂ And (5) the mask layer and the BOE etching are subjected to patterning treatment. And after the process is finished, the epitaxial wafer is subjected to secondary epitaxial growth of the AlGaN/GaN HEMT structure through MOCVD, and the structural design of the rear chip is the same as the route of the selective etching technology.

The whole epitaxial structure can be completely grown at one time by selective etching, so that the complex repeated epitaxial growth process is avoided, the crystal growth quality is good, and the performance of a later chip is more stable. However, since ICP etching (inductively coupled plasma etching technology) is used, the principle is that plasma bombards the surface material, the etching depth and flatness are difficult to control precisely, and the LEDp-GaN layer is seriously damaged. The selective epitaxy requires MOCVD epitaxy of the epitaxial wafer in two steps, and SiO is present during the second epitaxy ₂ The existence of the mask layer is close to the edge of the mask layer, the HEMT structure has peak generation, the crystal structure quality is poor, and the output current is reduced. Both technical routes have respective advantages and disadvantages, and the selective epitaxy is more operable in terms of feasibility and more advantageous in the post-optimization process.

Therefore, developing an integrated chip with a simple manufacturing process and excellent conductivity becomes a problem to be solved in the art.

Disclosure of Invention

The utility model aims to provide a forward-mounted GaN HEMT-LED photoelectric integrated chip, which solves the problems of poor growth quality of HEMT epitaxial structure, large source-drain ohmic contact resistance, reduced HEMT control capability caused by reduced output current and the like in secondary epitaxy in the existing photoelectric integrated chip synthesis method.

In order to achieve the above object, the present utility model provides the following technical solutions:

the utility model provides a forward-mounted GaN HEMT-LED photoelectric integrated chip, which comprises an HEMT region and an LED region;

the HEMT region sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, a passivation layer and a metal electrode layer from bottom to top; the metal electrode layer of the HEMT region comprises a source electrode, a drain electrode and a gate electrode;

the LED area sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, an n-GaN layer, an InGaN/GaN multiple quantum well layer, a p-GaN layer and an SiO from bottom to top ₂ The ITO current diffusion layer is arranged on the passivation layer; the metal electrode layer of the LED area comprises a cathode and an anode;

the source of the HEMT region is connected to the anode of the LED region.

Preferably, in the above-mentioned forward-mounted GaN HEMT-LED optoelectronic integrated chip, the AlN/AlGaN buffer layers of the HEMT region and the LED region are in contact with the sapphire substrate, and the thicknesses of the AlN/AlGaN buffer layers of the HEMT region and the LED region are independently 15nm/15nm.

Preferably, in the above-mentioned positive-loading GaN HEMT-LED optoelectronic integrated chip, the u-GaN layers of the HEMT region and the LED region are independently unintentionally doped GaN layers, and the thickness is independently 1.5-1.7 μm.

Preferably, in the above-mentioned forward-mounted GaN HEMT-LED optoelectronic integrated chip, the GaN channel layers of the HEMT region and the LED region are independently unintentionally doped GaN layers, and the thicknesses thereof are independently 250-350 nm.

Preferably, in the above-mentioned positive GaN HEMT-LED optoelectronic integrated chip, the thickness of the AlN insertion layer in the HEMT region and the LED region is independently 1 to 1.5nm; the doping concentration of Al in the AlGaN barrier layers of the HEMT region and the LED region is independently 0.2-0.3; the thickness of the AlGaN barrier layer of the HEMT region and the LED region is independently 15-30 nm.

Preferably, in the above-mentioned forward-mounted GaN HEMT-LED optoelectronic integrated chip, the n-GaN layer of the LED region is a Si-doped GaN layer having a thickness of 1-3 μm and a doping concentration of Si of 2.2X10 ¹⁹ The method comprises the steps of carrying out a first treatment on the surface of the The InGaN/GaN multiple quantum well layer of the LED area is a periodically overlapped InGaN/GaN layer, and the thickness of the InGaN/GaN multiple quantum well layer is 70-80 nm.

Preferably, in the above-mentioned forward GaN HEMT-LED optoelectronic integrated chip, the p-GaN layer of the LED region is a Mg-doped GaN layer, the thickness is 500-600 nm, and the doping concentration of Mg is 1.5X10 ¹⁹ 。

Preferably, in the above-mentioned positive GaN HEMT-LED optoelectronic integrated chip, the source electrode and the drain electrode of the HEMT region and the cathode and the anode of the LED region are all ohmic contacts, the source electrode and the drain electrode are an alloy composed of Ti, al, ni, au, and the cathode and the anode are an alloy composed of Cr, al, ti, pt, au; the gate electrode of the HEMT region is a Schottky contact electrode, and the gate electrode is an alloy composed of Ni and Au.

Compared with the prior art, the utility model has the following beneficial effects:

according to the utility model, the MOCVD technology is used for carrying out secondary epitaxy to integrate the HEMT and the LED on a single chip, so that the problem of ion damage caused by difficulty in controlling ICP etching precision in a selective etching method is solved. The photoelectric integrated chip selects the LED structure as an object of secondary epitaxial growth by virtue of the HEMT control output function, so that the growth quality of the HEMT epitaxial structure in the integrated chip is ensured, the generation of leakage current is reduced, and larger stable saturation current can be output under the condition of unchanged size. In addition, metal contacts are formed between the devices instead of non-metal contacts, and the current is further diffused although additional connection resistance is added. Compared with the prior art, the optical output power of the chip is improved by 10 percent and the maximum output current is improved by 20 percent under the condition that the size of the chip is unchanged and the grid voltage is the same.

Drawings

In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below.

Fig. 1 is a schematic structural diagram of a front-loading GaN HEMT-LED optoelectronic integrated chip of embodiment 1;

wherein, 1-sapphire substrate; 2-AlN/AlGaN buffer layer; a 3-u-GaN layer; a 4-GaN channel layer; 5-an AlN insertion layer; 6-AlGaN barrier layer; 7-n-GaN layerThe method comprises the steps of carrying out a first treatment on the surface of the 8-InGaN/GaN multiple quantum well layer; 9-p-GaN layer; 10-an ITO current diffusion layer; 11-a passivation layer; 12-SiO ₂ A current blocking layer; 13-ohmic contact electrode; 14-isolating layer; 15-schottky contact electrode;

fig. 2 is a top view structural diagram of a front-mounted GaN HEMT-LED optoelectronic integrated chip of embodiment 1;

fig. 3 is a structural diagram of secondary epitaxy of the positive GaN HEMT-LED optoelectronic integrated chip of example 1;

fig. 4 is a diagram showing the structure of ohmic contact electrode and schottky contact electrode on the epitaxial structure of the positive GaN HEMT-LED optoelectronic integrated chip of example 1.

Detailed Description

The utility model provides a forward-mounted GaN HEMT-LED photoelectric integrated chip, which comprises an HEMT region and an LED region;

the HEMT region sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, a passivation layer and a metal electrode layer from bottom to top; the metal electrode layer of the HEMT region comprises a source electrode, a drain electrode and a gate electrode;

the LED area sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, an n-GaN layer, an InGaN/GaN multiple quantum well layer, a p-GaN layer and an SiO from bottom to top ₂ The ITO current diffusion layer is arranged on the passivation layer; the metal electrode layer of the LED area comprises a cathode and an anode;

the source of the HEMT region is connected to the anode of the LED region.

In the utility model, the AlN/AlGaN buffer layers of the HEMT region and the LED region are in contact with the sapphire substrate, and the thicknesses of the AlN/AlGaN buffer layers of the HEMT region and the LED region are independently preferably 15nm/15nm.

In the present utility model, the u-GaN layer of the HEMT region and the LED region are independently preferably unintentionally doped GaN layers, and the thickness is independently preferably 1.5 to 1.7 μm, and more preferably 1.6 μm.

In the present utility model, the GaN channel layers of the HEMT region and the LED region are independently preferably unintentionally doped GaN layers, and the thickness is independently preferably 250 to 350nm, more preferably 300 to 340nm, and even more preferably 310nm.

In the present utility model, the thickness of the AlN insert layer in the HEMT region and the LED region is independently preferably 1 to 1.5nm, more preferably 1.1 to 1.4nm, and still more preferably 1.3nm; the doping concentration of Al in the AlGaN barrier layer in the HEMT region and the LED region is independently preferably 0.2 to 0.3, more preferably 0.22 to 0.27, and even more preferably 0.25; the thickness of the AlGaN barrier layer in the HEMT region and the LED region is independently preferably 15 to 30nm, more preferably 19 to 26nm, and even more preferably 22nm.

In the present utility model, the n-GaN layer of the LED region is preferably a Si-doped GaN layer having a thickness of preferably 1 to 3 μm, more preferably 1.2 to 2.7 μm, still more preferably 1.8 μm, and a doping concentration of Si of preferably 2.2X10 ¹⁹ The method comprises the steps of carrying out a first treatment on the surface of the The InGaN/GaN multiple quantum well layer of the LED region is preferably a periodically overlapped InGaN/GaN layer, and the thickness is preferably 70 to 80nm, more preferably 72 to 78nm, and even more preferably 75nm.

In the present utility model, the p-GaN layer of the LED region is preferably a Mg-doped GaN layer having a thickness of preferably 500 to 600nm, more preferably 510 to 570nm, still more preferably 530nm, and a doping concentration of Mg of preferably 1.5X10 ¹⁹ 。

In the utility model, the source electrode and the drain electrode of the HEMT region and the cathode and the anode of the LED region are all preferably ohmic contacts, the source electrode and the drain electrode are made of an alloy consisting of Ti, al, ni, au, and the cathode and the anode are made of an alloy consisting of Cr, al, ti, pt, au; the gate electrode of the HEMT region is preferably a Schottky contact electrode, and the gate electrode is an alloy consisting of Ni and Au.

The utility model also provides a preparation method of the positive-loading GaN HEMT-LED photoelectric integrated chip, which comprises the following steps:

s1: cleaning sapphire (Al) ₂ O ₃ ) Substrate, HEMT epitaxial structure grown using MOCVD, deposited SiO ₂ Etching the mask layer and the BOE to form a pattern, performing secondary epitaxial growth of the LED epitaxial structure, and then removing SiO ₂ A mask layer for forming an HEMT-LED epitaxial structure; the HEMT junctionThe structure comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, a passivation layer and a metal electrode layer from bottom to top; the LED structure comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, an n-GaN layer, an InGaN/GaN multiple quantum well layer, a p-GaN layer and an SiO from bottom to top ₂ The ITO current diffusion layer is arranged on the passivation layer;

s2: cleaning, photoetching, developing and deep ICP etching are sequentially carried out on the HEMT-LED epitaxial structure, and an HEMT-LED electric isolation region is formed in the HEMT region and the LED region;

s3: deposition of SiO by PECVD on the anode surface of LED regions ₂ Formation of SiO ₂ The current blocking layer is etched and developed by a wet method to remove redundant parts;

s4: carrying out ITO evaporation on the LED area, covering the whole p-GaN surface, and annealing to improve the crystallinity of the ITO film;

s5: deposition of SiO with certain thickness in HEMT-LED electric isolation region ₂ Forming a platform for electrode connection;

s6: photoetching, developing and ICP etching are carried out on the HEMT region, a source electrode and a drain electrode are prepared, a cathode and an anode are prepared in the LED region, and the source electrode and the anode are connected through metal evaporation;

s7: preparation of a gate electrode on the HEMT region followed by deposition of SiO by PECVD ₂ Passivating to form a passivation layer, and perforating the electrode to obtain an HEMT-LED epitaxial wafer;

s8: and grinding and polishing the sapphire substrate, thinning the epitaxial wafer, and then laser scribing to form single integrated chip grains.

In the utility model, in the step S1, after the HEMT epitaxial structure is grown by MOCVD, siO with the thickness of 40nm is deposited by PECVD ₂ A mask layer, wherein an adhesion promoter is used on the surface of the mask layer; then spin coating, photoetching and developing are carried out, HF and NH are used ₄ And (3) carrying out wet etching on the mixed solution with F content of 1:6 to obtain a pattern, and carrying out MOCVD again to grow the LED epitaxial structure, wherein the thickness of the LED is 2.5 mu m.

In the utility model, in the step S2, photoresist with the thickness of 10 mu m is used for photoresist homogenization, the thickness of the photoresist is 3 mu m by deep ICP etching after photoetching and developing, a sapphire substrate is exposed, and a HEMT-LED electric isolation area is formed between a HEMT area and an LED area.

In the present utility model, in the step S3, PECVD deposits 300nm thick SiO on the p-GaN surface ₂ A current blocking layer, followed by the use of an adhesion promoter; spin-coating, photolithography, developing patterns using HF and NH ₄ And (3) wet etching the mixed solution with the F content of 1:6 to remove redundant parts.

In the present utility model, in the step S4, 9/1 of In is used ₂ O ₃ /SnO ₂ ITO coating is carried out, and the thickness is 90nm; and (3) placing the epitaxial wafer into an oven, introducing nitrogen and oxygen at 510 ℃ for rapid annealing treatment, and further oxidizing excessive suboxide (such as InO and SnO) in the film coating process to improve the crystallinity of the ITO film.

In the present utility model, in the step S5, PECVD deposits a mesa of 5.5 μm thickness in the electrically isolated region, followed by adhesion promoter; spin-coating, photolithography, developing patterns using HF and NH ₄ And (3) wet etching the mixed solution with the F content of 1:6 to remove redundant parts.

In the utility model, in the step S6, negative photoresist is used for uniformly coating the surface of an epitaxial wafer, metal evaporation of HEMT source electrode and drain electrode is carried out after photoetching and developing, the electrode structure is Ti/Al/Ni/Au, and the epitaxial wafer is annealed rapidly for 1min at 800 ℃; after secondary photoresist removal, negative photoresist is used again for photoresist homogenization, metal evaporation of the cathode and the anode of the LED is carried out after photoetching and developing, and the electrode structure is Cr/Al/Ti/Pt/Au; and performing photoresist stripping for three times to evaporate Au metal to form connection between the source electrode and the cathode.

In the utility model, in the step S7, negative photoresist is used on the surface of an epitaxial wafer, HEMT grid metal evaporation is carried out after photoetching and development, and the electrode structure is Ni/Au; deposition of 90nm thick SiO by PECVD ₂ Passivation is carried out to form a passivation layer, and then an adhesion promoter is used; spin-coating, photolithography, developing patterns using HF and NH ₄ And (3) carrying out wet etching on the mixed solution with F content of 1:6 to open holes on the electrode.

In the utility model, in the step S8, the epitaxial wafer sapphire substrate is ground and polished, and the thickness is reduced to 200 mu m; and (5) laser scribing, and splitting by a splitting machine to form single integrated chip grains.

The following description of the technical solutions in the embodiments of the present utility model will be clear and complete, and it is obvious that the described embodiments are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

Example 1

The embodiment provides a forward-mounted GaN HEMT-LED photoelectric integrated chip, the structure of which is shown in figures 1-4, the forward-mounted GaN HEMT-LED photoelectric integrated chip comprises an HEMT region and an LED region, wherein the HEMT region sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN inserting layer, an AlGaN barrier layer, a passivation layer and a metal electrode layer from bottom to top; the metal electrode layer of the HEMT region comprises a source electrode, a drain electrode and a gate electrode;

the LED area sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, an n-GaN layer, an InGaN/GaN multiple quantum well layer, a p-GaN layer and an SiO from bottom to top ₂ The ITO current diffusion layer is arranged on the passivation layer; the metal electrode layer of the LED area comprises a cathode and an anode;

the source electrode of the HEMT region is connected with the anode of the LED region so as to realize the electrical conduction between the HEMT region and the LED region.

The preparation of the positive GaN HEMT-LED photoelectric integrated chip comprises the following steps:

(1) Cleaning a sapphire substrate, and growing an HEMT epitaxial structure by using MOCVD, wherein the HEMT epitaxial structure sequentially comprises an AlN/AlGaN buffer layer with the thickness of 15nm/15nm, a u-GaN layer with the thickness of 1.5 mu m, a GaN channel layer with the thickness of 300nm, an AlN inserting layer with the thickness of 1nm and an AlGaN barrier layer with the thickness of 20nm (Al component is 0.2);

(2) PECVD deposition of SiO 40nm thick ₂ A mask layer, wherein the surface of the mask layer is smeared with tackifier, and the mixture is evenly distributedGlue, photoetching and developing, and forming a stripe pattern on the surface of the whole epitaxial wafer; the MOCVD secondary growth LED epitaxial structure is used again, and the LED epitaxial structure sequentially comprises 1.5 μm n-GaN layers (the doping concentration of Si is 2.2X10) ¹⁹ ) The method comprises the steps of carrying out a first treatment on the surface of the An InGaN/GaN multi-quantum well layer of 75nm (cycle number 5); 500nm p-GaN layer (doping concentration of Mg is 1.5X10) ¹⁹ )；

(3) Using HF and NH ₄ Wet etching the mask layer by using mixed solution with F content of 1:6, uniformly etching positive photoresist with thickness of 10 mu m, photoetching and developing, and deep ICP etching with thickness of 3 mu m to expose the sapphire substrate, wherein an HEMT-LED electric isolation region is formed between the HEMT and the LED;

(4) Spin coating, photoetching and developing, and etching the p-GaN layer and the InGaN/GaN multiple quantum well layer by ICP to expose the n-GaN layer;

(5) PECVD (plasma enhanced chemical vapor deposition) of SiO (silicon dioxide) with thickness of 300nm on p-GaN surface ₂ A current blocking layer, followed by the use of an adhesion promoter; spin-coating, photolithography, developing patterns using HF and NH ₄ Wet etching to remove redundant parts by using mixed liquid with F content of 1:6;

(6) The electron beam evaporation technology is used for evaporating a current diffusion layer with the thickness of 90nm on the surface of the current blocking layer, so that the luminous intensity of the LED device is increased, and In ₂ O ₃ /SnO ₂ The ratio of the polymer is different, and the polymer is corresponding to different conductivity and light transmittance, and is mainly 9/1 in the process; placing the wafer into an oven, introducing N at 510 deg.C ₂ And O ₂ Rapid annealing treatment with a flow rate ratio of 4 x 4 ¹⁰ :1, a step of; in the film coating process, excessive lower oxides such as InO, snO and the like are further oxidized, so that the crystallinity of the ITO film is improved;

(7) Spin coating, photoetching and developing, and putting the wafer into HCl/FeCl with the ratio of 1:1 ₃ Wet etching to remove partial ITO current diffusion layer, and cleaning with clear water;

(8) PECVD deposition of SiO 5.5 μm thick in electrically isolated regions ₂ A platform, followed by a tackifier; spin-coating, photolithography, developing patterns using HF and NH ₄ Wet etching to remove redundant parts by using mixed liquid with F content of 1:6;

(9) Carrying out metal evaporation on a source electrode and a drain electrode of the HEMT after photoetching and developing by using negative photoresist with the thickness of 3 mu m on the surface of an epitaxial wafer, wherein the electrode structure is Ti (25A)/Al (700A)/Ni (200A)/Au (10000A), and rapidly annealing for 1min at the temperature of 800 ℃, and tearing gold from a blue film; after photoresist removal, negative photoresist is used again for photoresist homogenization, metal evaporation of the cathode and the anode of the LED is carried out after photoetching and developing, the electrode structure is Cr (25A)/Al (700A)/Ti (500A)/Pt (700A)/Au (10000A), and the blue film is torn; performing photoresist stripping for three times to evaporate Au (10000A) metal to form connection between the source electrode and the cathode electrode, and tearing gold by the blue film;

(10) Deposition of 90nm thick SiO by PECVD ₂ Passivation is carried out to form a passivation layer, and then an adhesion promoter is used; spin-coating, photolithography, developing patterns using HF and NH ₄ Carrying out wet etching on the mixed solution with F content of 1:6 to open holes on the electrode;

(11) Thinning the epitaxial wafer sapphire substrate, and grinding and roughly polishing the sapphire substrate with the thickness of 400 mu m; polishing 100 μm and thinning to 200 μm; and (5) laser scribing, and splitting by a splitting machine to form single integrated chip grains.

Example 2

The embodiment provides a forward-mounted GaN HEMT-LED photoelectric integrated chip, which comprises an HEMT region and an LED region, wherein the HEMT region sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, a passivation layer and a metal electrode layer from bottom to top; the metal electrode layer of the HEMT region comprises a source electrode, a drain electrode and a gate electrode;

the LED area sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, an n-GaN layer, an InGaN/GaN multiple quantum well layer, a p-GaN layer and an SiO from bottom to top ₂ The ITO current diffusion layer is arranged on the passivation layer; the metal electrode layer of the LED area comprises a cathode and an anode;

the source electrode of the HEMT region is connected with the anode of the LED region so as to realize the electrical conduction between the HEMT region and the LED region.

The preparation of the positive GaN HEMT-LED photoelectric integrated chip comprises the following steps:

(1) Cleaning a sapphire substrate, and growing an HEMT epitaxial structure by using MOCVD, wherein the HEMT epitaxial structure sequentially comprises an AlN/AlGaN buffer layer with the thickness of 15nm/15nm, a u-GaN layer with the thickness of 1.6 mu m, a GaN channel layer with the thickness of 320nm, an AlN inserting layer with the thickness of 1.3nm and an AlGaN barrier layer with the thickness of 25nm (Al component is 0.25);

(2) PECVD deposition of SiO 40nm thick ₂ The mask layer is coated with a tackifier on the surface of the mask layer, and the whole epitaxial wafer surface is subjected to photoresist homogenizing, photoetching and developing to form a striped pattern; the MOCVD secondary growth LED epitaxial structure is used again, and the LED epitaxial structure sequentially comprises 2 mu m n-GaN layers (the doping concentration of Si is 2.2X10) ¹⁹ ) The method comprises the steps of carrying out a first treatment on the surface of the An InGaN/GaN multi-quantum well layer of 78nm (cycle number 5); 550nm p-GaN layer (doping concentration of Mg is 1.5X10) ¹⁹ )；

(3) Using HF and NH ₄ Wet etching the mask layer by using mixed solution with F content of 1:6, uniformly etching positive photoresist with thickness of 10 mu m, photoetching and developing, and deep ICP etching with thickness of 3 mu m to expose the sapphire substrate, wherein an HEMT-LED electric isolation region is formed between the HEMT and the LED;

(4) Spin coating, photoetching and developing, and etching the p-GaN layer and the InGaN/GaN multiple quantum well layer by ICP to expose the n-GaN layer;

(5) PECVD (plasma enhanced chemical vapor deposition) of SiO (silicon dioxide) with thickness of 300nm on p-GaN surface ₂ A current blocking layer, followed by the use of an adhesion promoter; spin-coating, photolithography, developing patterns using HF and NH ₄ Wet etching to remove redundant parts by using mixed liquid with F content of 1:6;

(6) The electron beam evaporation technology is used for evaporating a current diffusion layer with the thickness of 90nm on the surface of the current blocking layer, so that the luminous intensity of the LED device is increased, and In ₂ O ₃ /SnO ₂ The ratio of the polymer is different, and the polymer is corresponding to different conductivity and light transmittance, and is mainly 9/1 in the process; placing the wafer into an oven, introducing N at 510 deg.C ₂ And O ₂ Rapid annealing treatment with a flow rate ratio of 4 x 4 ¹⁰ :1, a step of; in the film coating process, excessive lower oxides such as InO, snO and the like are further oxidized, so that the crystallinity of the ITO film is improved;

(7) Spin coating, photoetching and developing, and putting the wafer into HCl/FeCl with the ratio of 1:1 ₃ Wet etching to remove partial ITO current diffusion layer, and cleaning with clear water;

(8) PECVD deposition of SiO 5.5 μm thick in electrically isolated regions ₂ A platform, followed by a tackifier; spin-coating, photolithography, developing patterns using HF and NH ₄ Wet etching to remove redundant parts by using mixed liquid with F content of 1:6;

(9) Carrying out metal evaporation on a source electrode and a drain electrode of the HEMT after photoetching and developing by using negative photoresist with the thickness of 3 mu m on the surface of an epitaxial wafer, wherein the electrode structure is Ti (25A)/Al (700A)/Ni (200A)/Au (10000A), and rapidly annealing for 1min at the temperature of 800 ℃, and tearing gold from a blue film; after photoresist removal, negative photoresist is used again for photoresist homogenization, metal evaporation of the cathode and the anode of the LED is carried out after photoetching and developing, the electrode structure is Cr (25A)/Al (700A)/Ti (500A)/Pt (700A)/Au (10000A), and the blue film is torn; performing photoresist stripping for three times to evaporate Au (10000A) metal to form connection between the source electrode and the cathode electrode, and tearing gold by the blue film;

(10) Deposition of 90nm thick SiO by PECVD ₂ Passivation is carried out to form a passivation layer, and then an adhesion promoter is used; spin-coating, photolithography, developing patterns using HF and NH ₄ Carrying out wet etching on the mixed solution with F content of 1:6 to open holes on the electrode;

(11) Thinning the epitaxial wafer sapphire substrate, and grinding and roughly polishing the sapphire substrate with the thickness of 400 mu m; polishing 100 μm and thinning to 200 μm; and (5) laser scribing, and splitting by a splitting machine to form single integrated chip grains.

Example 3

The embodiment provides a forward-mounted GaN HEMT-LED photoelectric integrated chip, which comprises an HEMT region and an LED region, wherein the HEMT region sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, a passivation layer and a metal electrode layer from bottom to top; the metal electrode layer of the HEMT region comprises a source electrode, a drain electrode and a gate electrode;

the LED area sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, an n-GaN layer, an InGaN/GaN multiple quantum well layer, a p-GaN layer and an SiO from bottom to top ₂ The ITO current diffusion layer is arranged on the passivation layer; metal electrode layer package of LED regionIncludes a cathode and an anode;

the source electrode of the HEMT region is connected with the anode of the LED region so as to realize the electrical conduction between the HEMT region and the LED region.

The preparation of the positive GaN HEMT-LED photoelectric integrated chip comprises the following steps:

(1) Cleaning a sapphire substrate, and growing an HEMT epitaxial structure by using MOCVD, wherein the HEMT epitaxial structure sequentially comprises an AlN/AlGaN buffer layer with the thickness of 15nm/15nm, a u-GaN layer with the thickness of 1.7 mu m, a GaN channel layer with the thickness of 350nm, an AlN inserting layer with the thickness of 1.5nm and an AlGaN barrier layer with the thickness of 30nm (Al component is 0.3);

(2) PECVD deposition of SiO 40nm thick ₂ The mask layer is coated with a tackifier on the surface of the mask layer, and the whole epitaxial wafer surface is subjected to photoresist homogenizing, photoetching and developing to form a striped pattern; the LED epitaxial structure is secondarily grown by using MOCVD, and comprises 3 mu m n-GaN layers (the doping concentration of Si is 2.2X10) ¹⁹ ) The method comprises the steps of carrying out a first treatment on the surface of the An 80nm InGaN/GaN multiple quantum well layer (cycle number 5); 600nm p-GaN layer (doping concentration of Mg 1.5X10) ¹⁹ )；

(3) Using HF and NH ₄ Wet etching the mask layer by using mixed solution with F content of 1:6, uniformly etching positive photoresist with thickness of 10 mu m, photoetching and developing, and deep ICP etching with thickness of 3 mu m to expose the sapphire substrate, wherein an HEMT-LED electric isolation region is formed between the HEMT and the LED;

(4) Spin coating, photoetching and developing, and etching the p-GaN layer and the InGaN/GaN multiple quantum well layer by ICP to expose the n-GaN layer;

(5) PECVD (plasma enhanced chemical vapor deposition) of SiO (silicon dioxide) with thickness of 300nm on p-GaN surface ₂ A current blocking layer, followed by the use of an adhesion promoter; spin-coating, photolithography, developing patterns using HF and NH ₄ Wet etching to remove redundant parts by using mixed liquid with F content of 1:6;

(6) The electron beam evaporation technology is used for evaporating a current diffusion layer with the thickness of 90nm on the surface of the current blocking layer, so that the luminous intensity of the LED device is increased, and In ₂ O ₃ /SnO ₂ The ratio of the polymer is different, and the polymer is corresponding to different conductivity and light transmittance, and is mainly 9/1 in the process; placing the wafer into an oven, introducing N at 510 deg.C ₂ And O ₂ Rapid annealing pointAnd the flow rate ratio is 4 multiplied by 4 ¹⁰ :1, a step of; in the film coating process, excessive lower oxides such as InO, snO and the like are further oxidized, so that the crystallinity of the ITO film is improved;

(7) Spin coating, photoetching and developing, and putting the wafer into HCl/FeCl with the ratio of 1:1 ₃ Wet etching to remove partial ITO current diffusion layer, and cleaning with clear water;

(8) PECVD deposition of SiO 5.5 μm thick in electrically isolated regions ₂ A platform, followed by a tackifier; spin-coating, photolithography, developing patterns using HF and NH ₄ Wet etching to remove redundant parts by using mixed liquid with F content of 1:6;

(9) Carrying out metal evaporation on a source electrode and a drain electrode of the HEMT after photoetching and developing by using negative photoresist with the thickness of 3 mu m on the surface of an epitaxial wafer, wherein the electrode structure is Ti (25A)/Al (700A)/Ni (200A)/Au (10000A), and rapidly annealing for 1min at the temperature of 800 ℃, and tearing gold from a blue film; after photoresist removal, negative photoresist is used again for photoresist homogenization, metal evaporation of the cathode and the anode of the LED is carried out after photoetching and developing, the electrode structure is Cr (25A)/Al (700A)/Ti (500A)/Pt (700A)/Au (10000A), and the blue film is torn; performing photoresist stripping for three times to evaporate Au (10000A) metal to form connection between the source electrode and the cathode electrode, and tearing gold by the blue film;

(10) Deposition of 90nm thick SiO by PECVD ₂ Passivation is carried out to form a passivation layer, and then an adhesion promoter is used; spin-coating, photolithography, developing patterns using HF and NH ₄ Carrying out wet etching on the mixed solution with F content of 1:6 to open holes on the electrode;

(11) Thinning the epitaxial wafer sapphire substrate, and grinding and roughly polishing the sapphire substrate with the thickness of 400 mu m; polishing 100 μm and thinning to 200 μm; and (5) laser scribing, and splitting by a splitting machine to form single integrated chip grains.

The foregoing is merely a preferred embodiment of the present utility model and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present utility model, which are intended to be comprehended within the scope of the present utility model.

Claims (5)

1. The forward-mounted GaNHEMT-LED photoelectric integrated chip is characterized by comprising a HEMT region and an LED region;

the HEMT region sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, a passivation layer and a metal electrode layer from bottom to top; the metal electrode layer of the HEMT region comprises a source electrode, a drain electrode and a gate electrode;

the LED area sequentially comprises a sapphire substrate, an AlN/AlGaN buffer layer, a u-GaN layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer, an n-GaN layer, an InGaN/GaN multiple quantum well layer, a p-GaN layer, an SiO2 current blocking layer, an ITO current diffusion layer, a passivation layer and a metal electrode layer from bottom to top; the metal electrode layer of the LED area comprises a cathode and an anode;

the source of the HEMT region is connected to the anode of the LED region.

2. The positive mount GaNHEMT-LED optoelectronic integrated chip of claim 1, wherein the AlN/AlGaN buffer layers of the HEMT region and the LED region are in contact with the sapphire substrate, and the thickness of the AlN/AlGaN buffer layers of the HEMT region and the LED region is independently 15nm/15nm.

3. The positive-mount ganhemmt-LED optoelectronic integrated chip of claim 2, wherein the u-GaN layers of the HEMT region and the LED region are independently unintentionally doped GaN layers having a thickness of 1.5-1.7 μm.

4. A forward mounted ganhemmt-LED optoelectronic integrated chip as recited in claim 3, wherein said HEMT region and said GaN channel layer of said LED region are independently unintentionally doped GaN layers having a thickness of between 250 nm and 350nm.

5. The positive mount ganemt-LED optoelectronic integrated chip of claim 4, wherein the source and drain of the HEMT region and the cathode and anode of the LED region are both ohmic contacts, the source and drain being an alloy consisting of Ti, al, ni, au and the cathode and anode being an alloy consisting of Cr, al, ti, pt, au; the gate electrode of the HEMT region is a Schottky contact electrode, and the gate electrode is an alloy composed of Ni and Au.