CN219304709U

CN219304709U - Flyback secondary synchronous rectification active clamping circuit

Info

Publication number: CN219304709U
Application number: CN202320216219.XU
Authority: CN
Inventors: 熊以泽
Original assignee: Wuxi Tianhe Electronic Co ltd
Current assignee: Wuxi Tianhe Electronic Co ltd
Priority date: 2023-02-15
Filing date: 2023-02-15
Publication date: 2023-07-04
Anticipated expiration: 2033-02-15

Abstract

The utility model provides a flyback secondary synchronous rectification active clamp circuit which carries out output rectification by adopting an MOS tube to replace a diode, and simultaneously reduces MOS peak of synchronous rectification as much as possible by utilizing the active clamp circuit, thereby reducing power consumption and improving anti-interference capability. When the output signal is in a low level, MOS transistors Q1 and Q3 are turned on, MOS transistors Q2 and Q4 are turned off, energy is coupled from a primary winding of a transformer T1 to a secondary winding to supply power to a load, a capacitor C5 absorbs the energy, and voltage spikes born by two ends of the MOS transistor Q1 when the two ends are turned on are not too large; when the output signal is in a high level, the MOS transistors Q1 and Q3 are turned off, the MOS transistors Q2 and Q4 are turned on, the output can only follow current through the capacitor C5 and the diode CR1, and the energy absorbed by the capacitor C5 in the clamping circuit can be returned to the main loop through the diode CR1 again, so that part of the energy is utilized instead of being completely consumed, and the efficiency is improved.

Description

Flyback secondary synchronous rectification active clamping circuit

Technical Field

The utility model relates to the technical field of switching power supply circuits, in particular to a flyback secondary synchronous rectification active clamp circuit.

Background

Flyback transformer switching power supply, which means that when the primary winding of a transformer is excited by a direct voltage, the secondary winding of the transformer does not provide a power output to a load, but only after the excitation voltage of the primary winding of the transformer is turned off, is called flyback switching power supply.

At present, the output rectifying function of the flyback switching power supply is usually realized by adopting a Schottky diode, however, because the Schottky diode has power consumption, more energy is lost in a heat energy mode, and meanwhile, the Schottky diode has larger peak, and stronger interference to power radiation exists due to larger peak, so that the diode rectifying mode has defects for the flyback switching power supply circuit with high efficiency and low radiation requirements.

Disclosure of Invention

Aiming at the problems that the output rectifying function of the existing flyback switching power supply is realized through a diode, the power consumption is high, meanwhile, the peak of the diode is large, and the anti-interference capability is poor, the utility model provides a flyback secondary synchronous rectifying active clamping circuit which carries out output rectification by adopting a MOS tube to replace the diode, and meanwhile, the MOS peak of the synchronous rectification is reduced as much as possible by utilizing the active clamping circuit, so that the power consumption is reduced, and the anti-interference capability is improved.

The technical scheme is as follows: the utility model provides a flyback secondary synchronous rectification active clamp circuit which includes transformer T1, T2, its characterized in that: the one end of a capacitor C2 and one end of an inductor L1 are connected to the 1 pin of the transformer T1, the other end of the capacitor C2 is grounded, the other end of the inductor L1 is connected with one end of the capacitor C1 and an input voltage source VIN+, the other end of the capacitor C1 is grounded, the 2 pin of the transformer T1 is connected with the drain of a MOS transistor Q2, the source electrode of the MOS transistor Q2 is grounded, the grid electrode of the MOS transistor Q2 is connected with a PWM signal end, the 3 pin of the transformer T1 is connected with one end of the capacitor C3, one end of the capacitor C4 and an output voltage source VO+, the 4 pin of the transformer T1 is connected with the drain electrode of the MOS transistor Q1, one end of the capacitor C5 is connected with the drain electrode of the MOS transistor Q1, the source electrode of the MOS transistor Q1 is connected with the other end of the capacitor C4, the cathode of the diode CR1 is grounded, the source electrode of the MOS transistor Q3 is connected with the ground, the other end of the capacitor C5 is connected with one end of the resistor R1, one end of the resistor R2, the resistor R3 is connected with the anode of the diode CR1, the MOS transistor Q3 is connected with the other end of the MOS transistor Q2, the other end of the MOS transistor Q3 is connected with the drain electrode of the MOS transistor Q4, and the other end of the MOS transistor Q4 is connected with the drain electrode of the MOS transistor Q3 is connected with the cathode of the MOS transistor Q3, and the MOS transistor Q3 is connected with the drain electrode.

After the structure is adopted, the output end of the pulse width modulator is connected through the PWM signal end, when the output signal is in a low level, the MOS tubes Q1 and Q3 are conducted, the MOS tubes Q2 and Q4 are turned off, energy is coupled from the primary side winding of the transformer T1 to the secondary side winding to supply power to a load, and for the clamping part, the capacitor C5 absorbs the energy, and at the moment, voltage peaks born by the two ends of the MOS tube Q1 when the MOS tubes Q1 are conducted cannot be too large;

when the output signal is in a high level, the MOS transistors Q1 and Q3 are turned off, the MOS transistors Q2 and Q4 are turned on, the output can only follow current through the capacitor C5 and the diode CR1, and the energy absorbed by the capacitor C5 in the clamping circuit can be returned to the main loop through the diode CR1 again, so that part of the energy is utilized instead of being completely consumed, and the efficiency is improved.

Drawings

Fig. 1 is a schematic diagram of the overall structure of the present utility model.

Detailed Description

As shown in fig. 1, a flyback secondary synchronous rectification active clamp circuit comprises transformers T1 and T2, wherein a 1 pin of the transformer T1 is connected with one end of a capacitor C2 and one end of an inductor L1, the other end of the capacitor C2 is grounded, the other end of the inductor L1 is connected with one end of the capacitor C1 and one end of an input voltage source vin+, the other end of the capacitor C1 is grounded, a 2 pin of the transformer T1 is connected with a drain electrode of a MOS transistor Q2, a source electrode of the MOS transistor Q2 is grounded, a gate electrode of the MOS transistor Q2 is connected with a PWM signal end, a 3 pin of the transformer T1 is connected with one end of the capacitor C3, one end of the capacitor C4 and an output voltage source vo+, a 4 pin of the transformer T1 is connected with a drain electrode of the MOS transistor Q1, one end of the capacitor C5, a source electrode of the MOS transistor Q1 is connected with the other end of the capacitor C3, the other end of the capacitor C4 is grounded, a cathode of the diode CR1 is grounded, a source electrode of the MOS transistor Q3 is connected with one end of the resistor C5, one end of the resistor R2 is connected with one end of the resistor R3, one end of the resistor R3 is connected with a positive electrode of the diode CR1, the other end of the resistor R2 is grounded, the other end of the resistor R2 is connected with the resistor Q3 is connected with the other end of the resistor Q3, and one end of the other end of the resistor is connected with the other end of the resistor Q3 is connected with the capacitor C4, and the other end of the capacitor is connected with the other end of the capacitor 2, and the capacitor is connected with the capacitor 2 and the capacitor is connected with the capacitor.

The working principle of the utility model is as follows:

PWM signal ends of a MOS tube Q2 and a resistor R6 of the utility model are respectively connected with output pins of a control chip (pulse width modulator). When the output signal of the pulse width modulator is at a high level, the MOS tube Q2 is conducted, the primary winding of the transformer T1 stores energy, the MOS tube Q4 is conducted, the winding of the transformer T2 is grounded at a low level, the synchronous PWM signal and the clamping PWM signal are at a low level, the MOS tube Q1 is turned off, the MOS tube Q3 is turned off (the synchronous PWM signal and the clamping PWM signal respectively control the states of the MOS tubes Q1 and Q3, and the two signals are basically generated at the same time), and the MOS tubes Q1 and Q3 are turned off, so that the output can only freewheel through the capacitor C5 and the diode CR 1; when the output signal of the pulse width modulator is at a low level, the MOS tube Q2 is turned off, the MOS tube Q4 is turned off, the synchronous PWM signal and the clamping PWM are connected with the auxiliary voltage source VCC signal to be at a high level, so that the MOS tubes Q1 and Q3 are turned on, and energy is coupled from the primary side winding to the secondary side winding of the transformer T1 to supply power to a load.

For the clamping part, when the MOS tube Q3 is conducted, the circuit is conducted through the capacitor C5, the parallel resistors (R1, R2 and R3) and the MOS tube Q1, the capacitor C5 absorbs energy, and voltage spikes born by two ends of the MOS tube Q1 when the MOS tube Q1 is conducted are not too large. After voltage spikes at two ends are reduced, in the MOS tube type selection process, a MOS tube with smaller withstand voltage value can be selected. For the MOS tube, the voltage resistance value is smaller and corresponds to smaller switching loss, so that the efficiency can be improved.

Meanwhile, after the MOS transistors Q1 and Q3 are turned off, the energy absorbed by the capacitor C5 in the clamping circuit can be returned to the main loop through the diode CR1, so that part of the energy is utilized instead of being completely consumed, and the efficiency is improved. Therefore, by controlling the type selection of the MOS tube and the reutilization of energy in the circuit, the efficiency of the module in normal operation is doubly improved. Meanwhile, the spike voltage is reduced, electromagnetic radiation signals are also reduced, and the anti-interference capability is improved.

The present utility model is not limited to the above-mentioned embodiments, and any changes or substitutions that can be easily understood by those skilled in the art within the scope of the present utility model are intended to be included in the scope of the present utility model. Therefore, the protection scope of the present utility model should be subject to the protection scope of the claims.

Claims

1. The utility model provides a flyback secondary synchronous rectification active clamp circuit which includes transformer T1, T2, its characterized in that: the one end of a capacitor C2 and one end of an inductor L1 are connected to the 1 pin of the transformer T1, the other end of the capacitor C2 is grounded, the other end of the inductor L1 is connected with one end of the capacitor C1 and an input voltage source VIN+, the other end of the capacitor C1 is grounded, the 2 pin of the transformer T1 is connected with the drain of a MOS transistor Q2, the source electrode of the MOS transistor Q2 is grounded, the grid electrode of the MOS transistor Q2 is connected with a PWM signal end, the 3 pin of the transformer T1 is connected with one end of the capacitor C3, one end of the capacitor C4 and an output voltage source VO+, the 4 pin of the transformer T1 is connected with the drain electrode of the MOS transistor Q1, one end of the capacitor C5 is connected with the drain electrode of the MOS transistor Q1, the source electrode of the MOS transistor Q1 is connected with the other end of the capacitor C4, the cathode of the diode CR1 is grounded, the source electrode of the MOS transistor Q3 is connected with the ground, the other end of the capacitor C5 is connected with one end of the resistor R1, one end of the resistor R2, the resistor R3 is connected with the anode of the diode CR1, the MOS transistor Q3 is connected with the other end of the MOS transistor Q2, the other end of the MOS transistor Q3 is connected with the drain electrode of the MOS transistor Q4, and the other end of the MOS transistor Q4 is connected with the drain electrode of the MOS transistor Q3 is connected with the cathode of the MOS transistor Q3, and the MOS transistor Q3 is connected with the drain electrode.