CN219268839U

CN219268839U - Frequency source and duplexer

Info

Publication number: CN219268839U
Application number: CN202223091753.7U
Authority: CN
Inventors: 康园园
Original assignee: Hebi Tianhai Electronic Information System Co Ltd
Current assignee: Hebi Tianhai Electronic Information System Co Ltd
Priority date: 2022-11-17
Filing date: 2022-11-17
Publication date: 2023-06-27
Anticipated expiration: 2032-11-17

Abstract

The application discloses a frequency source and a duplexer. The frequency source includes: the phase discriminator is used for accessing a clock reference signal; the filter circuit is connected with the phase detector and is used for carrying out filter processing on an output signal of the phase detector; the first oscillating circuit is connected with the filter circuit and the phase discriminator and is used for generating an oscillating signal based on the signal subjected to filtering processing and feeding the oscillating signal back to the phase discriminator, and the phase discriminator carries out synchronous processing on the oscillating signal and the clock reference signal so as to update the output signal, so that the first oscillating circuit generates a target frequency signal based on the updated output signal; the tuning circuit is connected with the first oscillating circuit and is used for generating a first compensation signal, and compensating the oscillating voltage of the first oscillating circuit by utilizing the first compensation signal so as to widen the frequency of the target frequency signal and/or perform integrated phase noise or error compensation on the first oscillating circuit. In this way, the frequency range of the frequency signal of the frequency source can be widened.

Description

Frequency source and duplexer

Technical Field

The present disclosure relates to the field of electronic technologies, and in particular, to a frequency source and a duplexer.

Background

The frequency source is a radio frequency carrier wave supply source of the communication electronic product and plays an important role in the radio frequency link. In the field of communication, a scheme of adding a phase-locked loop chip to a classical three-point capacitive oscillating circuit is mostly adopted as a frequency source. Although the scheme has good performance index, the frequency range of the radio frequency carrier wave can be provided is not wide enough. Meanwhile, the communication receiving scheme adopts a traditional superheterodyne mode, and the frequency range of the radio frequency carrier is required to be wider. One vco provides a far insufficient frequency range, and two or more vcos are connected to achieve frequency broadening. However, the volume of the communication electronic product is limited, the number of the voltage-controlled oscillators cannot be excessive, and the voltage-controlled oscillators have the problems of poor consistency of devices, wen Wenpiao and aging, etc., so that the frequency range is narrow.

Disclosure of Invention

The present application provides a frequency source and a duplexer capable of widening a frequency range of a frequency signal of the frequency source.

In order to solve the technical problems, one technical scheme adopted by the application is as follows: there is provided a frequency source comprising: the phase discriminator is used for accessing a clock reference signal; the filter circuit is connected with the phase detector and is used for carrying out filter processing on an output signal of the phase detector; the first oscillating circuit is connected with the filter circuit and the phase discriminator and is used for generating an oscillating signal based on the signal subjected to filtering processing and feeding the oscillating signal back to the phase discriminator, and the phase discriminator carries out synchronous processing on the oscillating signal and the clock reference signal so as to update the output signal, so that the first oscillating circuit generates a target frequency signal based on the updated output signal; the tuning circuit is connected with the first oscillating circuit and is used for generating a first compensation signal, and compensating the oscillating voltage of the first oscillating circuit by utilizing the first compensation signal so as to widen the frequency of the target frequency signal and/or perform integrated phase noise or error compensation on the first oscillating circuit.

Optionally, the frequency source further comprises: and the input end of the frequency locking circuit is used for being connected with the frequency locking voltage, and the output end of the frequency locking circuit is connected with the output end of the filter circuit and is used for fast charging the output signal after the filter processing so as to fast stabilize the output signal after the filter circuit processing.

Optionally, the first compensation signal comprises a first sub-compensation signal, and the tuning circuit comprises: the input end of the first oscillation sub-circuit is connected with a first control signal, and a first sub-compensation signal is generated based on the first control signal, and the first sub-compensation signal is used for carrying out integrated phase noise or error compensation on the first oscillation circuit; the switching circuit is provided with a fixed end, a first selection end and a control end, the first selection end is connected with the output end of the first oscillating sub-circuit, the control end is used for being connected with a first switching control signal, and the first switching control signal is used for being connected with the first control signal at the input end to control the first selection end to be conducted with the fixed end; one end of the capacitor is connected with the fixed end, and the other end of the capacitor is connected with the first oscillating circuit.

Optionally, the first compensation signal comprises a second sub-compensation signal, and the tuning circuit comprises: the input end of the second oscillation sub-circuit is connected with a second control signal, and a second sub-compensation signal is generated based on the second control signal, and is used for widening the frequency of the target frequency signal and carrying out integrated phase noise or error compensation on the first oscillation circuit; the switch circuit is also provided with a second selection end, the second selection end is connected with the output end of the second oscillation sub-circuit, the control end is used for being connected with a second switching control signal, and the second switching control signal is used for being connected with the second control signal at the input end to control the second selection end to be conducted with the fixed end.

Optionally, the frequency locking circuit includes: one end of the resistor is connected with a quick locking voltage signal; one end of the capacitor is connected with the other end of the resistor, and the other end of the capacitor is grounded; and one end of the inductor is connected with the other end of the resistor, and the other end of the inductor is connected with the output end of the filter circuit and is used for fast charging the filter circuit by using the fast locking voltage signal.

Optionally, the frequency source further comprises: the modulation circuit is connected with the first oscillation circuit and is used for generating a second compensation signal based on application scene requirements, compensating oscillation voltage of the first oscillation circuit by using the second compensation signal and carrying out integrated phase noise or error compensation on the first oscillation circuit.

Optionally, the frequency source further comprises: the input end of the buffer circuit is connected with the output end of the first oscillating circuit, the output end of the buffer circuit is connected with the feedback end of the phase discriminator, and the output end of the buffer circuit is used as the output end of the frequency source so as to output a target frequency signal; the buffer circuit is used for isolating the voltage of the target frequency signal and/or enhancing the driving capability of the voltage of the target frequency signal.

Optionally, the first oscillating circuit comprises a three-point VCO oscillating circuit and the filter circuit comprises a third order filter circuit.

In order to solve the technical problems, another technical scheme adopted by the application is as follows: there is provided a diplexer comprising any one of the frequency sources described above.

Optionally, the diplexer further comprises: and a transceiver having an input connected to the output of the frequency source for simultaneously transmitting and receiving signals.

Compared with the prior art, the beneficial effects of this application are: the phase discriminator is used for accessing a clock reference signal; the filter circuit is connected with the phase detector and is used for carrying out filter processing on an output signal of the phase detector; the first oscillating circuit is connected with the filter circuit and the phase discriminator and is used for generating an oscillating signal based on the signal subjected to filtering processing and feeding the oscillating signal back to the phase discriminator, and the phase discriminator carries out synchronous processing on the oscillating signal and the clock reference signal so as to update the output signal, so that the first oscillating circuit generates a target frequency signal based on the updated output signal; the tuning circuit is connected with the first oscillating circuit and is used for generating a first compensation signal, and compensating the oscillating voltage of the first oscillating circuit by utilizing the first compensation signal so as to widen the frequency of the target frequency signal and/or perform integrated phase noise or error compensation on the first oscillating circuit. By means of the mode, the tuning circuit can be used for compensating the oscillating voltage of the first oscillating circuit so as to widen the frequency range of the target frequency signal, and/or the first oscillating circuit is subjected to integrated phase noise or error compensation, so that the problems of poor consistency, wen Wenpiao and aging of devices and the like of the first oscillating circuit can be solved, and further the optimal parameter performance of the circuit is obviously exerted.

Drawings

For a clearer description of the technical solutions in the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art, wherein:

FIG. 1 is a schematic diagram of an embodiment of a frequency source of the present application;

FIG. 2 is a schematic diagram of a specific circuit configuration of the tuning circuit in the embodiment of FIG. 1;

FIG. 3 is a schematic diagram of a specific circuit configuration of the filter circuit in the embodiment of FIG. 1;

FIG. 4 is a schematic diagram of a specific circuit structure of the first oscillating circuit in the embodiment of FIG. 1;

FIG. 5 is a schematic diagram of another embodiment of a frequency source of the present application;

FIG. 6 is a schematic diagram of a specific circuit structure of the frequency locking circuit and the filtering circuit in the embodiment of FIG. 5;

FIG. 7 is a schematic diagram of a further embodiment of a frequency source of the present application;

FIG. 8 is a schematic diagram of a specific circuit configuration of the modulation circuit in the embodiment of FIG. 7;

FIG. 9 is a schematic diagram showing a specific circuit configuration of the modulation circuit, the first oscillating circuit and the tuning circuit in the embodiment of FIG. 7;

FIG. 10 is a schematic diagram of a further embodiment of a frequency source of the present application;

fig. 11 is a schematic structural diagram of an embodiment of a duplexer of the present application.

Detailed Description

The following description of the technical solutions in the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

In order to solve the above technical problem, the present application first proposes a frequency source, as shown in fig. 1, fig. 1 is a schematic structural diagram of an embodiment of the frequency source of the present application, where the frequency source of the present embodiment includes: a phase detector 10 for accessing a clock reference signal; a filter circuit 20 connected to the phase detector 10 for filtering the output signal of the phase detector 10; the first oscillation circuit 30 is connected to the filter circuit 20 and the phase detector 10, and is configured to generate an oscillation signal based on the filtered signal, and feed back the oscillation signal to the phase detector 10, where the phase detector 10 performs synchronization processing on the oscillation signal and the clock reference signal to update the output signal, so that the first oscillation circuit 30 generates a target frequency signal based on the updated output signal; the tuning circuit 40 is connected to the first oscillating circuit 30, and is configured to generate a first compensation signal, and compensate the oscillating voltage of the first oscillating circuit 30 by using the first compensation signal to widen the frequency of the target frequency signal and/or perform integrated phase noise or error compensation on the first oscillating circuit 30.

By means of the above manner, the tuning circuit 40 can compensate the oscillating voltage of the first oscillating circuit 30, widen the frequency range of the target frequency signal, and/or perform integrated phase noise or error compensation on the first oscillating circuit 30, so that the problems of poor consistency, wen Wenpiao and aging of devices and the like of the first oscillating circuit 30 can be solved, and further the optimal parameter performance of the circuit is obviously exerted.

Optionally, as shown in fig. 2, fig. 2 is a schematic diagram of a specific circuit structure of the tuning circuit in the embodiment of fig. 1, where the first compensation signal includes a first sub-compensation signal, and the tuning circuit 40 of this embodiment includes: the input end of the first oscillation sub-circuit 41 is connected with a first control signal, and generates a first sub-compensation signal based on the first control signal, and the first sub-compensation signal performs integrated phase noise or error compensation on the first oscillation circuit 30; the switch circuit D2 is provided with a fixed end, a first selection end and a control end, wherein the first selection end is connected with the output end of the first oscillator circuit 41, the control end is used for being connected with a first switching control signal, and the first switching control signal is used for being connected with the first control signal at the input end to control the first selection end to be conducted with the fixed end; and one end of the capacitor C8 is connected with the fixed end, and the other end of the capacitor C is connected with the first oscillating circuit 30.

Wherein the first compensation signal generated by the tuning circuit 40 connected to the first oscillating circuit 30 includes a first sub-compensation signal. The voltage of the target frequency signal enters the first oscillating circuit 30, and the first oscillating circuit 30 generates a corresponding frequency, and the frequency range is in a proportional relation with the voltage of the target frequency signal. The first control signal is determined by the basic deviation value of the tuning circuit 40 and the differential compensation value of the tuning circuit 40. The base bias value of the tuning circuit 40 is the frequency bias value produced by each device in the circuit. The difference compensation value of the tuning circuit 40 is a frequency compensation value generated based on the base deviation value of the tuning circuit 40.

The input terminal of the first oscillator sub-circuit 41 is connected to the first control signal, and generates a first sub-compensation signal based on the first control signal. The first sub-compensation signal can perform integrated phase noise or error compensation on the first oscillating circuit 30, and input the first sub-compensation signals with different voltages according to different use conditions, so that the stability and the universality of the first oscillating circuit 30 can be improved. The switch circuit D2 is provided with a fixed end, a first selection end and a control end, the first selection end is connected with the output end of the first oscillator circuit 41, the control end is connected with a first switching control signal, the first switching control signal can be connected with the first selection end and the fixed end under the control of the first control signal, the continuous connection of the voltage of the first control signal is ensured, the frequency range can be finely adjusted according to the change of the voltage of the target frequency signal, and the voltage of the target frequency signal is ensured to be within a certain range. One end of the capacitor C8 is connected with the fixed end, the other end of the capacitor C8 is connected with the first oscillating circuit 30, and the first sub compensation signal controls the access characteristic of the capacitor C8 so that the capacitor C8 can tune the first oscillating circuit 30 to eliminate the problems of poor consistency, temperature drift, aging of devices in the first oscillating circuit 30, phase noise deterioration of circuit devices when other voltage branches are accessed, and the like.

For example, in an application scenario, the ideal voltage of the target frequency signal is 0-5V, the voltage value of the target frequency signal may be 0, 1V, 2V, 3V, 4V, 5V, the corresponding frequency source may provide a frequency range of F0-F5, and the frequency value may be F0, F1, F2, F3, F4, F5. In practical applications, the voltage of the target frequency signal can only be 1V-4V, and the frequency range that the frequency source can provide can only be F1-F4, because of the problems of poor consistency, temperature drift, aging of devices in the first oscillating circuit 30, phase noise degradation of circuit devices caused by accessing other voltage branches, and the like. For voltage ranges of 0V-1V and 4V-5V, waste will be caused. The tuning circuit 40 of this embodiment can reduce the wasted voltage to a lesser extent, and the voltage of the target frequency signal may be 0.5V-4.5V.

For example, when the frequency range provided by the frequency source is between F1 and F4, the input end of the first oscillator sub-circuit 41 is connected to the first control signal, and generates the first sub-compensation signal based on the first control signal, and the switch circuit is connected to the first control signal at the input end, so as to control the first selection end to be connected to the fixed end, thereby ensuring continuous connection of the voltage of the first control signal, and the voltage of the first control signal is finely adjusted according to the voltage variation of the target frequency signal, so as to ensure that the voltage of the target frequency signal is in the range of 1V to 4V. The first oscillating circuit 30 is further tuned through the capacitor C8, so that the problems of poor consistency, temperature drift, aging of devices in the first oscillating circuit 30, phase noise degradation of circuit devices when other voltage branches are connected are solved, and the voltage range and the frequency range of the target frequency signal are widened.

The tuning circuit 40 can provide different voltages to control according to different frequency points.

In other embodiments, the number of control terminals in the switching circuit may be one or two or more.

Optionally, the first compensation signal includes a second sub-compensation signal, and the tuning circuit 40 of the present embodiment includes: the second oscillation sub-circuit 43 has an input terminal connected to the second control signal, and generates a second sub-compensation signal based on the second control signal, where the second sub-compensation signal is used to widen the frequency of the target frequency signal and perform integrated phase noise or error compensation on the first oscillation circuit 30; the switch circuit D2 is also provided with a second selection end, the second selection end is connected with the output end of the second oscillation subcircuit, the control end is used for being connected with a second switching control signal, and the second switching control signal is used for being connected with the second control signal at the input end to control the second selection end to be conducted with the fixed end.

Wherein the tuning circuit 40 is connected to the first oscillating circuit 30 to generate a first compensation signal comprising a second sub-compensation signal. The input terminal of the second oscillator sub-circuit 43 is connected to the second control signal, and generates a second sub-compensation signal based on the second control signal, where the second sub-compensation signal can widen the frequency of the target frequency signal and perform integrated phase noise or error compensation on the first oscillator circuit 30. The second switching control signal can be connected to the second control signal at the input end to control the second selection end to be conducted with the fixed end, so that continuous connection of the second control signal voltage is ensured, the voltage value which is acquired and stored in advance can be output according to the frequency requirement of preset output, fine adjustment of the target frequency signal voltage is performed according to the actually used frequency, and the stability of the required frequency is achieved, and frequency output is performed. And because the first control signal is accessed in advance, when the switching selection is performed to the second control signal, the problems of phase noise degradation and the like caused by circuit devices when the second oscillator sub-circuit 43 is accessed can be solved, and the voltage range and the frequency range of the target frequency signal can be widened.

The collection of the second control signal voltage may consist of the reference and compensation of the first control voltage, the voltage of the target frequency signal of the first oscillating circuit 30 and the corresponding frequency thereof, and the reference preset value of the second control voltage.

In other embodiments, when the frequency range of the first oscillating circuit meets the requirement, only the first oscillating sub-circuit is connected, the frequency range is fine-tuned and the first oscillating circuit 30 is controlled, and the second oscillating sub-circuit is not connected.

In an application scenario, the tuning circuit 40 of the present embodiment is connected to the first oscillating circuit 30, and is capable of generating a first compensation signal, compensating the oscillating voltage of the first oscillating circuit 30 by using the first compensation signal, and widening the frequency of the target frequency signal and/or performing integrated phase noise or error compensation on the first oscillating circuit 30.

The switching circuit D2 inputs the control signals vco_1 and vco_2 for controlling the operating state of the tuning circuit 40, and selects the input signals offset_cv and tuner_cv to be input to the tuning circuit 40. The first sub-oscillating circuit 41 includes a resistor R1, a capacitor C1, an inductor L2, a varactor D1, a capacitor C2, and an inductor L3. The second sub-oscillating circuit 43 includes a resistor R2, a capacitor C5, an inductor L6, a varactor D3, a varactor D4, a capacitor C6, and an inductor L7. Tuning circuit 40 further includes a switching circuit D2, a capacitor C3, a capacitor C7, an inductance L4, an inductance L8, and a capacitor C8. The switch circuit D2 includes a control terminal VCTL1, a fixed terminal INPUT, a ground terminal GND, a first selection terminal OUT2, and a second selection terminal OUT1, and the control terminal includes a control terminal VCTL1, a control terminal VCTL2, and the fixed terminal INPUT is connected to the selection terminal OUT2 and the second selection terminal OUT 1.

One end of the resistor R1 is connected with an input signal OFFSET_CV, the other end of the resistor R1 is connected with one end of the capacitor C1, and the other end of the capacitor C1 is grounded; one end of the inductor L2 is connected with one end of the capacitor C1, the other end of the inductor L2 is connected with one end of the varactor D1, and the other end of the varactor D1 is grounded; one end of the capacitor C2 is connected with one end of the varactor D1, and the other end of the capacitor C is grounded; one end of the inductor L3 is connected with one end of the capacitor C2, and the other end of the inductor L3 is connected with the first selection end OUT 2; one end of the resistor R2 is connected with the input signal TUNER_CV, the other end of the resistor R2 is connected with one end of the capacitor C5, and the other end of the capacitor C5 is grounded; one end of the inductor L6 is connected with one end of the capacitor C5, the other end of the inductor L is connected with one end of the varactor D3, and the other end of the varactor D3 is grounded; one end of the varactor D4 is connected with one end of the varactor D3, and the other end is grounded; the capacitor C6 is connected with one end of the varactor D4, and the other end of the varactor D4 is grounded; one end of the inductor L7 is connected with the capacitor C6, and the other end of the inductor L is connected with the second selection end OUT 1; one end of the grounding end GND is grounded; one end of the control end VCTL2 is connected with one end of a capacitor C3, and the other end of the capacitor C3 is grounded; one end of the inductor L4 is connected with one end of the capacitor C3, and the other end is connected with the control signal VCO_2; one end of the control end VCTL1 is connected with one end of a capacitor C7, and the other end of the capacitor C7 is grounded; one end of the inductor L8 is connected with one end of the capacitor C7, and the other end is connected with the control signal VCO_1; one end of the fixed end INPUT is connected with one end of the capacitor C8, and the other end of the capacitor C8 is connected with the first oscillating circuit 30.

Alternatively, the first oscillation circuit 30 of the present embodiment includes a three-dot VCO oscillation circuit, and the filter circuit 20 includes a third-order filter circuit.

Optionally, as shown in fig. 3, fig. 3 is a schematic diagram of a specific circuit structure of the filter circuit in the embodiment of fig. 1, where the filter circuit 20 of this embodiment is formed by a third-order RC filter circuit, the input end of the filter circuit 20 receives the output signal CPOUT, and the third-order RC filter circuit performs filtering processing on the output signal CPOUT to finally obtain the voltage of the output signal CV. The filter circuit 20 of the present embodiment can provide the first oscillating circuit 30 with a voltage of the output signal CV that is continuously stable, so that the first oscillating circuit 30 generates a corresponding frequency.

The input end of the filter circuit 20 receives the output signal CPOUT of the phase detector 10. The third-order RC filter circuit comprises a capacitor C20, a resistor R9, a capacitor C21, a resistor R13, a capacitor C26, a resistor R7, a capacitor C23, a capacitor C27, a resistor R8 and a capacitor C22.

One end of the capacitor C20 is grounded, and the other end of the capacitor C is connected with the output signal CPOUT; one end of the resistor R9 is connected with the other end of the capacitor C20 and one end of the capacitor C21, and the other end of the resistor R9 is connected with the other end of the capacitor C21 and one end of the resistor R13; the other end of the resistor R13 is connected with one end of the capacitor C26, and the other end of the capacitor C26 is grounded; one end of the resistor R7 is connected with one end of the resistor R9, and the other end of the resistor R7 is connected with one end of the capacitor C23; the other end of the capacitor C23 is connected with the other end of the resistor R13 and one end of the capacitor C27; the other end of the capacitor C27 is grounded; one end of the resistor R8 is connected with the other end of the resistor R7, the other end of the resistor R8 is connected with one end of the capacitor C22 and outputs a signal CV, and the other end of the capacitor C22 is grounded. The third-order RC filter circuit is capable of performing a filtering process on the output signal CPOUT, and after the output signal CPOUT is subjected to the third-order RC filter circuit, the filtered output signal CPOUT is an output signal CV, and the output signal CV is output to the first oscillating circuit 30. The third-order RC filter circuit can provide the first oscillating circuit 30 with a voltage of the continuous stable output signal CV so that the first oscillating circuit 30 generates a corresponding frequency.

Alternatively, as shown in fig. 4, fig. 4 is a schematic circuit diagram of a specific circuit structure of the first oscillating circuit in the embodiment of fig. 1, where the first oscillating circuit 30 of this embodiment is formed by a three-point VCO oscillating circuit, and an input terminal of the three-point VCO oscillating circuit receives the output signal CV and generates a corresponding frequency, and finally outputs the signal rf_lo to the next stage circuit.

The three-point VCO oscillating circuit includes an inductor L14, a capacitor C19, an inductor L11, a varactor D7, a varactor D8, a varactor D5, a varactor D6, an inductor L13, a capacitor C11, a capacitor C13, an inductor L12, a capacitor C14, a capacitor C18, a capacitor C16, a resistor R6, an inductor L16, a transistor Q1, a capacitor C10, an inductor L9, a resistor R4, a capacitor C9, a resistor R3, an inductor L5, a capacitor C4, an inductor L1, and a dc power supply 3V3. The transistor Q1 includes a first terminal, a second terminal and a third terminal.

One end of the inductor L14 is connected with the output signal CV, and the other end of the inductor L is connected with one end of the capacitor C19 and one end of the inductor L11; the other end of the capacitor C19 is connected with one end of the varactor D7, one end of the varactor D8, one end of the inductor L13 and the ground; the other end of the inductor L11 is connected with the other end of the varactor D7, the other end of the varactor D8, one end of the varactor D5 and one end of the varactor D6; the other end of the inductor L13 is connected with the other end of the varactor D5 and the other end of the varactor D6; one end of the capacitor C11 is connected with the other end of the varactor D5, the other end of the capacitor C13 is connected with one end of the capacitor C13, and the other end of the capacitor C13 is grounded; one end of the inductor L12 is connected with one end of the capacitor C13, and the other end of the inductor L is grounded; one end of the capacitor C12 is connected with one end of the inductor L12, and the other end of the capacitor C12 is connected with one end of the inductor L9, one end of the capacitor C14 and the first end of the transistor Q1; the other end of the capacitor C14 is connected with one end of the capacitor C16 and one end of the capacitor C18; the other end of the capacitor C18 is grounded; the other end of the capacitor C16 is connected with the second end of the transistor Q1 and one end of the resistor R6, the other end of the resistor R6 is connected with one end of the inductor L16, and the other end of the inductor L16 is grounded; the other end of the inductor L9 is connected with one end of the resistor R4 and one end of the capacitor C9, and the other end of the resistor R4 and the other end of the capacitor C9 are grounded; one end of the resistor R3 is connected with the other end of the inductor L9, the other end of the resistor R is connected with one end of the capacitor C4, and the other end of the capacitor C4 is grounded; one end of the inductor L1 is connected with one end of the capacitor C4, and the other end of the inductor L is connected with the direct current power supply 3V 3; one end of the capacitor C10 is connected with the third end of the transistor Q1, and the other end of the capacitor C outputs a signal RF_LO; one end of the inductor L5 is connected to one end of the capacitor C10, and the other end is connected to the other end of the resistor R3. The tuning circuit 40 and/or the modulation circuit 60 may be connected to one end of the capacitor C13, so as to compensate the oscillating voltage of the first oscillating circuit 30 in this embodiment, and widen the frequency sum of the target frequency signal or perform integrated phase noise or error compensation on the first oscillating circuit 30.

The present application further proposes another embodiment of a frequency source, as shown in fig. 5, fig. 5 is a schematic structural diagram of another embodiment of the frequency source of the present application, where the frequency source of the present embodiment further includes, based on the embodiment of fig. 1: the input end of the frequency locking circuit 50 is used for being connected with the frequency locking voltage, the output end of the frequency locking circuit is connected with the output end of the filter circuit 20, and the frequency locking circuit is used for fast charging the output signal after the filter processing so as to fast stabilize the output signal after the filter circuit processing.

The input end of the frequency locking circuit 50 is connected to a frequency locking voltage, the output end of the frequency locking circuit is connected to the output end of the filter circuit 20, the voltage provided by the frequency locking voltage is the same as the voltage received by the input end of the filter circuit 20, the frequency locking voltage charges the filter circuit 20, the charging time of the filter circuit 20 can be reduced, the locking time of a frequency source is ensured to be within a required range, and the output signal after the filter processing of the filter circuit 20 can be quickly charged, so that the output signal is quickly stabilized.

Optionally, as shown in fig. 6, fig. 6 is a schematic diagram of a specific circuit structure of the frequency locking circuit and the filtering circuit in the embodiment of fig. 5, and the frequency locking circuit 50 in this embodiment includes: one end of the resistor R5 is connected with a FAST locking voltage signal FAST_CV; one end of the capacitor C17 is connected with the other end of the resistor R5, and the other end of the capacitor C is grounded; and one end of the inductor L10 is connected with the other end of the resistor R5, and the other end of the inductor L is connected with the output end of the filter circuit 20, so as to FAST charge the filter circuit 20 by using the FAST locking voltage signal fast_cv.

One end of the resistor R5 is connected to the FAST locking voltage signal fast_cv, the other end of the inductor L10 is connected to the output end of the filter circuit 20, the voltage provided by the FAST locking voltage signal fast_cv is the same as the voltage received by the input end of the filter circuit 20, the FAST locking voltage signal fast_cv charges the filter circuit 20, the charging time of the filter circuit 20 can be reduced, and the locking time of the frequency source is ensured to be within the required range.

The present application further proposes a frequency source according to another embodiment, as shown in fig. 7, fig. 7 is a schematic structural diagram of another embodiment of the frequency source according to the present application, where the frequency source further includes, based on the embodiment of fig. 1: the modulation circuit 60 is connected to the first oscillation circuit 30, and is configured to generate a second compensation signal based on an application scenario requirement, and compensate an oscillation voltage of the first oscillation circuit 30 by using the second compensation signal, so as to perform integrated phase noise or error compensation on the first oscillation circuit 30.

The output end of the modulation circuit 60 is connected with the first oscillation circuit 30, and according to different usage conditions, the input end of the modulation circuit 60 is connected with different signals, so that a second compensation signal can be generated based on different application scene requirements, and the second compensation signal is used for compensating the oscillation voltage of the first oscillation circuit 30, so that integrated phase noise or error compensation can be further performed on the first oscillation circuit 30.

In an application scenario, as shown in fig. 8, fig. 8 is a schematic diagram of a specific circuit structure of the modulation circuit in the embodiment of fig. 7, where an input end of the modulation circuit 60 of the embodiment is connected to a signal MOD, and an output end of the modulation circuit is connected to the first oscillation circuit 30, so that the oscillation voltage of the first oscillation circuit 30 can be compensated based on different application scenario requirements, the first oscillation circuit 30 can be modulated by using different signals, and integrated phase noise or error compensation can be further performed on the first oscillation circuit 30.

The modulation circuit 60 includes an inductor L17, a capacitor C25, a resistor R10, a resistor R14, a resistor R11, a varactor D9, an inductor L15, a capacitor C15, a resistor R12, a capacitor C24, and a dc power supply 5V.

One end of the inductor L17 is connected with the direct-current power supply 5V, the other end of the inductor L is connected with one end of the capacitor C25, and the other end of the capacitor C25 is grounded; one end of the resistor R10 is connected with one end of the capacitor C25, the other end of the resistor R14 is connected with one end of the resistor R14, and the other end of the resistor R14 is grounded; one end of the resistor R11 is connected with one end of the resistor R14, the other end of the resistor R is connected with one end of the varactor D9, and the other end of the varactor D9 is grounded; one end of the resistor R12 is connected with one end of the varactor D9, the other end of the resistor R is connected with one end of the capacitor C24, and the other end of the capacitor C24 is connected with the signal MOD; one end of the inductor L15 is connected to one end of the varactor D9, the other end is connected to one end of the capacitor C15, and the other end of the capacitor C15 is connected to the first oscillation circuit 30.

In other application scenarios, the modulation circuit can input different signals according to different use conditions, use requirements, application scenarios and the like, and the modulation circuit with different circuit structures can be used for modulating the signals.

As shown in fig. 9, fig. 9 is a schematic diagram of a specific circuit structure of the modulation circuit, the first oscillation circuit, and the tuning circuit in the frequency source of the embodiment of fig. 7, where the capacitor C8 and the capacitor C15 are connected to the capacitor C11.

The present application further proposes a frequency source according to another embodiment, as shown in fig. 10, fig. 10 is a schematic structural diagram of another embodiment of the frequency source according to the present application, where the frequency source according to the present embodiment further includes, on the basis of the embodiment of fig. 1: the input end of the buffer circuit 70 is connected with the output end of the first oscillating circuit 30, the output end of the buffer circuit is connected with the feedback end of the phase detector 10, and the output end of the buffer circuit is used as the output end of the frequency source so as to output a target frequency signal; the buffer circuit 70 is used for isolating the voltage of the target frequency signal and/or enhancing the driving capability of the voltage of the target frequency signal.

The input end of the buffer circuit 70 is connected to the output end of the first oscillating circuit 30, the output end thereof is connected to the feedback end of the phase detector 10, and the output end thereof is used as the output end of the frequency source of the embodiment, so as to output the target frequency signal, isolate the voltage of the target frequency signal, and/or enhance the driving capability of the voltage of the target frequency signal.

Similar modifications can be made to the other embodiments described above.

In order to solve the above technical problem, the present application further proposes a duplexer, where the duplexer of the present embodiment includes any one of the frequency sources described above. The duplexer of the present embodiment includes at least: a phase detector 10, a filter circuit 20, a first oscillating circuit 30, a tuning circuit 40.

Optionally, as shown in fig. 11, fig. 11 is a schematic structural diagram of an embodiment of the duplexer of the present application, and the duplexer of the present embodiment further includes: transceiver 80 has an input coupled to the output of the frequency source for simultaneously transmitting and receiving signals.

In the duplexer of this embodiment, the output end of the phase detector 10 is connected to the input end of the filter circuit 20, the output end of the filter circuit 20 is connected to the input end of the first oscillating circuit 30, the output end of the tuning circuit is connected to the first oscillating circuit 30, and the output end of the first oscillating circuit 30 is connected to the transceiver 80 and the feedback end of the phase detector 10. The duplexer of the embodiment can support duplex communication, the performance of the frequency source included in the duplexer of the embodiment is close to the parameter performance of the traditional two VCO frequency sources, the whole machine index verification is passed, the power consumption, the cost and the PCB area of the frequency source are reduced by nearly half, and the phase noise is slightly worse than the indexes of the traditional two VCOs. The phase discriminator 10 provides a scheme of signal voltage range 0-3.3V, which can widen the frequency source by more than one time, the performance index is basically consistent with that before widening, and the duplexer of the embodiment is adopted, so that the problems of poor consistency, temperature drift, aging and the like of the device can be compensated by adjusting the voltage through software control without reworking and repairing.

The circuit of the duplexer is simple, and the frequency range, the circuit power consumption, the cost, the PCB area and the like can be multiplied; the influence of parasitic parameters and physical characteristics of devices of the VCO oscillation circuit can be eliminated, the phase noise index, consistency and stability of the VCO are improved, and the duplexer is more suitable for mass design and production; the duplexer circuit of the embodiment has simple design, can be matched with software control, has strong scheme universality and is more beneficial to miniaturization design.

In the description of the embodiments of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "connected," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium. The specific meaning of the terms in the embodiments of the present application will be understood by those of ordinary skill in the art in a specific context.

In the examples herein, a first feature "on" or "under" a second feature may be either the first and second features in direct contact, or the first and second features in indirect contact via an intermediary, unless expressly stated and defined otherwise. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the embodiments of the present application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless explicitly defined otherwise.

The foregoing description is only exemplary embodiments of the present application and is not intended to limit the scope of the present application, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present application, or direct or indirect application in other related technical fields are included in the scope of the present application.

Claims

1. A frequency source, comprising:

the phase discriminator is used for accessing a clock reference signal;

the filter circuit is connected with the phase detector and is used for carrying out filter processing on an output signal of the phase detector;

the first oscillation circuit is connected with the filter circuit and the phase discriminator and is used for generating an oscillation signal based on the signal subjected to the filtering processing and feeding back the oscillation signal to the phase discriminator, and the phase discriminator is used for synchronously processing the oscillation signal and the clock reference signal so as to update the output signal, so that the first oscillation circuit generates a target frequency signal based on the updated output signal;

the tuning circuit is connected with the first oscillating circuit and is used for generating a first compensation signal, and compensating the oscillating voltage of the first oscillating circuit by utilizing the first compensation signal so as to widen the frequency sum of the target frequency signal or perform integrated phase noise or error compensation on the first oscillating circuit.

2. The frequency source of claim 1, further comprising:

and the input end of the frequency locking circuit is used for being connected with frequency locking voltage, and the output end of the frequency locking circuit is connected with the output end of the filter circuit and is used for fast charging the output signal after the filter processing so as to fast stabilize the output signal after the filter circuit processing.

3. The frequency source of claim 1, wherein the first compensation signal comprises a first sub-compensation signal, and wherein the tuning circuit comprises:

the input end of the first oscillation sub-circuit is connected with a first control signal, and the first sub-compensation signal is generated based on the first control signal and is used for carrying out integrated phase noise or error compensation on the first oscillation circuit;

the switching circuit is provided with a fixed end, a first selection end and a control end, the first selection end is connected with the output end of the first oscillation subcircuit, the control end is used for being connected with a first switching control signal, and the first switching control signal is used for being connected with the first control signal at the input end to control the first selection end to be conducted with the fixed end;

one end of the capacitor is connected with the fixed end, and the other end of the capacitor is connected with the first oscillating circuit.

4. A frequency source as claimed in claim 3, wherein the first compensation signal comprises a second sub-compensation signal, the tuning circuit comprising:

the input end of the second oscillation sub-circuit is connected with a second control signal, and the second sub-compensation signal is generated based on the second control signal, and is used for widening the frequency of the target frequency signal and carrying out integrated phase noise or error compensation on the first oscillation circuit;

the switch circuit is also provided with a second selection end, the second selection end is connected with the output end of the second oscillation sub-circuit, the control end is used for being connected with a second switching control signal, and the second switching control signal is used for being connected with the second control signal at the input end to control the second selection end to be conducted with the fixed end.

5. The frequency source of claim 2, wherein the frequency locking circuit comprises:

one end of the resistor is connected with a quick locking voltage signal;

one end of the capacitor is connected with the other end of the resistor, and the other end of the capacitor is grounded;

and one end of the inductor is connected with the other end of the resistor, and the other end of the inductor is connected with the output end of the filter circuit and is used for rapidly charging the filter circuit by utilizing the rapid locking voltage signal.

6. The frequency source of claim 1, further comprising:

the modulation circuit is connected with the first oscillation circuit and is used for generating a second compensation signal based on application scene requirements, compensating the oscillation voltage of the first oscillation circuit by utilizing the second compensation signal and carrying out integrated phase noise or error compensation on the first oscillation circuit.

7. The frequency source of claim 1, further comprising:

the input end of the buffer circuit is connected with the output end of the first oscillating circuit, the output end of the buffer circuit is connected with the feedback end of the phase discriminator, and the output end of the buffer circuit is used as the output end of the frequency source so as to output the target frequency signal;

the buffer circuit is used for isolating the voltage of the target frequency signal and/or enhancing the driving capability of the voltage of the target frequency signal.

8. The frequency source of claim 1, wherein the first oscillating circuit comprises a three-point VCO oscillating circuit and the filtering circuit comprises a third order filtering circuit.

9. A diplexer comprising the frequency source of any one of claims 1 to 8.

10. The duplexer as claimed in claim 9, further comprising:

and the input end of the transceiver is connected with the output end of the frequency source and is used for simultaneously transmitting and receiving signals.