CN219180176U - OLED screen time-sharing control system based on CPU and CPLD - Google Patents

OLED screen time-sharing control system based on CPU and CPLD Download PDF

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CN219180176U
CN219180176U CN202222980038.2U CN202222980038U CN219180176U CN 219180176 U CN219180176 U CN 219180176U CN 202222980038 U CN202222980038 U CN 202222980038U CN 219180176 U CN219180176 U CN 219180176U
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module
cpu
cpld
resistor
oled
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于然
于辉
罗旭
嵇晨
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Jiangsu Aerospace 706 Information Technology Co ltd
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Jiangsu Aerospace 706 Information Technology Co ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

The utility model discloses an OLED screen time-sharing control system based on a CPU and a CPLD, which comprises a CPU control module, a CPLD control module, a time controller, a power supply module, a driving module, a filtering module and an OLED light source module; the driving module is respectively connected with the time controller, the power module and the filtering module, the CPU control module and the CPLD control module are both connected with the driving module through the time controller, and the OLED light source module is connected with the driving module through the filtering module. The utility model can effectively solve the problem that the user use is affected because the signal required by the user cannot be displayed in the uncontrolled time domain due to longer FT-D2000 starting time, thereby well solving the problem of black screen in the OLED uncontrolled period in the CPU starting process, eliminating the uncontrolled time domain of the OLED, enabling the user to obtain the required information earlier and increasing the user experience.

Description

OLED screen time-sharing control system based on CPU and CPLD
Technical Field
The utility model relates to the technical field of OLED control, in particular to an OLED screen time-sharing control system based on a CPU and a CPLD.
Background
The organic light emitting diode (Organic Light Emitting Diode, OLED) is a brand new display technology, and is characterized in that the anode of the OLED capable of emitting light by itself is a thin and transparent Indium Tin Oxide (ITO), the cathode is a metal composition, and an organic material layer (including a hole transport layer, a light emitting layer, an electron transport layer, etc.) is sandwiched therebetween to form a "sandwich". When the current is turned on, the holes of the positive electrode and the charges of the negative electrode are combined in the light-emitting layer to generate light. Depending on the organic material enclosed therein, different colors of light may be emitted. Compared with the traditional LCD, the OLED display screen does not need a backlight source, and is lower in power consumption, thinner in appearance, higher in brightness and wider in vision.
However, in the control technology of the OLED screen at present, MCU, CPLD or CPU is utilized to perform single control on the OLED screen, and the disadvantage of adopting MCU to control the OLED screen is that MCU interface functions are less, and user requirements can not be met in many times; the disadvantage of adopting the CPU to control the OLED screen is that the CPU is started for a long time, and the CPU cannot control the OLED in the time period of starting, so that the OLED screen is blacked, and the user experience is affected; the CPLD is adopted to control the OLED screen, and information can be displayed immediately, but the information to be displayed is generally sent by a CPU, and if the CPLD is adopted to control, a control signal is additionally added between the CPU and the CPLD.
For the problems in the related art, no effective solution has been proposed at present.
Disclosure of Invention
Aiming at the problems in the related art, the utility model provides an OLED screen time-sharing control system based on a CPU and a CPLD, so as to overcome the technical problems existing in the related art.
Since the CPU (Feiteng D2000) start-up time is relatively long, the CPLD start-up time is very short. Therefore, the utility model can solve the problem of black screen in the OLED non-control period in the CPU starting process, can enable a user to obtain the required information earlier, and increases the user experience.
For this purpose, the utility model adopts the following specific technical scheme:
an OLED screen time-sharing control system based on a CPU and a CPLD comprises a CPU control module, a CPLD control module, a time controller, a power supply module, a driving module, a filtering module and an OLED light source module; the driving module is respectively connected with the time controller, the power module and the filtering module, the CPU control module and the CPLD control module are both connected with the driving module through the time controller, and the OLED light source module is connected with the driving module through the filtering module.
Further, the model of the processor chip in the CPU control module is FT-D2000. The model of the processor chip in the CPLD control module is EF2L15LG100B. The OLED light source module is composed of an M31S1322ZK_02 OLED screen with a word stock.
Further, the filtering module includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1, a capacitor C2, and an operational amplifier U1B; the fifth pin of the operational amplifier U1B is respectively connected with one end of a capacitor C2, one end of a resistor R3 and one end of a resistor R4, the other end of the capacitor C2 is grounded, the other end of the resistor R3 is connected with a power supply positive pole VCC, and the other end of the resistor R4 is grounded; the sixth pin of the operational amplifier U1B is respectively connected with one end of a capacitor C1 and one end of a resistor R2, the other end of the capacitor C1 is connected with one end of the resistor R1, the other end of the resistor R1 is connected with an input voltage Vin, and the other end of the resistor R2 is connected with the seventh pin of the operational amplifier U1B and is connected with an output voltage Vout.
Further, the operational amplifier U1B is model LM324.
The beneficial effects of the utility model are as follows: the problem of uncontrolled time domain generated when a single control source is adopted by a traditional OLED screen can be effectively solved, the problem that the user use is affected due to the fact that signals required by the user cannot be displayed in the uncontrolled time domain because of long FT-D2000 starting time can be effectively solved, the problem of black screen in the OLED uncontrolled period in the CPU starting process is well solved, the uncontrolled time domain of the OLED is eliminated, the user can obtain required information earlier, and user experience is improved.
Drawings
In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of a CPU and CPLD based OLED screen time sharing control system in accordance with an embodiment of the present utility model;
FIG. 2 is a circuit diagram of a filter module in a CPU and CPLD based OLED screen time sharing control system according to an embodiment of the present utility model;
fig. 3 is a schematic diagram of an OLED screen time-sharing control system based on a CPU and a CPLD according to an embodiment of the present utility model.
In the figure:
1. a CPU control module; 2. a CPLD control module; 3. a time controller; 4. a power module; 5. a driving module; 6. a filtering module; 7. an OLED light source module.
Detailed Description
For the purpose of further illustrating the various embodiments, the present utility model provides the accompanying drawings, which are a part of the disclosure of the present utility model, and which are mainly used to illustrate the embodiments and, together with the description, serve to explain the principles of the embodiments, and with reference to these descriptions, one skilled in the art will recognize other possible implementations and advantages of the present utility model, wherein elements are not drawn to scale, and like reference numerals are generally used to designate like elements.
According to the embodiment of the utility model, an OLED screen time-sharing control system based on a CPU and a CPLD is provided.
The utility model is further described with reference to the accompanying drawings and the specific embodiments, as shown in fig. 1-3, the OLED screen time-sharing control system based on a CPU and a CPLD according to an embodiment of the utility model includes a CPU control module 1, a CPLD control module 2, a time controller 3, a power module 4, a driving module 5, a filtering module 6 and an OLED light source module 7;
the driving module 5 is respectively connected with the time controller 3, the power module 4 and the filtering module 6, the CPU control module 1 and the CPLD control module 2 are both connected with the driving module 5 through the time controller 3, and the OLED light source module 7 is connected with the driving module 5 through the filtering module 6.
In one embodiment, the CPU control module 1 is mainly composed of FT-D2000 and peripheral circuits thereof, and realizes the functions of user data processing and interaction.
The CPLD control module 2 mainly comprises An Lu EF2L15LG100B CPLD and peripheral circuits thereof, and mainly realizes power-on time sequence control and OLED screen control.
The OLED light source module 7 mainly comprises an OLED screen with a word stock of M31S1322ZK_02 and peripheral circuits thereof, and mainly realizes the display function of necessary information.
Since the CPU (Feiteng D2000) cannot control the OLED screen during the starting process, that is, the OLED cannot display the corresponding content. Therefore, the utility model adopts a two-in-one mode to realize time-sharing control on the OLED screen, namely, the time from the start-up of the system to the completion of the start-up of the Feiteng D2000 adopts the safety path EF2L15LG100B CPLD to control the OLED screen, so that the system state in the time is correspondingly prompted; when the Feiteng D2000 is started, the Feiteng D2000 acquires the control right of the OLED screen and displays corresponding information in real time.
In addition, the utility model can also adopt MCU and CPLD to carry out time-sharing control on the OLED screen or utilize MCU and CPU to carry out time-sharing control on the OLED screen.
In one embodiment, the filtering module 6 includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1, a capacitor C2, and an operational amplifier U1B, and the model of the operational amplifier U1B is LM324;
the fifth pin of the operational amplifier U1B is respectively connected with one end of a capacitor C2, one end of a resistor R3 and one end of a resistor R4, the other end of the capacitor C2 is grounded, the other end of the resistor R3 is connected with a power supply positive pole VCC, and the other end of the resistor R4 is grounded; the sixth pin of the operational amplifier U1B is respectively connected with one end of a capacitor C1 and one end of a resistor R2, the other end of the capacitor C1 is connected with one end of the resistor R1, the other end of the resistor R1 is connected with an input voltage Vin, and the other end of the resistor R2 is connected with the seventh pin of the operational amplifier U1B and is connected with an output voltage Vout.
In summary, by means of the technical scheme of the utility model, the problem of uncontrolled time domain generated when the traditional OLED screen adopts a single control source can be effectively solved, and the problem that the user use is affected due to the fact that signals required by the user cannot be displayed in the uncontrolled time domain because of long FT-D2000 starting time can be effectively solved, so that the problem of black screen in the OLED uncontrolled period in the CPU starting process is well solved, the uncontrolled time domain of the OLED is eliminated, the user can obtain required information earlier, and the user experience is improved.
The foregoing description of the preferred embodiments of the utility model is not intended to be limiting, but rather is intended to cover all modifications, equivalents, alternatives, and improvements that fall within the spirit and scope of the utility model.

Claims (6)

1. The OLED screen time-sharing control system based on the CPU and the CPLD is characterized by comprising a CPU control module (1), a CPLD control module (2), a time controller (3), a power supply module (4), a driving module (5), a filtering module (6) and an OLED light source module (7);
the driving module (5) is respectively connected with the time controller (3), the power module (4) and the filtering module (6), the CPU control module (1) and the CPLD control module (2) are connected with the driving module (5) through the time controller (3), and the OLED light source module (7) is connected with the driving module (5) through the filtering module (6).
2. The OLED screen time-sharing control system based on the CPU and the CPLD according to claim 1, wherein the model of a processor chip in the CPU control module (1) is FT-D2000.
3. The OLED screen time-sharing control system based on CPU and CPLD according to claim 1, wherein the model of the processor chip in the CPLD control module (2) is EF2L15LG100B.
4. The time-sharing control system of the OLED screen based on the CPU and the CPLD according to claim 1, wherein the OLED light source module (7) is composed of an OLED screen with a word stock of M31S1322 ZK_02.
5. The OLED screen time-sharing control system based on CPU and CPLD according to claim 1, wherein the filtering module (6) includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1, a capacitor C2, and an operational amplifier U1B;
the fifth pin of the operational amplifier U1B is respectively connected with one end of the capacitor C2, one end of the resistor R3 and one end of the resistor R4, the other end of the capacitor C2 is grounded, the other end of the resistor R3 is connected with the positive power supply VCC, and the other end of the resistor R4 is grounded;
the sixth pin of the operational amplifier U1B is connected to one end of the capacitor C1 and one end of the resistor R2, the other end of the capacitor C1 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to the input voltage Vin, and the other end of the resistor R2 is connected to the seventh pin of the operational amplifier U1B and to the output voltage Vout.
6. The OLED screen time-sharing control system based on CPU and CPLD as claimed in claim 5, wherein said operational amplifier U1B is model LM324.
CN202222980038.2U 2022-11-09 2022-11-09 OLED screen time-sharing control system based on CPU and CPLD Active CN219180176U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202222980038.2U CN219180176U (en) 2022-11-09 2022-11-09 OLED screen time-sharing control system based on CPU and CPLD

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222980038.2U CN219180176U (en) 2022-11-09 2022-11-09 OLED screen time-sharing control system based on CPU and CPLD

Publications (1)

Publication Number Publication Date
CN219180176U true CN219180176U (en) 2023-06-13

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Country Status (1)

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