CN219065562U - TO packaged semiconductor chip aging test fixture - Google Patents

TO packaged semiconductor chip aging test fixture Download PDF

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Publication number
CN219065562U
CN219065562U CN202223455853.3U CN202223455853U CN219065562U CN 219065562 U CN219065562 U CN 219065562U CN 202223455853 U CN202223455853 U CN 202223455853U CN 219065562 U CN219065562 U CN 219065562U
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China
Prior art keywords
shell
rod
spring
semiconductor chip
clamping
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Active
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CN202223455853.3U
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Chinese (zh)
Inventor
党琪
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Wuhan Feiguang Technology Co ltd
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Wuhan Feiguang Technology Co ltd
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Priority to CN202223455853.3U priority Critical patent/CN219065562U/en
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

The utility model discloses a TO packaged semiconductor chip aging test fixture which comprises a shell, wherein a cover plate is arranged on the shell through a rotating mechanism, a fixing mechanism is arranged between the cover plate and the shell, a first spring rod and a telescopic rod are fixedly arranged on the shell, clamping plates are fixedly arranged on the first spring rod and the telescopic rod, a linkage mechanism is arranged between the two clamping plates, and a plurality of ejector pins are fixedly arranged on the shell. The advantages are that: the chip with different sizes can be clamped and fixed, the application range is enlarged, meanwhile, the rack and the gear can ensure that the chip is positioned in the middle of the base plate, the thimble is aligned with the conducting plate on the chip, meanwhile, the situation of poor contact caused by abrasion of the thimble can be avoided, and the service life is longer.

Description

TO packaged semiconductor chip aging test fixture
Technical Field
The utility model relates TO the technical field of TO packaged semiconductor chips, in particular TO a TO packaged semiconductor chip aging test fixture.
Background
TO packaged semiconductor is a novel semiconductor material which has great effect in the field of chip manufacture, and is formed into a chip by etching wiring on the semiconductor, and after the chip manufacture is finished, the chip needs TO be detected by using an aging test fixture.
The existing clamp has the following defects in the specific use process: 1. the specific clamp can only clamp and fix a specific chip, and has certain limitation in application range; 2. the thimble on the anchor clamps is fixed in length, and long-term use can make the thimble wearing and tearing to lead to the current-conducting plate on the chip unable with thimble contact, can not reach the detection purpose.
Therefore, the novel TO packaged semiconductor chip aging test fixture can be adopted TO solve the defects in the prior art.
Disclosure of Invention
The utility model aims TO solve the problems in the prior art, and provides a TO packaged semiconductor chip aging test fixture.
In order to achieve the above purpose, the present utility model adopts the following technical scheme:
the utility model provides a TO encapsulation semiconductor chip aging test anchor clamps, includes the shell, install the apron through slewing mechanism on the shell, install fixed establishment between apron and the shell, fixed mounting has a spring beam and a telescopic link on the shell, equal fixed mounting has a splint on spring beam and the telescopic link, two install interlock mechanism between the splint, fixed mounting has a plurality of thimble on the shell, fixed mounting has a plurality of spring beam two on the shell, a plurality of spring beam two top fixed mounting has a backing plate jointly, offer a plurality of holes with corresponding thimble matched with on the backing plate, rotate on the apron and install the nut, threaded rotation has the screw rod on the nut, be sliding connection between screw rod and the apron, fixed mounting is held out the board on the screw rod.
In the TO packaging semiconductor chip aging test fixture, the rotating mechanism comprises a sliding rod, a first spring and a groove body, the groove body is formed in the shell, the sliding rod is slidably mounted on the groove body, the first spring is fixedly mounted between the sliding rod and the groove body, and the sliding rod is in rotating connection with the cover plate.
In the TO packaging semiconductor chip aging test fixture, the fixing mechanism comprises a clamping rod, a clamping groove, a sliding groove and a second spring, the clamping rod is slidably arranged on the cover plate through the sliding groove, the second spring is fixedly arranged between the clamping rod and the sliding groove, the clamping groove matched with the clamping rod is formed in the shell, and the shell is provided with a separation structure matched with the next clamping rod.
In the TO packaged semiconductor chip aging test fixture, the separation structure comprises a push rod and a spring III, the push rod matched with the clamping rod is slidably arranged on the shell, and the spring III is fixedly arranged between the push rod and the shell.
In the TO packaging semiconductor chip aging test fixture, the linkage mechanism comprises racks and gears, wherein one rack is fixedly arranged on each of the two clamping plates, and the gears meshed with the two racks are fixedly arranged on the shell.
In the TO packaged semiconductor chip aging test fixture, the first limiting block is fixedly arranged on the sliding rod, and the second limiting block matched with the first limiting block is fixedly arranged on the cover plate.
Compared with the prior art, the utility model has the advantages that:
1: through setting up spring beam one, telescopic link, rack, gear and splint, can carry out the centre gripping to the chip of equidimension, enlarged application scope, rack and gear can ensure that the chip is located the backing plate in the middle of simultaneously, ensure that the thimble aligns with the current-conducting plate on the chip.
2: through setting up screw rod, butt board, nut, spring beam two and backing plate, the accessible butt board presses the chip, makes the current-conducting plate on the chip offset with the thimble, and the backing plate can reciprocate, can avoid the thimble wearing and tearing and lead to the poor condition to take place of contact like this, and life is longer.
In summary, the chip clamping device can clamp and fix chips with different sizes, the application range is enlarged, meanwhile, the racks and the gears can ensure that the chips are positioned in the middle of the base plate, ensure that the ejector pins are aligned with the conductive plates on the chips, and simultaneously, the occurrence of poor contact caused by abrasion of the ejector pins can be avoided, so that the service life is longer.
Drawings
The utility model is described in further detail below with reference to the attached drawing figures, wherein:
fig. 1 is a schematic structural diagram of a TO packaged semiconductor chip burn-in fixture according TO the present utility model;
fig. 2 is an enlarged schematic detail view of the portion a in fig. 1.
In the figure: 1 shell, 2 cover plate, 3 slide bar, 4 spring one, 5 spring rod one, 6 telescopic link, 7 splint, 8 rack, 9 gear, 10 spring rod two, 11 backing plate, 12 thimble, 13 butt plate, 14 screw rod, 15 nut, 16 clamping rod, 17 draw-in groove, 18 spring two, 19 push rod, 20 spring three.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
Referring TO fig. 1-2, a TO packaged semiconductor chip aging test fixture comprises a housing 1, wherein a cover plate 2 is arranged on the housing 1 through a rotating mechanism, a fixing mechanism is arranged between the cover plate 2 and the housing 1, a first spring rod 5 and a telescopic rod 6 are fixedly arranged on the housing 1, clamping plates 7 are fixedly arranged on the first spring rod 5 and the telescopic rod 6, a linkage mechanism is arranged between the two clamping plates 7, a plurality of ejector pins 12 are fixedly arranged on the housing 1, a plurality of second spring rods 10 are fixedly arranged on the housing 1, a backing plate 11 is fixedly arranged above the plurality of second spring rods 10 together, a plurality of holes matched with the corresponding ejector pins 12 are formed in the backing plate 11, a nut 15 is rotatably arranged on the cover plate 2, a screw 14 is rotatably arranged on the nut 15 in a threaded mode, a sliding connection is arranged between the screw 14 and the cover plate 2, and a retaining plate 13 is fixedly arranged on the screw 14;
the following points are notable:
1. the rotating mechanism comprises a sliding rod 3, a first spring 4 and a groove body, the groove body is arranged on the shell 1, the sliding rod 3 is slidably arranged on the groove body, the first spring 4 is fixedly arranged between the sliding rod 3 and the groove body, the sliding rod 3 is rotationally connected with the cover plate 2, and the effect of the arrangement is to reduce the whole volume of the cover plate 2 and the shell 1.
2. The fixing mechanism comprises a clamping rod 16, a clamping groove 17, a sliding groove and a second spring 18, wherein the clamping rod 16 is slidably arranged on the cover plate 2 through the sliding groove, the second spring 18 is fixedly arranged between the clamping rod 16 and the sliding groove, the clamping groove 17 matched with the clamping rod 16 is formed in the shell 1, a separation structure matched with the clamping rod 16 next is arranged on the shell 1, and the effect of the fixing mechanism is to fix the cover plate 2 and the shell 1.
3. The disengaging structure comprises a push rod 19 and a spring III 20, the push rod 19 matched with the clamping rod 16 is slidably arranged on the shell 1, the spring III 20 is fixedly arranged between the push rod 19 and the shell 1, and the function of the disengaging structure is to facilitate the separation of the clamping rod 16 and the clamping groove 17 and the separation of the cover plate 2 and the shell 1.
4. The linkage mechanism comprises a rack 8 and a gear 9, wherein the rack 8 is fixedly arranged on each of the two clamping plates 7, the gear 9 which is meshed with the racks 8 is fixedly arranged on the shell 1, and the function of the arrangement is to ensure that a chip is positioned in the middle of the base plate 11 and ensure that the thimble 12 is aligned with a conductive plate on the chip.
5. The first limiting block is fixedly arranged on the sliding rod 3, the second limiting block matched with the first limiting block is fixedly arranged on the cover plate 2, and the function of the arrangement is to keep the cover plate 2 horizontal, so that the clamping rod 16 and the clamping groove 17 can be aligned conveniently.
Placing the chip on the base plate 11, then clamping and fixing the chip through the clamping plate 7, then covering the cover plate 2, fixing the cover plate 2 and the shell 1 under the action of the clamping rod 16 and the clamping groove 17, adjusting the contact condition of the thimble 12 and the conducting plate on the chip before detection, and enabling the screw 14 to slide on the cover plate 2 by rotating the nut 15, so that the mortgage plate 13 mortises the chip until the conducting plate on the chip is propped against the thimble 12.
The foregoing is only a preferred embodiment of the present utility model, but the scope of the present utility model is not limited thereto, and any person skilled in the art, who is within the scope of the present utility model, should make equivalent substitutions or modifications according to the technical scheme of the present utility model and the inventive concept thereof, and should be covered by the scope of the present utility model.

Claims (6)

1. The utility model provides a TO encapsulation semiconductor chip aging test anchor clamps, includes shell (1), its characterized in that, install apron (2) through rotary mechanism on shell (1), install fixed establishment between apron (2) and the shell (1), fixed mounting has a spring beam (5) and a telescopic link (6) on shell (1), equal fixed mounting has a splint (7) on spring beam (5) and telescopic link (6), two install interlock mechanism between splint (7), fixed mounting has a plurality of thimble (12) on shell (1), fixed mounting has a plurality of spring beam two (10) on shell (1), a plurality of spring beam two (10) top common fixed mounting has a backing plate (11), offer a plurality of holes with corresponding thimble (12) matched with on backing plate (11), rotate on apron (2) and install nut (15), screw thread rotation has screw rod (14) on nut (15), be fixed connection on screw rod (14) and apron (2).
2. The TO packaged semiconductor chip aging test fixture according TO claim 1, wherein the rotating mechanism comprises a sliding rod (3), a first spring (4) and a groove body, the groove body is formed in the housing (1), the sliding rod (3) is slidably mounted on the groove body, the first spring (4) is fixedly mounted between the sliding rod (3) and the groove body, and the sliding rod (3) is in rotating connection with the cover plate (2).
3. The TO packaged semiconductor chip aging test fixture according TO claim 1, wherein the fixing mechanism comprises a clamping rod (16), a clamping groove (17), a sliding groove and a second spring (18), the clamping rod (16) is slidably mounted on the cover plate (2) through the sliding groove, the second spring (18) is fixedly mounted between the clamping rod (16) and the sliding groove, the clamping groove (17) matched with the clamping rod (16) is formed in the shell (1), and a disengaging structure matched with the clamping rod (16) next is mounted on the shell (1).
4. A TO packaged semiconductor chip burn-in fixture according TO claim 3, wherein the release structure comprises a push rod (19) and a spring three (20), the push rod (19) matched with the clamping rod (16) is slidably mounted on the housing (1), and the spring three (20) is fixedly mounted between the push rod (19) and the housing (1).
5. The TO packaged semiconductor chip burn-in fixture according TO claim 1, wherein the linkage mechanism comprises racks (8) and gears (9), one rack (8) is fixedly mounted on each of the two clamping plates (7), and the gears (9) meshed with the two racks (8) are fixedly mounted on the housing (1).
6. The TO packaged semiconductor chip aging test fixture according TO claim 2, wherein a first limiting block is fixedly arranged on the sliding rod (3), and a second limiting block matched with the first limiting block is fixedly arranged on the cover plate (2).
CN202223455853.3U 2022-12-23 2022-12-23 TO packaged semiconductor chip aging test fixture Active CN219065562U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202223455853.3U CN219065562U (en) 2022-12-23 2022-12-23 TO packaged semiconductor chip aging test fixture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202223455853.3U CN219065562U (en) 2022-12-23 2022-12-23 TO packaged semiconductor chip aging test fixture

Publications (1)

Publication Number Publication Date
CN219065562U true CN219065562U (en) 2023-05-23

Family

ID=86348476

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202223455853.3U Active CN219065562U (en) 2022-12-23 2022-12-23 TO packaged semiconductor chip aging test fixture

Country Status (1)

Country Link
CN (1) CN219065562U (en)

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