CN219018821U - Top adjusting analysis circuit and active wavelength division device - Google Patents
Top adjusting analysis circuit and active wavelength division device Download PDFInfo
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- CN219018821U CN219018821U CN202320063051.3U CN202320063051U CN219018821U CN 219018821 U CN219018821 U CN 219018821U CN 202320063051 U CN202320063051 U CN 202320063051U CN 219018821 U CN219018821 U CN 219018821U
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Abstract
The utility model provides a top adjustment analysis circuit and active wavelength division equipment, wherein the top adjustment analysis circuit comprises a plurality of paths of optical signal conversion circuits and a processor, each path of optical signal conversion circuit comprises a photoelectric detection circuit, a first amplification circuit, a second amplification circuit, a first filter circuit, a second filter circuit and a shaping comparison circuit, the photoelectric detection circuit and the first amplification circuit of the same group are adopted to carry out photoelectric conversion and signal amplification, meanwhile, the first filter circuit and the second filter circuit are respectively used for realizing the filtering of optical power and top adjustment signals, and in order to ensure that the amplitude of the top adjustment signals reaches a preset value, the second amplification circuit is used for further amplifying, and the shaping comparison circuit is used for carrying out signal shaping to generate square wave type top adjustment signals, and the processor is used for realizing the acquisition of optical power and the top adjustment signals according to received electric signals and top adjustment information, so that the structures of the analysis circuit and the active wavelength division equipment are simplified and the cost is reduced.
Description
Technical Field
The utility model belongs to the technical field of semi-activity, and particularly relates to a roof-adjusting analysis circuit and active wavelength division equipment.
Background
Currently, the forward semi-active wavelength division system uses passive wavelength division devices on the side of a remote radio Unit (Remote Radio Unit, RRU) or a base station active antenna Unit (Active Antenna Unit, AAU), and uses active wavelength division devices on the side of a baseband processing Unit (Building Baseband Unit, BBU) or a base station controller Distributed Unit (DU).
The main control chip arranged on the active wavelength division device needs to be in serial communication with the gateway server, and is used for transmitting various data information acquired from the optical modules, such as optical power data of different optical modules, OAM (Operation, administration, maintenance, roof adjusting) information and the like.
In order to acquire optical power data and roof-adjusting information, a conventional optical module acquisition circuit adopts two groups of sampling circuits, such as two groups of photoelectric sensors or two groups of amplifying circuits, and the like, so that the two groups of sampling circuits acquire the optical power and the roof-adjusting information respectively, and the overall structure of the active wavelength division device is more complex and the cost is increased.
Disclosure of Invention
The utility model aims to provide a roof-adjusting analysis circuit, which aims to solve the problems of complex structure and high cost of the traditional optical module acquisition circuit.
A first aspect of an embodiment of the present utility model provides a roof-adjusting analysis circuit, including a plurality of optical signal conversion circuits and a processor, wherein the plurality of optical signal conversion circuits are connected to the processor, and each optical signal conversion circuit includes:
the photoelectric detection circuit is used for receiving the optical signals and converting the optical signals into corresponding electric signals, and the electric signals comprise superimposed high-frequency signals and top adjusting signals;
the first amplifying circuit is connected with the output end of the photoelectric detection circuit and is used for amplifying and outputting the electric signal in a preset proportion and outputting a first electric signal;
the first filter circuit is connected with the output end of the first amplifying circuit and the signal end of the processor and is used for filtering clutter signals in the first electric signals and outputting second electric signals amplified by a first stage to the processor so as to enable the processor to acquire the power of the optical signals;
the second filter circuit is connected with the output end of the first amplifying circuit and is used for filtering the high-frequency signals and clutter signals in the first electric signals and outputting the top adjusting signals after first-stage amplification;
the second amplifying circuit is connected with the output end of the second filtering circuit and is used for carrying out secondary proportional amplification output on the top adjustment signal amplified by the first stage;
and the shaping comparison circuit is connected with the output end of the second amplifying circuit and the signal end of the processor and is used for shaping and comparing the top adjustment signal after secondary amplification and outputting the shaped top adjustment signal to the processor so as to enable the processor to analyze and generate corresponding top adjustment information.
Optionally, the first amplifying circuit includes a first operational amplifier, a first resistor, a second resistor, a third resistor, and a first capacitor;
the inverting input end of the first operational amplifier, the cathode of the photoelectric detection circuit, the first end of the first capacitor and the first end of the first resistor are commonly connected, the non-inverting input end of the first operational amplifier is grounded, the second end of the first resistor, the first end of the second resistor and the first end of the third resistor are commonly connected, the second end of the second resistor is grounded, and the second end of the third resistor, the second end of the first capacitor and the output end of the first operational amplifier are commonly connected to form the output end of the first amplifying circuit.
Optionally, the second amplifying circuit includes a second operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor, and a second capacitor;
the first end of the fourth resistor is connected with the normal phase input end of the second operational amplifier to form the signal input end of the second amplifying circuit, the second end of the fourth resistor is connected with a reference voltage source, the first end of the fifth resistor is connected with the reference voltage source, the second end of the fifth resistor, the first end of the sixth resistor, the first end of the second capacitor and the inverting input end of the second operational amplifier are connected together, and the output end of the second operational amplifier, the second end of the sixth resistor and the second end of the second capacitor are connected together to form the output end of the second amplifying circuit.
Optionally, the first filter circuit includes a seventh resistor and a third capacitor;
the first end of the seventh resistor forms the input end of the first filter circuit, the second end of the seventh resistor and the first end of the third capacitor are commonly connected to form the output end of the first filter circuit, and the second end of the third capacitor is grounded.
Optionally, the second filter circuit includes an eighth resistor, a fourth capacitor, and a fifth capacitor;
the first end of the eighth resistor forms the input end of the second filter circuit, the second end of the eighth resistor, the second end of the fourth capacitor and the first end of the fifth capacitor are connected together, the second end of the fifth capacitor forms the output end of the second filter circuit, and the second end of the fourth capacitor is grounded.
Optionally, the shaping comparison circuit includes a comparator, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a sixth capacitor, and a seventh capacitor;
the first end of the ninth resistor forms the input end of the shaping comparison circuit, the second end of the ninth resistor, the first end of the tenth resistor and the normal phase input end of the comparator are connected together, the reverse phase input end of the comparator is connected with a reference voltage source, the output end of the comparator, the second end of the tenth resistor, the first end of the eleventh resistor and the first end of the sixth capacitor are connected together, the second end of the eleventh resistor is connected with a positive power supply end, the second end of the sixth capacitor is connected with the first end of the twelfth resistor, the second end of the twelfth resistor and the first end of the seventh capacitor are connected together to form the output end of the shaping comparison circuit, and the second end of the seventh capacitor is grounded.
Optionally, the processor includes:
the signal input end of each FPGA chip is connected with the output ends of the plurality of shaping comparison circuits, and the FPGA chips are used for carrying out power acquisition and signal processing on the received top adjustment signals;
the MCU chip is connected with the FPGA chips respectively, and is used for receiving signals output by the FPGA chips and analyzing and generating corresponding top adjustment information and power parameters.
Optionally, the photodetection circuit includes a photodetection component, a thirteenth resistor, and a fourteenth resistor;
the cathode of the photoelectric detection component is connected with the first end of the thirteenth resistor, the second end of the thirteenth resistor forms the output end of the photoelectric detection circuit, the anode of the photoelectric detection component is connected with the first end of the fourteenth resistor, and the second end of the fourteenth resistor is grounded.
Optionally, the photo-detection component is a photodiode or a photo-detector, and an anode and a cathode of the photodiode are respectively an anode and a cathode of the photo-detection component, or an anode and a cathode of the photo-detector are respectively an anode and a cathode of the photo-detection component.
A second aspect of an embodiment of the present utility model provides an active wavelength division device, including a roof-adjusting resolution circuit as described above.
Compared with the prior art, the embodiment of the utility model has the beneficial effects that: the top adjusting analysis circuit comprises a plurality of paths of optical signal conversion circuits and a processor, wherein each path of optical signal conversion circuit comprises a photoelectric detection circuit, a first amplifying circuit, a second amplifying circuit, a first filtering circuit, a second filtering circuit and a shaping comparison circuit, the photoelectric detection circuit and the first amplifying circuit which are in the same group are adopted for photoelectric conversion and signal amplification, meanwhile, the filtering of optical power and top adjusting signals is respectively realized through the first filtering circuit and the second filtering circuit, in order to ensure that the amplitude of the top adjusting signals reaches a preset value, the second amplifying circuit is used for further amplification, the shaping comparison circuit is used for carrying out signal shaping, square wave type top adjusting signals are generated, and the processor is used for realizing the acquisition of optical power and the top adjusting signals according to received electric signals and the top adjusting information, so that the structures of the analysis circuit and active wavelength division equipment are simplified, and the cost is reduced.
Drawings
Fig. 1 is a schematic diagram of a first module of a top adjustment resolution circuit according to an embodiment of the present utility model;
fig. 2 is a schematic diagram of a second module of a top adjustment resolution circuit according to an embodiment of the present utility model;
FIG. 3 is a schematic circuit diagram of a photo detection circuit in the crest factor reduction analysis circuit shown in FIG. 2;
fig. 4 is a schematic circuit diagram of a top adjustment resolution circuit according to an embodiment of the present utility model;
fig. 5 is a schematic block diagram of a processor in the debug parsing circuit shown in fig. 1.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the utility model is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In a first aspect of the present utility model, as shown in fig. 1, a top adjustment analyzing circuit is provided, where the top adjustment analyzing circuit is configured to analyze and obtain power and top adjustment information of optical signals sent by a plurality of optical modules, and the top adjustment analyzing circuit includes a multi-path optical signal converting circuit 100 and a processor 200, where the multi-path optical signal converting circuit 100 is connected to the processor 200, and each optical signal converting circuit 100 is configured to obtain an optical signal sent by one optical module, and obtain the power of the optical signal and the top adjustment signal superimposed in the optical signal through photoelectric conversion, amplification, and other processes.
As shown in fig. 2, each optical signal conversion circuit 100 includes:
the photoelectric detection circuit 10 is used for receiving the optical signal and converting the optical signal into a corresponding electric signal, wherein the electric signal comprises a superimposed high-frequency signal and a top adjustment signal;
the first amplifying circuit 20 is connected with the output end of the photoelectric detection circuit 10, and is used for amplifying and outputting the electric signal in a preset proportion and outputting a first electric signal;
the first filter circuit 30 is connected to the output end of the first amplifying circuit 20 and the signal end of the processor 200, and is configured to filter the clutter signal in the first electrical signal and output the second electrical signal after the first-stage amplification to the processor 200, so that the processor 200 performs power acquisition of the optical signal;
the second filter circuit 40 is connected to the output end of the first amplifying circuit 20, and is configured to filter the high-frequency signal and the clutter signal in the first electrical signal and output the top modulation signal after the first-stage amplification;
the second amplifying circuit 50 is connected with the output end of the second filtering circuit 40 and is used for carrying out secondary proportional amplification output on the top adjustment signal amplified by the first stage;
the shaping comparison circuit 60 is connected to the output end of the second amplifying circuit 50 and the signal end of the processor 200, and is configured to perform shaping comparison on the secondarily amplified crest-tone modulated signal, and output the shaped crest-tone modulated signal to the processor 200, so that the processor 200 analyzes and generates corresponding crest-tone modulated information.
In the form of a semi-active WDM apparatus, a 25G/sLDM optical module may support a roof-adjusting function, where roof-adjusting refers to that in a WDM system, a transmitting end superimposes a small-amplitude modulation signal such as a low-frequency square wave, a sine wave, etc. on each wavelength to transmit operation maintenance (OAM) information, and the optical module supporting roof-adjusting supports sending information such as performance, state, rate, wavelength, transmission distance manufacturer, upper limit/lower limit of transmitting optical power, etc. of the module to an active wavelength division apparatus through roof-adjusting signals, where an optical unit including an optical switch, a multiplexer and a demultiplexer is disposed on the active wavelength division apparatus, and the optical multiplexer is connected with a photoelectric detection component PD, for example, a photoelectric detector or a photodiode, for collecting optical signals received and transmitted by the optical module on the BBU/DC side, and roof-adjusting signals loaded on the optical module, and the active wavelength division apparatus further includes a roof-adjusting analysis circuit, where the optical power data and roof-adjusting data are obtained by the photoelectric detection component PD and sent to the processor 200, and then the processor 200 sends the information to each gateway server through the active wavelength division communication circuit, so as to implement the gateway management function of the optical module.
In order to simplify the structure of the top adjustment analysis circuit and reduce the design cost, the top adjustment analysis circuit can simultaneously collect optical power and top adjustment information, wherein each optical signal conversion circuit 100 is arranged corresponding to an optical module and is used for collecting the optical power of an optical signal sent by the optical module and the top adjustment information of a follow wave.
When the optical power and the top adjusting signal are collected, the optical signal is subjected to photoelectric conversion through the photoelectric detection circuit 10, wherein the optical signal comprises a high-frequency optical signal, a top adjusting optical signal and a clutter optical signal, the photoelectric conversion generates an electric signal, and correspondingly the electric signal comprises a corresponding high-frequency electric signal, a top adjusting electric signal and a clutter electric signal, wherein the optical signal and the electric signal generated by the corresponding conversion are weaker due to long transmission distance, signal amplification processing is required, the first amplification circuit 20 is arranged at the rear end of the photoelectric detection circuit 10, the electric signal is subjected to signal amplification processing to generate a first electric signal, correspondingly, the generated first electric signal comprises the high-frequency electric signal, the top adjusting electric signal and the clutter electric signal after the first-stage amplification, and in order to realize the power collection of the optical signal, the first filter circuit 30 is arranged, the clutter signal in the first electric signal is filtered, the second electric signal of the first electric signal is output to the processor 200, and the processor 200 performs the power collection of the optical signal transmitted by the optical module according to the size of the second electric signal.
Meanwhile, in order to obtain the top-adjusting signal, a second filter circuit 40 is provided, the second filter circuit 40 filters the first electric signal, filters the high-frequency signal and the clutter signal, and outputs the remaining top-adjusting signal, wherein, because the top-adjusting signal has smaller signal amplitude, the amplitude of the signal after the first amplification possibly does not reach the identification standard, a second amplifying circuit 50 is also provided for this purpose, and the top-adjusting signal is secondarily amplified to ensure that the top-adjusting signal reaches the preset amplitude, thereby meeting the identification requirement of the processor 200, meanwhile, because the top-adjusting signal may have deformation or be sinusoidal after optical fiber transmission, the processor 200 is difficult to identify the corresponding top-adjusting information, and therefore, after the secondary amplification, a shaping comparison circuit 60 is also provided, which shapes and compares the secondarily amplified top-adjusting signal into the corresponding pulse square wave signal, and the processor 200 decodes the pulse square wave signal to obtain the digital signal of the corresponding state frame, command frame and data frame, and determines the top-adjusting information in the top-adjusting signal according to the digital signal, and sends the digital signal to the gateway to realize the analysis of the light gateway and the monitoring function module.
Wherein, the photo-detection circuit 10 may employ a corresponding photo-detection component PD, as shown in fig. 3, optionally, the photo-detection circuit 10 includes a photo-detection component PD, a thirteenth resistor R13, and a fourteenth resistor R14;
the cathode of the photo-detection component PD is connected to the first end of the thirteenth resistor R13, the second end of the thirteenth resistor R13 forms the output end of the photo-detection circuit 10, the anode of the photo-detection component PD is connected to the first end of the fourteenth resistor R14, and the second end of the fourteenth resistor R14 is grounded.
In this embodiment, the photo detection component PD converts the optical signal into a current signal and converts the current signal into a voltage signal through the thirteenth resistor R13, wherein the output voltage signal is a voltage signal with a negative polarity.
The photo-detection assembly PD may select different types of photo-detectors and other structures according to requirements, alternatively, the photo-detection assembly PD is a photodiode or a photo-detector, the anode and the cathode of the photodiode are respectively the anode and the cathode of the photo-detection assembly PD, or the anode and the cathode of the photo-detector are respectively the anode and the cathode of the photo-detection assembly PD, and the photo-diode or the photo-detector converts the optical signal into a current signal and converts the current signal into a voltage signal through a resistor to be output to the first amplifying circuit 20 of the subsequent stage.
The amplifying circuit may employ a corresponding amplifier, and optionally, as shown in fig. 4, the first amplifying circuit 20 includes a first operational amplifier U1, a first resistor R1, a second resistor R2, a third resistor R3, and a first capacitor C1;
the inverting input end of the first operational amplifier U1, the cathode of the photoelectric detection circuit 10, the first end of the first capacitor C1 and the first end of the first resistor R1 are commonly connected, the non-inverting input end of the first operational amplifier U1 is grounded, the second end of the first resistor R1, the first end of the second resistor R2 and the first end of the third resistor R3 are commonly connected, the second end of the second resistor R2 is grounded, and the second end of the third resistor R3, the second end of the first capacitor C1 and the output end of the first operational amplifier U1 are commonly connected to form the output end of the first amplifying circuit 20.
The second amplifying circuit 50 includes a second operational amplifier U2, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a second capacitor C2;
the first end of the fourth resistor R4 and the non-inverting input end of the second operational amplifier U2 are connected to form a signal input end of the second amplifying circuit 50, the second end of the fourth resistor R4 is connected to a reference voltage source, the first end of the fifth resistor R5 is connected to the reference voltage source, the second end of the fifth resistor R5, the first end of the sixth resistor R6, the first end of the second capacitor C2 and the inverting input end of the second operational amplifier U2 are commonly connected, and the output end of the second operational amplifier U2, the second end of the sixth resistor R6 and the second end of the second capacitor C2 are commonly connected to form an output end of the second amplifying circuit 50.
In this embodiment, the first operational amplifier U1 of the photo-detection circuit 10 and the corresponding resistor and capacitor structure form an inverting amplifier, and are connected to the output end of the photo-detection circuit 10, so as to amplify the negative voltage signal output by the photo-detection circuit 10 in an inverting manner, thereby outputting the positive voltage signal, and meanwhile, the second operational amplifier U2 and the corresponding resistor and capacitor structure form an in-phase amplifier, so as to amplify the positive voltage signal in an in-phase manner, thereby outputting the top adjustment signal with the same polarity as the optical signal to the back-end processor 200, thereby obtaining the top adjustment information.
The amplification factors of the first amplifying circuit 20 and the second amplifying circuit 50 can be set correspondingly according to the requirement, and each resistance value is adjusted according to the amplification factor, so that an amplifying circuit with a corresponding amplification factor is formed.
The filter circuit may adopt a corresponding filter resistor, capacitor and other structures, and the first filter circuit 30 and the second filter circuit 40 are respectively formed by adopting a capacitor and resistor structure, as shown in fig. 4, optionally, the first filter circuit 30 includes a seventh resistor R7 and a third capacitor C3;
the first end of the seventh resistor R7 forms the input end of the first filter circuit 30, the second end of the seventh resistor R7 and the first end of the third capacitor C3 are commonly connected to form the output end of the first filter circuit 30, and the second end of the third capacitor C3 is grounded.
The second filter circuit 40 includes an eighth resistor R8, a fourth capacitor C4, and a fifth capacitor C5;
the first end of the eighth resistor R8 forms the input end of the second filter circuit 40, the second end of the eighth resistor R8, the second end of the fourth capacitor C4 and the first end of the fifth capacitor C5 are commonly connected, the second end of the fifth capacitor C5 forms the output end of the second filter circuit 40, and the second end of the fourth capacitor C4 is grounded.
In this embodiment, by changing the resistances of the resistors and the capacitors in the first filter circuit 30 and the second filter circuit 40, corresponding high-low pass filters are formed to correspondingly filter the high-frequency signals and/or the clutter signals, and generate corresponding second electrical signals and top-adjusting signals to the processor 200, so as to determine the optical power and the top-adjusting information.
The shaping comparison circuit 60 may employ a corresponding comparator U3, as shown in fig. 4, optionally, the shaping comparison circuit 60 includes a comparator U3, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a sixth capacitor C6, and a seventh capacitor C7;
the first end of the ninth resistor R9 forms the input end of the shaping comparison circuit 60, the second end of the ninth resistor R9, the first end of the tenth resistor R10 and the non-inverting input end of the comparator U3 are commonly connected, the inverting input end of the comparator U3 is connected with a reference voltage source, the output end of the comparator U3, the second end of the tenth resistor R10, the first end of the eleventh resistor R11 and the first end of the sixth capacitor C6 are commonly connected, the second end of the eleventh resistor R11 is connected with the positive power supply end, the second end of the sixth capacitor C6 and the first end of the twelfth resistor R12 are commonly connected, the second end of the twelfth resistor R12 and the first end of the seventh capacitor C7 are commonly connected to form the output end of the shaping comparison circuit 60, and the second end of the seventh capacitor C7 is grounded.
In this embodiment, the normal high-low level of the top adjustment signal is recovered by comparing the secondarily amplified top adjustment signal with the reference voltage of the reference voltage source and performing level judgment, and then the normal high-low level is input into the processor 200 for decoding through relevant data judgment and software processing, so as to obtain the corresponding top adjustment information in the top adjustment signal.
Compared with the prior art, the embodiment of the utility model has the beneficial effects that: the top adjustment analyzing circuit includes a plurality of optical signal converting circuits 100 and a processor 200, where each optical signal converting circuit 100 includes a photodetecting circuit 10, a first amplifying circuit 20, a second amplifying circuit 50, a first filtering circuit 30, a second filtering circuit 40 and a shaping comparing circuit 60, the photodetecting circuit 10 and the first amplifying circuit 20 of the same group are adopted to perform photoelectrical conversion and signal amplification, and at the same time, the filtering of optical power and top adjustment signals is implemented through the first filtering circuit 30 and the second filtering circuit 40 respectively, and in order to ensure that the amplitude of the top adjustment signals reaches a preset value, the second amplifying circuit 50 further amplifies and performs signal shaping through the shaping comparing circuit 60, so as to generate square wave type top adjustment signals, and the processor 200 implements the collection of optical power and top adjustment signals according to the received electrical signals and top adjustment information, thereby simplifying the structures of analyzing circuits and active wavelength division devices and reducing the cost.
The processor 200 may select a corresponding MCU, a single-chip microcomputer, or other structures, where, due to the number of optical modules being greater, the number of optical signal conversion circuits 100 corresponding to the optical modules in the corresponding active wavelength division devices is greater, and a single MCU is used for data statistics and processing, so that there are problems of insufficient computing power and low efficiency, and for this purpose, as shown in fig. 5, the processor 200 optionally includes:
the signal input end of each FPGA chip 210 is connected with the output ends of the plurality of shaping comparison circuits 60, and the FPGA chip 210 is used for carrying out power acquisition and signal processing on the received top adjustment signals;
the MCU chip 220, the MCU chip 220 is connected to the plurality of FPGA chips 210, and is configured to receive signals output by the FPGA chips 210, and analyze and generate corresponding topping information and power parameters.
Each FPGA chip 210 is responsible for performing signal encoding processing on the second electrical signals and the top adjustment signals output by the shaping comparison circuit 60 in the optical signal conversion circuits 100, counting and outputting optical power data and top adjustment information in the optical signals, and the MCU chip 220 is connected with each FPGA chip 210 to perform further signal processing, so as to analyze corresponding top adjustment information and power parameters, improve efficiency of data analysis, and achieve a purpose of monitoring the optical module with higher efficiency.
The utility model also provides an active wavelength division device, which comprises a top adjusting analysis circuit, and the specific structure of the top adjusting analysis circuit refers to the embodiment, and because the active wavelength division device adopts all the technical schemes of all the embodiments, the active wavelength division device at least has all the beneficial effects brought by the technical schemes of the embodiments, and the description is omitted herein.
The above embodiments are only for illustrating the technical solution of the present utility model, and not for limiting the same; although the utility model has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present utility model, and are intended to be included in the scope of the present utility model.
Claims (10)
1. The utility model provides a transfer top analytical circuit which characterized in that includes multichannel optical signal conversion circuit and treater, multichannel optical signal conversion circuit with the treater is connected, every optical signal conversion circuit includes:
the photoelectric detection circuit is used for receiving the optical signals and converting the optical signals into corresponding electric signals, and the electric signals comprise superimposed high-frequency signals and top adjusting signals;
the first amplifying circuit is connected with the output end of the photoelectric detection circuit and is used for amplifying and outputting the electric signal in a preset proportion and outputting a first electric signal;
the first filter circuit is connected with the output end of the first amplifying circuit and the signal end of the processor and is used for filtering clutter signals in the first electric signals and outputting second electric signals to the processor so that the processor can acquire the power of the optical signals;
the second filter circuit is connected with the output end of the first amplifying circuit and is used for filtering the high-frequency signals and clutter signals in the first electric signals and outputting the top adjusting signals after first-stage amplification;
the second amplifying circuit is connected with the output end of the second filtering circuit and is used for carrying out secondary proportional amplification output on the top adjustment signal amplified by the first stage;
and the shaping comparison circuit is connected with the output end of the second amplifying circuit and the signal end of the processor and is used for shaping and comparing the top adjustment signal after secondary amplification and outputting the shaped top adjustment signal to the processor so as to enable the processor to analyze and generate corresponding top adjustment information.
2. The roof-adjusting resolution circuit of claim 1, wherein the first amplification circuit comprises a first operational amplifier, a first resistor, a second resistor, a third resistor, and a first capacitor;
the inverting input end of the first operational amplifier, the cathode of the photoelectric detection circuit, the first end of the first capacitor and the first end of the first resistor are commonly connected, the non-inverting input end of the first operational amplifier is grounded, the second end of the first resistor, the first end of the second resistor and the first end of the third resistor are commonly connected, the second end of the second resistor is grounded, and the second end of the third resistor, the second end of the first capacitor and the output end of the first operational amplifier are commonly connected to form the output end of the first amplifying circuit.
3. The roof-adjusting resolution circuit of claim 1, wherein the second amplification circuit comprises a second operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor, and a second capacitor;
the first end of the fourth resistor is connected with the normal phase input end of the second operational amplifier to form the signal input end of the second amplifying circuit, the second end of the fourth resistor is connected with a reference voltage source, the first end of the fifth resistor is connected with the reference voltage source, the second end of the fifth resistor, the first end of the sixth resistor, the first end of the second capacitor and the inverting input end of the second operational amplifier are connected together, and the output end of the second operational amplifier, the second end of the sixth resistor and the second end of the second capacitor are connected together to form the output end of the second amplifying circuit.
4. The roof-adjusting resolution circuit of claim 1, wherein the first filter circuit comprises a seventh resistor and a third capacitor;
the first end of the seventh resistor forms the input end of the first filter circuit, the second end of the seventh resistor and the first end of the third capacitor are commonly connected to form the output end of the first filter circuit, and the second end of the third capacitor is grounded.
5. The roof-adjusting resolution circuit of claim 1, wherein the second filter circuit comprises an eighth resistor, a fourth capacitor, and a fifth capacitor;
the first end of the eighth resistor forms the input end of the second filter circuit, the second end of the eighth resistor, the second end of the fourth capacitor and the first end of the fifth capacitor are connected together, the second end of the fifth capacitor forms the output end of the second filter circuit, and the second end of the fourth capacitor is grounded.
6. The roof-adjusting resolution circuit of claim 1, wherein the shaping comparison circuit comprises a comparator, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a sixth capacitor, and a seventh capacitor;
the first end of the ninth resistor forms the input end of the shaping comparison circuit, the second end of the ninth resistor, the first end of the tenth resistor and the normal phase input end of the comparator are connected together, the reverse phase input end of the comparator is connected with a reference voltage source, the output end of the comparator, the second end of the tenth resistor, the first end of the eleventh resistor and the first end of the sixth capacitor are connected together, the second end of the eleventh resistor is connected with a positive power supply end, the second end of the sixth capacitor is connected with the first end of the twelfth resistor, the second end of the twelfth resistor and the first end of the seventh capacitor are connected together to form the output end of the shaping comparison circuit, and the second end of the seventh capacitor is grounded.
7. The roof-switching resolution circuit of claim 1, wherein the processor comprises:
the signal input end of each FPGA chip is connected with the output ends of the plurality of shaping comparison circuits, and the FPGA chips are used for carrying out power acquisition and signal processing on the received top adjustment signals;
the MCU chip is connected with the FPGA chips respectively, and is used for receiving signals output by the FPGA chips and analyzing and generating corresponding top adjustment information and power parameters.
8. The roof-adjusting resolution circuit of claim 1, wherein the photo-detection circuit comprises a photo-detection assembly, a thirteenth resistor, and a fourteenth resistor;
the cathode of the photoelectric detection component is connected with the first end of the thirteenth resistor, the second end of the thirteenth resistor forms the output end of the photoelectric detection circuit, the anode of the photoelectric detection component is connected with the first end of the fourteenth resistor, and the second end of the fourteenth resistor is grounded.
9. The roof-adjusting resolution circuit of claim 8, wherein the photo-detection assembly is a photodiode or a photo-detector, and the anode and the cathode of the photodiode are respectively the anode and the cathode of the photo-detection assembly or the anode and the cathode of the photo-detector are respectively the anode and the cathode of the photo-detection assembly.
10. An active wavelength division device comprising a roof-switching resolution circuit as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320063051.3U CN219018821U (en) | 2023-01-09 | 2023-01-09 | Top adjusting analysis circuit and active wavelength division device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320063051.3U CN219018821U (en) | 2023-01-09 | 2023-01-09 | Top adjusting analysis circuit and active wavelength division device |
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| CN116295986A (en) * | 2023-05-24 | 2023-06-23 | 无锡卓海科技股份有限公司 | Optical signal processing device, method and stress detection system |
| CN116295986B (en) * | 2023-05-24 | 2023-08-18 | 无锡卓海科技股份有限公司 | Optical signal processing device, method and stress detection system |
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