CN219017890U - LC band-pass filter based on LTCC technology - Google Patents
LC band-pass filter based on LTCC technology Download PDFInfo
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- CN219017890U CN219017890U CN202320021425.5U CN202320021425U CN219017890U CN 219017890 U CN219017890 U CN 219017890U CN 202320021425 U CN202320021425 U CN 202320021425U CN 219017890 U CN219017890 U CN 219017890U
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Abstract
The utility model discloses an LC band-pass filter based on LTCC technology, which relates to the technical field of microwaves and at least comprises nine conductor layers; the first conductor layer is a ground layer, the second conductor layer is an inductance circuit layer, the third conductor layer, the fourth conductor layer, the fifth conductor layer, the sixth conductor layer, the seventh conductor layer, the eighth conductor layer and the ninth conductor layer are all capacitance circuit layers, and the conductor layers are connected through metal through holes. The third conductor layer and the ninth conductor layer are input layers and output layers of the capacitor circuit and are electrically coupled with the fourth conductor layer and the eighth conductor layer to form a resonator; the second conductor layer and the fourth to eighth conductor layers form a resonator. The utility model solves the technical problem of larger space occupation area of the LC band-pass filter and reduces the volume of the LC band-pass filter.
Description
Technical Field
The utility model relates to the technical field of microwaves, in particular to an LC band-pass filter based on an LTCC technology.
Background
With the continuous development of communication technology, wireless signals in space are more and more complex, and the requirement of frequency selectivity of hardware is also more and more high. The band-pass filter can provide excellent narrowband signals for a radio frequency system, and has various design types and wide application range.
LTCC technology, i.e. low temperature co-fired ceramic technology, is a thick film technology with high stability, high quality factor and high integration level, and compared with other materials, the ceramic material has high stability and wide dielectric constant variation range, and is suitable for manufacturing microwave devices.
The LC band-pass filter is derived from a low-pass filter, so that the LC band-pass filter has the advantages of multiple auxiliary design tools, simple circuit, large three-dimensional simulation difficulty, large space occupation area and large design difficulty.
Disclosure of Invention
Aiming at the defect of large space occupation area of the LC band-pass filter, the utility model provides the LC band-pass filter based on the LTCC technology, and the technical problem of large space occupation area of the LC band-pass filter is solved and the volume of the LC band-pass filter is reduced by adopting a method of combining resonance coupling into a resonance capacitor.
In order to achieve the above object, the present utility model provides the following solutions:
an LC band-pass filter based on LTCC technology at least comprises nine conductor layers, wherein the conductor layers are all made of an LTCC printing process, and the conductor layers are connected through metal through holes; the first conductor layer is a ground layer, the second conductor layer is an inductance circuit layer, and the third conductor layer, the fourth conductor layer, the fifth conductor layer, the sixth conductor layer, the seventh conductor layer, the eighth conductor layer and the ninth conductor layer are capacitance circuit layers;
a first connecting column (19), a second connecting column (20) and a third connecting column (21) are arranged in the metal through hole;
the first conductor layer comprises a metal grounding piece (1);
the second conductor layer comprises a first inductance strip line (2), a second inductance strip line (3) and a third inductance strip line (4) in sequence from left to right;
the third conductor layer sequentially comprises a first input capacitance plate (5), a first coupling capacitance plate (6), a first connecting block (22), a second coupling capacitance plate (7) and a first output capacitance plate (8) from left to right;
the fourth conductor layer sequentially comprises a first capacitance layer plate (9), a second capacitance layer plate (10) and a third capacitance layer plate (11) from left to right;
the fifth conductor layer comprises a first grounded capacitive plate (12); a first circular opening (18) is formed in the middle of the first grounding capacitor plate (12), a first rectangular opening (16) is formed in the left part of the first grounding capacitor plate (12), and a second rectangular opening (17) is formed in the right part of the first grounding capacitor plate (12); the first round opening (18) is provided with a third connecting block (24), the first rectangular opening (16) is provided with a second connecting block (23), and the second rectangular opening (17) is provided with a fourth connecting block (25);
the sixth conductor layer sequentially comprises a first capacitance layer three plate (13), a second capacitance layer three plate (14) and a third capacitance layer three plate (15) from left to right;
the seventh conductor layer includes a second grounded capacitive plate (26); a second circular opening (29) is formed in the middle position of the second grounding capacitor plate (26), a third rectangular opening (27) is formed in the left part of the second grounding capacitor plate (26), and a fourth rectangular opening (28) is formed in the right part of the second grounding capacitor plate (26); the second round opening (29) is provided with a sixth connecting block (31), the third rectangular opening (27) is provided with a fifth connecting block (30), and the fourth rectangular opening (28) is provided with a seventh connecting block (32);
the eighth conductor layer sequentially comprises a first capacitance layer five plate (33), a second capacitance layer five plate (34) and a third capacitance layer five plate (35) from left to right;
the ninth conductor layer sequentially comprises a second input capacitor plate (36), a third coupling capacitor plate (37), an eighth connecting block (40), a fourth coupling capacitor plate (38) and a second output capacitor plate (39) from left to right;
the first inductance strip line (2), the first capacitance layer one plate (9), the first grounding capacitance plate (12), the first capacitance layer three plate (13), the second grounding capacitance plate (26) and the first capacitance layer five plate (33) are combined into a first resonator through the first connecting column (19);
the second inductance strip line (3), the second capacitance layer one plate (10), the first grounding capacitance plate (12), the second capacitance layer three plate (14), the second grounding capacitance plate (26) and the second capacitance layer five plate (34) are combined into a second resonator through a second connecting column (20);
the third inductance strip line (4), the third capacitance layer one plate (11), the first grounding capacitance plate (12), the third capacitance layer three plate (15), the second grounding capacitance plate (26) and the third capacitance layer five plate (35) are combined into a third resonator through the third connecting column (21);
the first resonator and the second resonator are symmetrically arranged.
Optionally, the first input capacitor plate (5) is coupled with the first capacitor layer one plate (9), the first coupling capacitor plate (6) is coupled with the second capacitor layer one plate (10), the second coupling capacitor plate (7) is coupled with the second capacitor layer one plate (10), and the first output capacitor plate (8) is coupled with the third capacitor layer one plate (11);
-the second input capacitive plate (36) is coupled to the first capacitive layer pentad (33), the third coupling capacitive plate (37) is coupled to the second capacitive layer pentad (34), the fourth coupling capacitive plate (38) is coupled to the second capacitive layer pentad (34), the second output capacitive plate (39) is coupled to the third capacitive layer pentad (35);
the first coupling capacitor plate (6) and the third coupling capacitor plate (37) are connected with the first resonator through a first connecting column (19);
the second coupling capacitor plate (7) and the fourth coupling capacitor plate (38) are connected to the third resonator via the third connecting post (21).
Optionally, the fifth conductor layer and the seventh conductor layer adopt a defected ground structure.
Optionally, the third conductor layer and the ninth conductor layer are identical in printed circuit, the fourth conductor layer and the eighth conductor layer are identical in printed circuit, and the fifth conductor layer and the seventh conductor layer are identical in printed circuit.
Optionally, the first connecting column (19) comprises a first column, a second column and a third column; one end of the first column is connected with the first inductance strip line (2), the other end of the first column sequentially penetrates through the first input capacitance plate (5), the first capacitance layer one plate (9) is connected with one side surface of the second connection block (23), one end of the second column is connected with the other side surface of the second connection block (23), the other end of the second column penetrates through the first capacitance layer three plate (13) to be connected with one side surface of the fifth connection block (30), one end of the third column is connected with the other side surface of the fifth connection block (30), and the other end of the third column penetrates through the first capacitance layer five plate (33) to be connected with the third coupling capacitance plate (37);
the second connecting column (19) comprises a fourth column, a fifth column, a sixth column and a seventh column; one end of the fourth column is connected with the third inductance strip line (4), the other end of the fourth column is connected with one side surface of the first connecting block (22), one end of the fifth column is connected with the other side surface of the first connecting block (22), the other end of the fifth column passes through the second capacitance layer one plate (10) to be connected with one side surface of the third connecting block (24), one end of the sixth column is connected with the other side surface of the third connecting block (24), the other end of the sixth column passes through the second capacitance layer three plate (14) to be connected with one side surface of the sixth connecting block (31), one end of the seventh column is connected with the other side surface of the sixth connecting block (31), and the other end of the seventh column passes through the second capacitance layer five plate (34) to be connected with the eighth connecting block (40);
the third connecting column (21) comprises an eighth column, a ninth column and a tenth column; one end of the eighth column is connected with the third inductance strip line (4), the other end of the eighth column sequentially penetrates through the second coupling capacitor plate (7), the third capacitor layer one plate (11) is connected with one side face of the fourth connecting block (25), one end of the ninth column is connected with the other side face of the fourth connecting block (25), the other end of the ninth column penetrates through the third capacitor layer three plate (15) to be connected with one side face of the seventh connecting block (32), one end of the tenth column is connected with the other side face of the seventh connecting block (32), and the other end of the tenth column penetrates through the third capacitor layer five plate (35) to be connected with the fourth coupling capacitor plate (38).
Optionally, the first inductive stripline (2) and the third inductive stripline (4) are symmetrically arranged; the first coupling capacitor plate (6) and the second coupling capacitor plate (7) are symmetrically arranged; the first input capacitance plate (5) and the first output capacitance plate (8) are symmetrically arranged; the first capacitance layer one plate (9) and the third capacitance layer one plate (11) are symmetrically arranged; the second connecting block (23) and the fourth connecting block (25) are symmetrically arranged; the first capacitance layer three plate (13) and the third capacitance layer three plate (15) are symmetrically arranged; the sixth connecting block (31) and the seventh connecting block (32) are symmetrically arranged; the first capacitance layer five plates (33) and the third capacitance layer five plates (35) are symmetrically arranged; the second input capacitor plate (36) and the second output capacitor plate (39) are symmetrically arranged; the third coupling capacitor plate (37) and the fourth coupling capacitor plate (38) are symmetrically arranged.
Optionally, the LC band pass filter further comprises an outer electrode; the external electrode comprises an input port, a first grounding port, an output port and a second grounding port;
the input port is respectively connected with the first input capacitor plate (5) and the second input capacitor plate (36), the output port is respectively connected with the first output capacitor plate (8) and the second output capacitor plate (39), the first grounding port is respectively connected with the first grounding capacitor plate (12) and the second grounding capacitor plate (26), and the second grounding port is respectively connected with the first grounding capacitor plate (12) and the second grounding capacitor plate (26) and the first inductance strip line (2), the second inductance strip line (3) and the third inductance strip line (4).
Optionally, the input port and the output port are symmetrically arranged, and the first ground port and the second ground port are symmetrically arranged; wherein the input port and the output port are both 50 ohm impedance ports.
Optionally, the LC band pass filter further comprises at least eight dielectric substrate layers; the dielectric substrate layers are LTCC ceramic dielectric substrates.
Optionally, the LC band pass filter has dimensions of 3.2mm x 1.6mm x 0.94mm;
the line width of the inner conductor is not less than 100 mu m;
the conductor line spacing is not less than 100 mu m;
the diameter of the metal through hole is not smaller than 100 mu m;
the distance between the conductor layers is not less than 20 μm.
According to the specific embodiment provided by the utility model, the utility model discloses the following technical effects:
according to the LC band-pass filter based on the LTCC technology, the lumped structure is adopted for design, and the size of the LC band-pass filter is reduced and the performance of the LC band-pass filter is improved by optimizing the space position of the capacitor.
In addition, the utility model adopts symmetrical design, the circuit structure is simple and symmetrical, and the design and development are convenient; the microwave device manufactured by utilizing the LTCC process has good high-temperature resistance, can bear larger current, can be manufactured into dozens of layers of substrates, and is embedded with passive devices, so that the interference of other assembly elements is reduced, and the integration level is improved.
Therefore, the utility model realizes the characteristics of small size, simple structure, good stability, high reliability, high temperature resistance and good material consistency of the element under the requirement of realizing the electric performance of the filter.
Drawings
In order to more clearly illustrate the embodiments of the present utility model or the technical solutions of the prior art, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic layered diagram of an LC band pass filter according to an embodiment of the present utility model;
fig. 2 is a schematic top view of a first conductor layer of an LC band pass filter according to an embodiment of the present utility model;
fig. 3 is a schematic top view of a second conductor layer of an LC band pass filter according to an embodiment of the present utility model;
fig. 4 is a schematic top view of a third conductor layer/a ninth conductor layer of an LC band pass filter according to an embodiment of the present utility model;
fig. 5 is a schematic top view of a fourth conductor layer/eighth conductor layer of an LC band pass filter according to an embodiment of the present utility model;
fig. 6 is a schematic top view of a fifth conductor layer/seventh conductor layer of an LC band pass filter according to an embodiment of the present utility model;
fig. 7 is a schematic top view of a sixth conductor layer of an LC band pass filter according to an embodiment of the present utility model;
FIG. 8 is a schematic diagram of an external electrode of an LC band-pass filter according to an embodiment of the present utility model;
fig. 9 is a frequency response curve of an LC band pass filter according to an embodiment of the present utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
In order that the above-recited objects, features and advantages of the present utility model will become more readily apparent, a more particular description of the utility model will be rendered by reference to the appended drawings and appended detailed description.
The embodiments of the present disclosure provide an LC band pass filter based on LTCC technology, where the foregoing filter structure is an improvement over lumped filters. Aiming at the defects of large volume and large design difficulty of the original LC filter, the utility model realizes simulation simplification and volume reduction.
As shown in fig. 1, the LC band-pass filter provided in this illustrative example includes at least eight dielectric substrate layers and nine conductor layers, each of which employs LTCC printing. The dielectric substrate layers are LTCC ceramic dielectric substrates. The conductor layers are connected through metal through holes; the first conductor layer is a ground layer, the second conductor layer is an inductance circuit layer, and the third conductor layer, the fourth conductor layer, the fifth conductor layer, the sixth conductor layer, the seventh conductor layer, the eighth conductor layer and the ninth conductor layer are capacitance circuit layers.
The capacitive circuit adopts a broadside coupling mode to transmit electromagnetic energy. The third conductor layer and the ninth conductor layer are input layers and output layers of the capacitor circuit and are electrically coupled with the fourth conductor layer and the eighth conductor layer to form a resonator; the second conductor layer and the fourth to eighth conductor layers form a resonator.
As shown in fig. 2 to 7, the first conductor layer L1 includes a metal ground plate 1.
The second conductor layer L2 comprises, in order from left to right, a first inductive stripline 2, a second inductive stripline 3 and a third inductive stripline 4.
The third conductor layer L3 includes, in order from left to right, a first input capacitance plate 5, a first coupling capacitance plate 6, a first connection block 22, a second coupling capacitance plate 7, and a first output capacitance plate 8.
The fourth conductor layer L4 includes, in order from left to right, a first capacitance layer one plate 9, a second capacitance layer one plate 10, and a third capacitance layer one plate 11.
The fifth conductor layer L5 includes a first grounded capacitance plate 12; a first circular opening 18 is formed in the middle of the first grounding capacitor plate 12, a first rectangular opening 16 is formed in the left part of the first grounding capacitor plate 12, and a second rectangular opening 17 is formed in the right part of the first grounding capacitor plate 12; the first circular opening 18 is provided with a third connection block 24, the first rectangular opening 16 is provided with a second connection block 23, and the second rectangular opening 17 is provided with a fourth connection block 25.
The sixth conductor layer L6 includes, in order from left to right, a first capacitance layer three plate 13, a second capacitance layer three plate 14, and a third capacitance layer three plate 15.
The seventh conductor layer L7 includes a second grounded capacitance plate 26; a second circular opening 29 is formed in the middle position of the second grounding capacitor plate 26, a third rectangular opening 27 is formed in the left part of the second grounding capacitor plate 26, and a fourth rectangular opening 28 is formed in the right part of the second grounding capacitor plate 26; the second circular opening 29 is provided with a sixth connection block 31, the third rectangular opening 27 is provided with a fifth connection block 30, and the fourth rectangular opening 28 is provided with a seventh connection block 32.
The eighth conductor layer L8 includes, in order from left to right, a first capacitance layer fifth plate 33, a second capacitance layer fifth plate 34, and a third capacitance layer fifth plate 35.
The ninth conductor layer L9 includes, in order from left to right, a second input capacitor plate 36, a third coupling capacitor plate 37, an eighth connection block 40, a fourth coupling capacitor plate 38, and a second output capacitor plate 39.
The first inductance strip line 2, the first capacitance layer one plate 9, the first ground capacitance plate 12, the first capacitance layer three plate 13, the second ground capacitance plate 26 and the first capacitance layer five plate 33 are combined into a first resonator through the first connecting post 19.
The second inductance strip line 3, the second capacitance layer one plate 10, the first grounding capacitance plate 12, the second capacitance layer three plate 14, the second grounding capacitance plate 26 and the second capacitance layer five plate 34 are combined into a second resonator through a second connecting post 20.
The third inductance strip line 4, the third capacitance layer one plate 11, the first ground capacitance plate 12, the third capacitance layer three plate 15, the second ground capacitance plate 26 and the third capacitance layer five plate 35 are combined into a third resonator through the third connection post 21.
The first resonator and the second resonator are symmetrically arranged, and specifically: the first inductance strip line 2 and the third inductance strip line 4 are symmetrically arranged; the first coupling capacitor plate 6 and the second coupling capacitor plate 7 are symmetrically arranged; the first input capacitance plate 5 and the first output capacitance plate 8 are symmetrically arranged; the first capacitance layer one plate 9 and the third capacitance layer one plate 11 are symmetrically arranged; the second connecting block 23 and the fourth connecting block 25 are symmetrically arranged; the first capacitance layer three plate 13 and the third capacitance layer three plate 15 are symmetrically arranged; the sixth connecting block 31 and the seventh connecting block 32 are symmetrically arranged; the first capacitance layer fifth plate 33 and the third capacitance layer fifth plate 35 are symmetrically arranged; the second input capacitor plate 36 and the second output capacitor plate 39 are symmetrically arranged; the third coupling capacitor plate 37 and the fourth coupling capacitor plate 38 are symmetrically arranged.
Further, the first input capacitor plate 5 is coupled to the first capacitor layer plate 9, the first coupling capacitor plate 6 is coupled to the second capacitor layer plate 10, the second coupling capacitor plate 7 is coupled to the second capacitor layer plate 10, and the first output capacitor plate 8 is coupled to the third capacitor layer plate 11.
The second input capacitor plate 36 is coupled to the first capacitor layer plate 33, the third coupling capacitor plate 37 is coupled to the second capacitor layer plate 34, the fourth coupling capacitor plate 38 is coupled to the second capacitor layer plate 34, and the second output capacitor plate 39 is coupled to the third capacitor layer plate 35.
The first coupling capacitor plate 6 and the third coupling capacitor plate 37 are both connected to the first resonator via a first connection post 19. The second coupling capacitor plate 7 and the fourth coupling capacitor plate 38 are connected to the third resonator through the third connection post 21.
Further, the fifth conductor layer L5 and the seventh conductor layer L7 adopt a defective structure. Adopting a defected ground structure shielding layer to inhibit higher harmonics of signals
The third conductor layer L3 and the ninth conductor layer L9 have the same printed circuit, the fourth conductor layer L4 and the eighth conductor layer L8 have the same printed circuit, and the fifth conductor layer L5 and the seventh conductor layer L7 have the same printed circuit.
Further, the first connecting column 19 includes a first column, a second column, and a third column; one end of the first column is connected with the first inductance strip line 2, the other end of the first column sequentially passes through the first input capacitance plate 5, the first capacitance layer one plate 9 is connected with one side of the second connection block 23, one end of the second column is connected with the other side of the second connection block 23, the other end of the second column passes through the first capacitance layer three plate 13 and is connected with one side of the fifth connection block 30, one end of the third column is connected with the other side of the fifth connection block 30, and the other end of the third column passes through the first capacitance layer five plate 33 and is connected with the third coupling capacitance plate 37.
The second connecting column 19 includes a fourth column, a fifth column, a sixth column, and a seventh column; one end of the fourth column is connected with the third inductance strip line 4, the other end of the fourth column is connected with one side of the first connection block 22, one end of the fifth column is connected with the other side of the first connection block 22, the other end of the fifth column passes through the second capacitance layer one plate 10 to be connected with one side of the third connection block 24, one end of the sixth column is connected with the other side of the third connection block 24, the other end of the sixth column passes through the second capacitance layer three plate 14 to be connected with one side of the sixth connection block 31, one end of the seventh column is connected with the other side of the sixth connection block 31, and the other end of the seventh column passes through the second capacitance layer five plate 34 to be connected with the eighth connection block 40.
The third connecting column 21 includes an eighth column, a ninth column, and a tenth column; one end of the eighth column is connected with the third inductance strip line 4, the other end of the eighth column sequentially passes through the second coupling capacitor plate 7, the first plate 11 of the third capacitor layer is connected with one side of the fourth connecting block 25, one end of the ninth column is connected with the other side of the fourth connecting block 25, the other end of the ninth column passes through the third capacitor layer three plate 15 and is connected with one side of the seventh connecting block 32, one end of the tenth column is connected with the other side of the seventh connecting block 32, and the other end of the tenth column passes through the fifth plate 35 of the third capacitor layer and is connected with the fourth coupling capacitor plate 38.
Further, the LC band-pass filter further comprises an external electrode; as shown in fig. 8, the external electrode adopts a four-port structure; the external electrode includes an input port P1, a first ground port P2, an output port P3, and a second ground port P4.
The input port P1 is connected to the first input capacitor plate 5 and the second input capacitor plate 36, the output port P3 is connected to the first output capacitor plate 8 and the second output capacitor plate 39, the first ground port P2 is connected to the first ground capacitor plate 12 and the second ground capacitor plate 26, and the second ground port P4 is connected to the first ground capacitor plate 12, the second ground capacitor plate 26, the first inductance strip line 2, the second inductance strip line 3, and the third inductance strip line 4.
The input port P1 and the output port P3 are symmetrically arranged, and the first ground port P2 and the second ground port P4 are symmetrically arranged.
The metal grounding plate 1 is connected with the first grounding port P2 and the second grounding port (P4), and plays a role of a shielding layer. The input port P1 and the output port P3 are both 50 ohm impedance ports.
Further, the LC band-pass filter adopts a 9-layer printed circuit structure based on an LTCC process, and the size of the LC band-pass filter is 3.2mm multiplied by 1.6mm multiplied by 0.94mm; the line width of the inner conductor (i.e. the width of all conductor lines inside the device) is not less than 100 μm; the conductor line spacing (i.e., the spacing of all conductor lines within the device) is not less than 100 μm; the diameter of the metal through hole is not smaller than 100 mu m; the distance between the conductor layers is not less than 20 μm.
Fig. 9 is a frequency response characteristic diagram of an LC band pass filter according to an embodiment of the present utility model, with frequency on the abscissa and loss on the ordinate. As can be seen from the test curve, the working frequency band of the LC band-pass filter is 2.4 GHz-2.55 GHz, the insertion loss is better than-2 dB, the return loss of the input port is better than-20 dB, the attenuation of the upper stop band range DC-2 GHz is smaller than-20 dB, and the attenuation of the lower stop band range 3.8 GHz-8 GHz is smaller than-20 dB.
The LC band-pass filter provided by the utility model improves the integration level of the filter by adjusting the position and the size of the capacitance of the resonant device. The method is realized by adopting the LTCC technology, has the advantages of small element volume, high temperature resistance of the element, low processing cost, good working stability, good material consistency, good environmental protection and the like, and can be widely applied to the fields of base stations in microwave bands, internet of things and the like.
In this description, each embodiment is described in a progressive manner, and each embodiment focuses on the difference from other embodiments, and the same similar parts between the embodiments are all enough to refer to each other.
The principles and embodiments of the present utility model have been described herein with reference to specific examples, the description of which is intended only to assist in understanding the methods of the present utility model and the core ideas thereof; also, it is within the scope of the present utility model to be modified by those of ordinary skill in the art in light of the present teachings. In view of the foregoing, this description should not be construed as limiting the utility model.
Claims (10)
1. The LC band-pass filter based on the LTCC technology is characterized by at least comprising nine conductor layers, wherein the conductor layers are all manufactured by adopting an LTCC printing process, and the conductor layers are connected through metal through holes; the first conductor layer is a ground layer, the second conductor layer is an inductance circuit layer, and the third conductor layer, the fourth conductor layer, the fifth conductor layer, the sixth conductor layer, the seventh conductor layer, the eighth conductor layer and the ninth conductor layer are capacitance circuit layers;
a first connecting column (19), a second connecting column (20) and a third connecting column (21) are arranged in the metal through hole;
the first conductor layer comprises a metal grounding piece (1);
the second conductor layer comprises a first inductance strip line (2), a second inductance strip line (3) and a third inductance strip line (4) in sequence from left to right;
the third conductor layer sequentially comprises a first input capacitance plate (5), a first coupling capacitance plate (6), a first connecting block (22), a second coupling capacitance plate (7) and a first output capacitance plate (8) from left to right;
the fourth conductor layer sequentially comprises a first capacitance layer plate (9), a second capacitance layer plate (10) and a third capacitance layer plate (11) from left to right;
the fifth conductor layer comprises a first grounded capacitive plate (12); a first circular opening (18) is formed in the middle of the first grounding capacitor plate (12), a first rectangular opening (16) is formed in the left part of the first grounding capacitor plate (12), and a second rectangular opening (17) is formed in the right part of the first grounding capacitor plate (12); the first round opening (18) is provided with a third connecting block (24), the first rectangular opening (16) is provided with a second connecting block (23), and the second rectangular opening (17) is provided with a fourth connecting block (25);
the sixth conductor layer sequentially comprises a first capacitance layer three plate (13), a second capacitance layer three plate (14) and a third capacitance layer three plate (15) from left to right;
the seventh conductor layer includes a second grounded capacitive plate (26); a second circular opening (29) is formed in the middle position of the second grounding capacitor plate (26), a third rectangular opening (27) is formed in the left part of the second grounding capacitor plate (26), and a fourth rectangular opening (28) is formed in the right part of the second grounding capacitor plate (26); the second round opening (29) is provided with a sixth connecting block (31), the third rectangular opening (27) is provided with a fifth connecting block (30), and the fourth rectangular opening (28) is provided with a seventh connecting block (32);
the eighth conductor layer sequentially comprises a first capacitance layer five plate (33), a second capacitance layer five plate (34) and a third capacitance layer five plate (35) from left to right;
the ninth conductor layer sequentially comprises a second input capacitor plate (36), a third coupling capacitor plate (37), an eighth connecting block (40), a fourth coupling capacitor plate (38) and a second output capacitor plate (39) from left to right;
the first inductance strip line (2), the first capacitance layer one plate (9), the first grounding capacitance plate (12), the first capacitance layer three plate (13), the second grounding capacitance plate (26) and the first capacitance layer five plate (33) are combined into a first resonator through the first connecting column (19);
the second inductance strip line (3), the second capacitance layer one plate (10), the first grounding capacitance plate (12), the second capacitance layer three plate (14), the second grounding capacitance plate (26) and the second capacitance layer five plate (34) are combined into a second resonator through a second connecting column (20);
the third inductance strip line (4), the third capacitance layer one plate (11), the first grounding capacitance plate (12), the third capacitance layer three plate (15), the second grounding capacitance plate (26) and the third capacitance layer five plate (35) are combined into a third resonator through the third connecting column (21);
the first resonator and the second resonator are symmetrically arranged.
2. LC bandpass filter based on LTCC technology according to claim 1, characterized in that the first input capacitive plate (5) is coupled with the first capacitive layer one plate (9), the first coupling capacitive plate (6) is coupled with the second capacitive layer one plate (10), the second coupling capacitive plate (7) is coupled with the second capacitive layer one plate (10), the first output capacitive plate (8) is coupled with the third capacitive layer one plate (11);
-the second input capacitive plate (36) is coupled to the first capacitive layer pentad (33), the third coupling capacitive plate (37) is coupled to the second capacitive layer pentad (34), the fourth coupling capacitive plate (38) is coupled to the second capacitive layer pentad (34), the second output capacitive plate (39) is coupled to the third capacitive layer pentad (35);
the first coupling capacitor plate (6) and the third coupling capacitor plate (37) are connected with the first resonator through a first connecting column (19);
the second coupling capacitor plate (7) and the fourth coupling capacitor plate (38) are connected to the third resonator via the third connecting post (21).
3. An LC bandpass filter based on LTCC technology according to claim 1 or 2, characterized in that the fifth and seventh conductor layers are structured defectively.
4. An LC bandpass filter based on LTCC technology according to claim 1 or 2, characterized in that the third conductor layer is identical to the printed circuit of the ninth conductor layer, the fourth conductor layer is identical to the printed circuit of the eighth conductor layer, and the fifth conductor layer is identical to the printed circuit of the seventh conductor layer.
5. An LC band pass filter based on LTCC technology according to claim 1 or 2, characterized in that said first connection post (19) comprises a first post, a second post and a third post; one end of the first column is connected with the first inductance strip line (2), the other end of the first column sequentially penetrates through the first input capacitance plate (5), the first capacitance layer one plate (9) is connected with one side surface of the second connection block (23), one end of the second column is connected with the other side surface of the second connection block (23), the other end of the second column penetrates through the first capacitance layer three plate (13) to be connected with one side surface of the fifth connection block (30), one end of the third column is connected with the other side surface of the fifth connection block (30), and the other end of the third column penetrates through the first capacitance layer five plate (33) to be connected with the third coupling capacitance plate (37);
the second connecting column (20) comprises a fourth column, a fifth column, a sixth column and a seventh column; one end of the fourth column is connected with the third inductance strip line (4), the other end of the fourth column is connected with one side surface of the first connecting block (22), one end of the fifth column is connected with the other side surface of the first connecting block (22), the other end of the fifth column passes through the second capacitance layer one plate (10) to be connected with one side surface of the third connecting block (24), one end of the sixth column is connected with the other side surface of the third connecting block (24), the other end of the sixth column passes through the second capacitance layer three plate (14) to be connected with one side surface of the sixth connecting block (31), one end of the seventh column is connected with the other side surface of the sixth connecting block (31), and the other end of the seventh column passes through the second capacitance layer five plate (34) to be connected with the eighth connecting block (40);
the third connecting column (21) comprises an eighth column, a ninth column and a tenth column; one end of the eighth column is connected with the third inductance strip line (4), the other end of the eighth column sequentially penetrates through the second coupling capacitor plate (7), the third capacitor layer one plate (11) is connected with one side face of the fourth connecting block (25), one end of the ninth column is connected with the other side face of the fourth connecting block (25), the other end of the ninth column penetrates through the third capacitor layer three plate (15) to be connected with one side face of the seventh connecting block (32), one end of the tenth column is connected with the other side face of the seventh connecting block (32), and the other end of the tenth column penetrates through the third capacitor layer five plate (35) to be connected with the fourth coupling capacitor plate (38).
6. LC band-pass filter based on LTCC technology according to claim 1 or 2, characterized in that the first inductive stripline (2) and the third inductive stripline (4) are symmetrically arranged; the first coupling capacitor plate (6) and the second coupling capacitor plate (7) are symmetrically arranged; the first input capacitance plate (5) and the first output capacitance plate (8) are symmetrically arranged; the first capacitance layer one plate (9) and the third capacitance layer one plate (11) are symmetrically arranged; the second connecting block (23) and the fourth connecting block (25) are symmetrically arranged; the first capacitance layer three plate (13) and the third capacitance layer three plate (15) are symmetrically arranged; the sixth connecting block (31) and the seventh connecting block (32) are symmetrically arranged; the first capacitance layer five plates (33) and the third capacitance layer five plates (35) are symmetrically arranged; the second input capacitor plate (36) and the second output capacitor plate (39) are symmetrically arranged; the third coupling capacitor plate (37) and the fourth coupling capacitor plate (38) are symmetrically arranged.
7. An LC band pass filter based on LTCC technology according to claim 1 or 2, characterized in that the LC band pass filter further comprises an outer electrode; the external electrode comprises an input port, a first grounding port, an output port and a second grounding port;
the input port is respectively connected with the first input capacitor plate (5) and the second input capacitor plate (36), the output port is respectively connected with the first output capacitor plate (8) and the second output capacitor plate (39), the first grounding port is respectively connected with the first grounding capacitor plate (12) and the second grounding capacitor plate (26), and the second grounding port is respectively connected with the first grounding capacitor plate (12) and the second grounding capacitor plate (26) and the first inductance strip line (2), the second inductance strip line (3) and the third inductance strip line (4).
8. The LC band pass filter based on LTCC technology as recited in claim 7, wherein said input port and said output port are symmetrically disposed, and said first ground port and said second ground port are symmetrically disposed; wherein the input port and the output port are both 50 ohm impedance ports.
9. An LC band pass filter based on LTCC technology as claimed in claim 1 or 2, wherein the LC band pass filter further comprises at least eight dielectric substrate layers; the dielectric substrate layers are LTCC ceramic dielectric substrates.
10. LC band-pass filter based on LTCC technology according to claim 1 or 2, characterized in that the dimensions of the LC band-pass filter are 3.2mm x 1.6mm x 0.94mm;
the line width of the inner conductor is not less than 100 mu m;
the conductor line spacing is not less than 100 mu m;
the diameter of the metal through hole is not smaller than 100 mu m;
the distance between the conductor layers is not less than 20 μm.
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