CN218941183U

CN218941183U - Dual-polarized single local oscillator output frequency demultiplier

Info

Publication number: CN218941183U
Application number: CN202222005910.1U
Authority: CN
Inventors: 刘建华
Original assignee: Individual
Current assignee: Individual
Priority date: 2022-08-01
Filing date: 2022-08-01
Publication date: 2023-04-28
Anticipated expiration: 2032-08-01

Abstract

The utility model discloses a dual-polarized single local oscillator output frequency demultiplier, wherein the signal output end of an RF-left-hand antenna is connected with the signal input end of a first primary low noise amplifier, the signal output end of a second primary low noise amplifier is connected with the other input end of a phase-locked loop IC, the output end of the phase-locked loop IC is connected with the signal input end of an LC band-pass filter, the output end of the LC band-pass filter is connected with one signal input end of a microstrip different frequency synthesis coupler, the signal output end of a Beidou antenna module is connected with the signal input end of a third primary or secondary low noise amplifier, the signal output end of the third primary or secondary low noise amplifier is connected with the signal input end of the LC filter, and the signal output end of the LC filter is connected with the other signal input end of the microstrip different frequency synthesis coupler. The frequency reducer has the advantages of simple circuit structure, low cost, economy, practicability and the like.

Description

Dual-polarized single local oscillator output frequency demultiplier

Technical Field

The utility model relates to the technical field of television signal processing devices, in particular to a dual-polarized single local oscillator output frequency demultiplier.

Background

The working principle of satellite antenna for receiving satellite television is to collect weak satellite signals by using satellite antenna and reflect the satellite signals to low noise frequency demultiplier installed at focal point of dish antenna. The low noise down converter then amplifies the concentrated signal and reduces the rf frequency to an intermediate frequency of 950MHz to 1450MHz, which is then transmitted via cable to an indoor receiver or digital set top box. The receiver selects the channel to be watched in the signal, and then inputs the channel to the television to play the program after amplifying, demodulating and restoring the channel to be watched in the signal into image and sound signals.

The early C-band frequency demultiplier is large in size, and the circuit is weak in anti-interference capability, such as 5G signals in the 5G age: the 3.4GHz, 3.5GHz, 3.6GHz and 4.8GHz are all interfered with the previous products, and the audience watching television programs can have interference mosaics, so that the use is inconvenient and the watching effect is poor. The local oscillation frequency is generated by DR, and in the weather, the vibration frequency drifts easily (leads to unable normal receiving television signal), and moreover, the frequency modulation production process of adopting tuning gong nail is complicated. The KU band Beidou positioning frequency reducer has high frequency and is not easy to be interfered, only a crystal oscillator phase-locked loop IC is arranged, the influence of weather high and low temperature on the oscillation frequency is avoided, and the viewing effect is stable; meanwhile, the Beidou satellite positioning technology in China is adopted, so that the problem that televisions are difficult to watch in remote villages is solved, and urban cable television and network television operation are not interfered.

Disclosure of Invention

The utility model aims to solve the technical problem of providing a dual-polarized single local oscillator output frequency demultiplier with simple circuit structure and low cost.

In order to solve the technical problems, the utility model adopts the following technical scheme: a dual polarized single local oscillator output frequency demultiplier is characterized in that: the signal output end of the RF-left-handed antenna is connected with the signal input end of the first primary low-noise amplifier, the signal output end of the first primary low-noise amplifier is connected with one input end of the phase-locked loop IC, the signal output end of the RF-right-handed antenna is connected with the signal input end of the second primary low-noise amplifier, the signal output end of the second primary low-noise amplifier is connected with the other input end of the phase-locked loop IC, the output end of the phase-locked loop IC is connected with the signal input end of the LC band-pass filter, the output end of the LC band-pass filter is connected with one signal input end of the microstrip pilot frequency synthesis coupler, the signal output end of the Beidou antenna module is connected with the signal input end of the third primary or secondary low-noise amplifier, the signal output end of the third primary or secondary low-noise amplifier is connected with the signal input end of the LC filter, the signal output end of the LC filter is connected with the other signal input end of the microstrip pilot frequency synthesis coupler, and the output end of the pilot frequency synthesis coupler is connected with the F joint.

The further technical proposal is that: the output end of the RF-left-handed antenna E2 is divided into two paths, the first path is connected with the grid electrode of the field effect tube Q1, the second path is connected with the 2 pin of the UTL3568 type phase-locked loop through a resistor R2, the source electrode of the Q1 is grounded, the drain electrode of the Q1 is divided into three paths, the first path is connected with the 4 pin of the phase-locked loop after passing through a capacitor C5 and a first LC band-pass filter in sequence, the second path is connected with the 3 pin of the phase-locked loop, and the third path is grounded through the capacitor C4;

the output end of the RF-dextrorotatory antenna E1 is divided into two paths, the first path is connected with the grid electrode of a field effect tube Q2, the second path is connected with the 9 pin of a UTL3568 type phase-locked loop through a resistor R3, the source electrode of the Q2 is grounded, the drain electrode of the Q2 is divided into three paths, the first path is connected with the 7 pin of the phase-locked loop after passing through a capacitor C17 and a second LC band-pass filter in sequence, the second path is connected with the 8 pin of the phase-locked loop, and the third path is grounded through a capacitor C19;

the 11 pin of the phase-locked loop is divided into two paths through a resistor R7, the first path is grounded through a resistor R8, and the second path is connected with one signal input end of the microstrip different-frequency synthesis coupler after passing through a capacitor C7, a capacitor C9, a capacitor C12, a capacitor C15 and a capacitor C17 in sequence;

the Beidou antenna E3 (receiving a 1-wavelength metal wire with the Beidou frequency of 4 minutes) is connected with a 3 pin of a first AT2659S type amplifier after passing through a capacitor C21 and an inductor L1 in sequence, and the 4 pin and the 5 pin of the first AT2659S type amplifier are connected with a power supply; the 6 pins of the first AT2659S type amplifier are connected with the 3 pin of the second AT2659S type amplifier after passing through a capacitor C23 and an inductor L3 in sequence, and the 4 pins and the 5 pins of the second AT2659S type amplifier are connected with a power supply; the 6 pins of the second AT2659S type amplifier are connected with the other signal input end of the micro-strip different-frequency synthesis coupler after passing through a capacitor C6, a capacitor C8, a capacitor C10, a capacitor C13 and a capacitor C16 in sequence; the output end of the microstrip different-frequency synthesis coupler is divided into two paths, the first path is grounded through a resistor R10, the second path is connected with one end of a capacitor C20 after passing through a resistor R11, and the other end of the capacitor C20 is connected with an F joint.

The beneficial effects of adopting above-mentioned technical scheme to produce lie in: the frequency reducer is used for receiving satellite television programs in remote rural areas, has the advantages of simple circuit structure, low cost, economy, practicability and the like, responds to national calls, and is favorable for the remote villages with poverty. The regulations of the broadcasting and television departments of the Chinese of the user are not installed in the city by utilizing the Beidou positioning function, avoiding conflicts with the wired network market.

Drawings

The utility model will be described in further detail with reference to the drawings and the detailed description.

FIG. 1 is a schematic block diagram of a frequency down converter according to an embodiment of the utility model;

fig. 2 is a schematic diagram of a frequency down converter according to an embodiment of the utility model.

Detailed Description

The following description of the embodiments of the present utility model will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present utility model, but the present utility model may be practiced in other ways other than those described herein, and persons skilled in the art will readily appreciate that the present utility model is not limited to the specific embodiments disclosed below.

As shown in fig. 1, the embodiment of the utility model discloses a dual-polarized single local oscillator output down converter, wherein a signal output end of an RF-left-handed antenna in the down converter is connected with a signal input end of a first primary low noise amplifier, a signal output end of the first primary low noise amplifier is connected with an input end of a phase-locked loop IC, a signal output end of the RF-right-handed antenna is connected with a signal input end of a second primary low noise amplifier, a signal output end of the second primary low noise amplifier is connected with another input end of the phase-locked loop IC, an output end of the phase-locked loop IC is connected with a signal input end of an LC band-pass filter, an output end of the LC band-pass filter is connected with a signal input end of a microstrip different-frequency synthesis coupler, a signal output end of a beidou antenna module is connected with a signal input end of a third primary or secondary low noise amplifier, a signal output end of the third primary or secondary low noise amplifier is connected with a signal input end of an LC filter, a signal output end of the LC filter is connected with another signal input end of the different-frequency synthesis coupler, and the output end of the different-frequency synthesis coupler is connected with a microstrip.

Further, as shown in fig. 2, the output end of the RF-left-handed antenna E2 is divided into two paths, the first path is connected with the gate of the field effect transistor Q1, the second path is connected with the 2 pin of the UTL3568 phase-locked loop through the resistor R2, the source electrode of the Q1 is grounded, the drain electrode of the Q1 is divided into three paths, the first path is connected with the 4 pin of the phase-locked loop after passing through the capacitor C5 and the first LC band-pass filter in turn, the second path is connected with the 3 pin of the phase-locked loop, and the third path is grounded through the capacitor C4;

Working principle:

the left-handed and right-handed KU band satellite signals are reflected by the butterfly-shaped antenna to focus to a miniature receiving antenna in the frequency demultiplier waveguide, and the left-handed signals are amplified by a left-handed antenna low-noise tube and then connected with a phase-locked IC (UTL 3568E); the right-hand signal is amplified by the right-hand antenna with low noise and then connected with a phase-locked IC (UTL 3568E), the two low noise pipes are respectively controlled by the set top boxes 13V and 18V in turn to work, the IC outputs 950MHz-2050MHz signals, and then the signals are transmitted to one input end of the micro-strip different-frequency combiner through an LC filter (950 MHz-1450 MHz).

The Beidou signal is received by a Beidou antenna (receiving a 1-wavelength metal wire with the Beidou frequency of 4 minutes) and then is connected with a 30 DB-50 DB low-noise amplifier (a high-gain primary amplifying tube can be used for meeting the requirements of 30 DB-50 DB, a two-stage slightly low-gain amplifying tube can also be used for meeting the requirements of 30 DB-50 DB), and the low-noise amplified output is connected with an LC band-pass filter (1500 MHz-1800 MHz) to select the Beidou signal to be connected with the other end of the microstrip different-frequency combiner.

The frequency band (950 MHz-1450 MHz) after the satellite television signal is down-converted and the Beidou amplifier outputs the frequency band (1500 MHz-1800 MHz) through an LC filter, and meanwhile, the frequency band (950 MHz-1800 MHz) is obtained after the satellite television signal is combined through a microstrip different-frequency combiner and is output to the F head of the down-converter (the satellite frequency band is different from the Beidou frequency band, so that the satellite frequency band and the Beidou frequency band can be overlapped together). The F head of the frequency demultiplier is connected to the F head (with the Beidou positioning function) of the 4-generation television set top box through a 2GHz feeder.

Claims

1. A dual polarized single local oscillator output frequency demultiplier is characterized in that: the signal output end of the RF-left-handed antenna is connected with the signal input end of the first primary low-noise amplifier, the signal output end of the first primary low-noise amplifier is connected with one input end of the phase-locked loop IC, the signal output end of the RF-right-handed antenna is connected with the signal input end of the second primary low-noise amplifier, the signal output end of the second primary low-noise amplifier is connected with the other input end of the phase-locked loop IC, the output end of the phase-locked loop IC is connected with the signal input end of the LC band-pass filter, the output end of the LC band-pass filter is connected with one signal input end of the microstrip pilot frequency synthesis coupler, the signal output end of the Beidou antenna module is connected with the signal input end of the third primary or secondary low-noise amplifier, the signal output end of the third primary or secondary low-noise amplifier is connected with the signal input end of the LC filter, the signal output end of the LC filter is connected with the other signal input end of the microstrip pilot frequency synthesis coupler, and the output end of the pilot frequency synthesis coupler is connected with the F joint.

2. The dual polarized single local oscillator output downconverter of claim 1 wherein: the output end of the RF-left-handed antenna E2 is divided into two paths, the first path is connected with the grid electrode of the field effect tube Q1, the second path is connected with the 2 pin of the UTL3568 type phase-locked loop through a resistor R2, the source electrode of the Q1 is grounded, the drain electrode of the Q1 is divided into three paths, the first path is connected with the 4 pin of the phase-locked loop after passing through a capacitor C5 and a first LC band-pass filter in sequence, the second path is connected with the 3 pin of the phase-locked loop, and the third path is grounded through the capacitor C4;