CN218888402U

CN218888402U - Adjustable booster circuit

Info

Publication number: CN218888402U
Application number: CN202223043186.8U
Authority: CN
Inventors: 张皓然; 张俊
Original assignee: Ringway Tech Jiangsu Co ltd; Central South University
Current assignee: Ringway Tech Jiangsu Co ltd; Central South University
Priority date: 2022-11-16
Filing date: 2022-11-16
Publication date: 2023-04-18
Anticipated expiration: 2032-11-16

Abstract

The utility model relates to a power technology field especially relates to a boost circuit with adjustable, include: the input circuit, the control circuit and the output circuit are respectively electrically connected with the booster circuit. The utility model discloses circuit structure is simple, introduces control voltage at the feedback voltage input of the chip that steps up, and the amplitude through adjusting control voltage makes output voltage change, can compatible multiple application scene.

Description

Adjustable booster circuit

Technical Field

The utility model relates to a power technical field especially relates to a boost circuit with adjustable.

Background

The booster circuit has wide applicability as a circuit form commonly used for power regulation, and is widely applied to power supply products in a plurality of military and civil fields such as military industry, automobiles, sound equipment and the like.

If a higher output voltage is needed in a power supply scene of a common power supply, the needed high voltage is generally obtained through a booster circuit; compared with the traditional method of using multi-stage batteries in series connection, the cost and the volume of the booster circuit can be effectively controlled.

Fig. 1 shows a conventional voltage boost circuit, which adjusts the output value of Vout + by adjusting the ratio of R3 and R4 to feed back to the control pin point a of the voltage boost chip U1, but the circuit has the disadvantage that the output voltage cannot be dynamically changed and different usage scenarios cannot be compatible.

SUMMERY OF THE UTILITY MODEL

Aiming at the problems in the prior art, the specific technical scheme is as follows: an adjustable boost circuit, comprising: the input circuit, the control circuit and the output circuit are respectively electrically connected with the booster circuit, and the feedback voltage value of the booster circuit is adjusted through the control circuit, so that the output voltage is controlled.

Further, the input circuit includes: the capacitors C10 and C6 are connected with the upper ends of the electrode capacitors C3, C6 and C10 in parallel respectively, the voltage input end Vin and the input end of the booster circuit are connected, and the input voltage is filtered through the capacitors C3, C6 and C10, so that high-frequency clutter signals are filtered, and clutter interference is suppressed.

Further, the boost circuit comprises a boost chip U1, NMOS tubes Q1 and Q2, an inductor L1, resistors R1, R2, R6 and R8, capacitors C8, C12, C13, C14, C15 and C20-22, wherein the pin 6 of U1 is connected with R8, the

pins

11 and 10 of U1 are connected with C12 in parallel, one ends of the

pins

12 and 14 of U1 are connected with C13 in series and then grounded, the other ends of the pins are connected with a voltage input end Vin, the

pins

1, 16 and 5 of U1 are respectively connected with C20, C14 and C8, the pin 3 of U1 is sequentially connected with R6 and C15 in series and then grounded, the pin 7 of U1 is connected with C21, the pin 4 of U1 is respectively connected with the sources of R2 and Q1, the drain of Q1 is respectively connected with the source of Q2, one end of L1 and R1, the pin R1 is connected with C22 in series and then grounded, the pin 13 of U1 is connected with the gate of Q1, the pin 9 of U1 is connected with the pin 9, the pin of Q2, the drain of U2 is connected with the pin 21 and the drain of Q2, the pin of Q2 is connected with the drain of the pin 21, and the drain of the pin of U1 is connected with the pin 21.

Further, the output circuit includes: the capacitors C17 and C18 and the active capacitor C7, and the upper ends of the capacitors C7, C17 and C18 which are connected in parallel are respectively connected with the output end of the booster circuit and the voltage output end Vout; the parallel connection of C7, C17 and C18 is used for decoupling, and when the output voltage of the booster circuit is interfered or has instantaneous high voltage, the pulse voltage is prevented from influencing a load circuit at the later stage.

Further, the control circuit comprises resistors Rfb, R3 and R5, one end of the Rfb is connected to the control voltage Vcon, and the other end is connected to the 2 nd pins of R3, R5 and U1, respectively, and the voltage value of the feedback voltage input pin FB of U1 is adjusted by adjusting the amplitude of the control voltage, so that the output voltage Vout varies with the variation of the control voltage Vcon.

Further, U1 is model ZCC9428.

The utility model has the advantages that:

the circuit is simple in structure, control voltage is introduced into the feedback voltage input end of the boost chip, the output voltage is changed by adjusting the amplitude of the control voltage, and the boost circuit is compatible with various application scenes.

Drawings

Fig. 1 is a diagram of a conventional boost circuit of the present invention;

fig. 2 is the adjustable boost circuit diagram of the present invention.

Detailed Description

The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings:

fig. 2 is a schematic diagram of an adjustable boost circuit, including: the input circuit, the control circuit and the output circuit are respectively electrically connected with the booster circuit, and a current feedback quantity is introduced to dynamically modify the voltage at the point A, so that the dynamic adjustment of the output voltage is realized; a control voltage set Vcon is introduced at a point B, and is converted into a current through Rfb, so that the output voltage Vout can be different by adjusting different voltage values at the point B.

The input circuit filters the input voltage through C3, C6 and C10, filters out high-frequency clutter signals, and suppresses clutter interference.

The output circuit includes: capacitors C17 and C18 and active capacitors C7 and C7, the output voltage of the booster circuit is interfered or has instantaneous high voltage through a decoupling circuit, so that the pulse voltage is prevented from influencing a load circuit at the later stage.

The booster circuit comprises a booster chip U1, NMOS tubes Q1 and Q2, an inductor L1, resistors R1, R2, R6 and R8, capacitors C8, C12, C13, C14, C15 and C20-22, the isolation of input voltage is realized through the U1, meanwhile, the input voltage range is 3-20V, and the maximum output voltage can reach 22V; meanwhile, the chip stop current is less than 1 muA, so that the chip circuit is effectively protected, and the chip is prevented from being damaged.

The control circuit comprises resistors Rfb, R3 and R5, the U1 feedback voltage is changed through Rfb and control voltage adjustment, and the circuit structure is simple.

The model of the chip U1 is ZCC9428, the model of the NMOS tube is AON7544, the ZCC9428 chip automatically modulates the frequency, and the current mode BOOST (BOOST) chip with the highest frequency of 600KHz, high efficiency and wide input range has the functions of input isolation and adjustable current limiting.

Experimental conditions and results:

the input voltage Vin =8.7V, C = C7=470 μ F, C = C6= C17= C18=22 μ F, C = C14=1 μ F, C = C13= C21= C8=100nF, C15=4.70nF, C4 is reserve capacitance, R1=10 Ω, R2=0.005 Ω, R3= R8=100k Ω, R5=10k Ω, R6=6.8k Ω, L1=2.2 μ H.

By the formula: vout = V _A * R3 (1/R3 +1/R5+ 1/Rfb) -R3/Rfb Vcon; wherein, V _A The reference voltage is the point A reference voltage of the U1 chip, vcon is the point B control voltage, and Vout is the output voltage.

Control voltage and output voltage correspondence table:

control Voltage Vcon (v)	Output voltage Vout (v)
		2.853	9
2.497	10
		1.416	16
1.24	18

It can be seen that different output voltages Vout are obtained by adjusting the output value of the control voltage Vcon, which can meet different voltage requirements of the rear-stage load circuit and is suitable for various energy-saving control and power supply scenarios.

In light of the foregoing, it will be apparent to those skilled in the art from this disclosure that various changes and modifications can be made without departing from the spirit and scope of the invention. The technical scope of the present invention is not limited to the content of the specification, and must be determined according to the scope of the claims.

Claims

1. An adjustable boost circuit, comprising: the input circuit, the control circuit and the output circuit are respectively electrically connected with the booster circuit.

2. The adjustable boost circuit of claim 1, wherein the input circuit comprises: the capacitor C10, the capacitor C6 and the capacitor C3 with an electrode, wherein the upper ends of the capacitor C3 with the electrode, the capacitor C6 and the capacitor C10 which are connected in parallel are respectively electrically connected with the voltage input end and the input end of the booster circuit.

3. The adjustable voltage boost circuit of claim 1, wherein the voltage boost circuit comprises: the boost circuit comprises a boost chip U1, an NMOS tube Q2, an inductor L1, a resistor R2, a resistor R6, a resistor R8, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a capacitor C20, a capacitor C21 and a capacitor C22, wherein the 6 th pin of the boost chip U1 is connected with the resistor R8, the 11 th pin and the 10 th pin of the boost chip U1 are connected with the capacitor C12 in parallel, the 12 th pin and the 14 th pin of the boost chip U1 are connected with the capacitor C13 in series and then are grounded, the 1 st pin, the 16 th pin and the 5 th pin of the boost chip U1 are respectively connected with the capacitor C20, the capacitor C14 and the capacitor C8, the 3 rd pin of the boost chip U1 is sequentially connected with the resistor R6 and the capacitor C15 in series and then are grounded, the 7 th pin of the boost chip U1 is connected with the capacitor C21, the 4 th pin of the boost chip U1 is respectively connected with the source of the resistor R2 and the NMOS tube Q1, the drain of the NMOS tube Q1 is connected with the drain of the NMOS tube Q2, and the drain of the boost chip of the NMOS tube Q1, the drain of the NMOS tube Q1 is connected with the gate of the boost chip.

4. The adjustable boost circuit of claim 1, wherein the output circuit comprises: the capacitor C17, the capacitor C18 and the capacitor C7 with an electrode, wherein the upper ends of the capacitor C7 with the electrode, the capacitor C17 and the capacitor C18 which are connected in parallel are respectively connected with the output end and the voltage output end of the booster circuit.

5. The adjustable boost circuit according to claim 1, wherein the control circuit comprises a resistor Rfb, a resistor R3, and a resistor R5, and the resistor Rfb is connected to the resistor R3, the resistor R5, and the 2 nd pin of the boost chip U1, respectively.

6. The adjustable voltage boost circuit of claim 3, wherein the boost chip U1 is model ZCC9428.