CN218887202U - Semiconductor packaging structure - Google Patents
Semiconductor packaging structure Download PDFInfo
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- CN218887202U CN218887202U CN202222075746.1U CN202222075746U CN218887202U CN 218887202 U CN218887202 U CN 218887202U CN 202222075746 U CN202222075746 U CN 202222075746U CN 218887202 U CN218887202 U CN 218887202U
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Abstract
The application provides a semiconductor package structure utilizes the gluey material that contains the carbon black material, coats in electronic component's lateral wall, and the rethread heating makes its solidification form the light blocking body, and this material accessible light absorption principle realizes the sidelight and shields the effect. In addition, the method has lower cost compared with the DBR manufacturing process, and can improve the reliability defects of easy delamination and reflective secondary interference in the DBR manufacturing process. The smaller size of the light block (e.g., the thickness of the light block can be reduced to 25 μm at OD5 level) compared to the molding process is advantageous for reducing the volume. In summary, the semiconductor package structure provided by the present application can achieve the side light shielding effect while achieving high reliability and small volume.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to a semiconductor packaging structure.
Background
In optical sensor (optical sensor) applications, in order to avoid the side surface from being affected by light and interfering with electrical transmission, a light blocking body needs to be arranged on the side surface of the wafer to block light. For example, to achieve the same level (for example, OD5 level) of light shielding effect, the light blocking body is usually completed by DBR (Distributed Bragg Reflector) or Molding process. However, the DBR process is expensive, and delamination (delamination) is easily generated at the junction between the light block and the side surface of the wafer. The larger thickness (e.g., 100 μm) of the light blocker formed by the Molding process is not favorable for realizing the volume miniaturization.
SUMMERY OF THE UTILITY MODEL
The application provides a semiconductor package structure, including:
a carrier plate;
the electronic element is arranged on the carrier plate, and the active surface of the electronic element faces to the direction far away from the carrier plate;
the light blocking body is arranged above and around the electronic element, and the top surface of the light blocking body is provided with a window to expose the active surface of the electronic element for sensing an environmental signal.
In some alternative embodiments, the light barriers are used to absorb light to avoid reflection.
In some alternative embodiments, the light block is a thermoset epoxy substrate.
In some alternative embodiments, the light blocker comprises a carbon black material.
In some alternative embodiments, a top surface of the light block protrudes compared to the fenestrated top surface.
In some alternative embodiments, the portion of the top surface of the light block that protrudes from the top surface of the fenestration includes a burr.
In some alternative embodiments, the top surface of the light block protrudes compared to the active surface of the electronic component.
In some optional embodiments, the semiconductor package structure further comprises:
the cover body is arranged above the electronic element, and the light blocking body covers the side face of the cover body.
In some alternative embodiments, the top surface of the light block body protrudes compared to the top surface of the cover body.
In some alternative embodiments, the cover is fixed above the electronic component by an adhesive layer.
In some alternative embodiments, the light blocker does not include filler particles.
In some alternative embodiments, the light barrier does not include a multilayer composite layer.
The application provides a semiconductor package structure utilizes the gluey material that contains the carbon black material, coats in electronic component's lateral wall, and the rethread heating makes its solidification form the light blocking body, and this material accessible light absorption principle realizes the sidelight and shields the effect. In addition, the method has lower cost compared to the DBR process, and can improve the reliability defects of the DBR process such as easy delamination and reflective secondary interference. The smaller size of the light block (e.g., the thickness of the light block can be reduced to 25 μm at OD5 level) compared to the molding process is advantageous for reducing the volume. In summary, the semiconductor package structure provided by the application can achieve the side light shielding effect while achieving high reliability and small volume.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
fig. 1 to 4 are schematic structural views of first to fourth embodiments of a semiconductor package structure according to the present application;
fig. 5-7 are schematic structural views in a manufacturing process of one embodiment of a semiconductor package structure according to the present application.
Description of the symbols:
1-a carrier plate, 2-an electronic component, 21-an active surface, 3-a light barrier, 31-burrs, 32-a window, 4-a cover body, 5-an adhesive layer, 6-a lead, 7-a sacrificial layer material, 8-a carrier and 9-a light absorption material.
Detailed Description
The following description of the embodiments of the present application will be provided in conjunction with the accompanying drawings and examples, and those skilled in the art can easily understand the technical problems and effects that the present application solves and provides by the contents of the present specification. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and are not limiting of the invention. In addition, for convenience of description, only portions related to the related utility model are shown in the drawings.
It should be noted that the structures, proportions, sizes, and other elements shown in the drawings are only used for understanding and reading the contents of the specification, and are not used for limiting the conditions under which the present application can be implemented, so they do not have the technical significance, and any structural modifications, changes in proportion, or adjustments of sizes, which do not affect the efficacy and achievement of the purposes of the present application, shall still fall within the scope of the technical content disclosed in the present application. In addition, the terms "above", "first", "second" and "a" as used herein are for the sake of clarity only, and are not intended to limit the scope of the present application, and changes or modifications of the relative relationship may be made without substantial technical changes.
It should be further noted that, in the embodiments of the present application, the corresponding longitudinal section may be a front view direction section, the transverse section may be a right view direction section, and the horizontal section may be a top view direction section.
It should be readily understood that the meaning of "in.. On," "over,", and "above" in this application should be interpreted in the broadest sense such that "in.. On" not only means "directly on something," but also means "on something" including an intermediate member or layer between the two.
Furthermore, spatially relative terms, such as "below," "lower," "over," "upper," and the like, may be used herein for ease of description to describe one element or component's relationship to another element or component as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 or at other orientations) and the spatially relative descriptors used in this application interpreted accordingly as such.
In addition, the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
As shown in fig. 1, the semiconductor package structure includes a carrier 1, an electronic component 2, and a light blocking body 3. The electronic component 2 is disposed on the carrier 1. The active surface 21 of the electronic component 2 faces away from the carrier plate 1. The light block 3 is disposed above and around (side walls of) the electronic component 2. The top surface of the light-blocking body 3 has a window 32 to expose the active surface 21 of the electronic component 2 for sensing environmental signals.
In the embodiment, the electronic component 2 may be a photosensitive component, such as a photodiode, a Charge Coupled Device (CCD), or a Complementary Metal-Oxide Semiconductor (CMOS) or a photodetector, or an infrared photodetector.
In the present embodiment, the carrier board 1 may be a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass fiber-based copper foil laminate.
In this embodiment, the light block 3 may be used to absorb light to avoid reflection. The light block 3 may employ a light absorbing material 9. For example, the light block 3 may comprise a carbon black material, and the light block 3 may be a thermosetting epoxy resin substrate. That is, the light blocking member 3 may be an epoxy resin adhesive material containing a carbon black material.
In order to overcome the defect of side light leakage caused by the fact that the bonding wire cannot be completely covered by glass even though the black colloid is coated on the bonding wire in a dispensing manner, the method can improve the defect of side light leakage caused by the fact that the glass is not completely covered by the glass by completely covering the side surface of the glass, and has better signal-to-noise ratio. In addition, better stress expression can be achieved by using a dispensing type and matching with the organic black material.
Fig. 2 shows a wafer level package. The light block 3 may not comprise a multilayer composite layer. This is because the light block 3 can be formed by a spray coating process using an epoxy resin adhesive containing carbon black. Unlike the multilayer composite layer (high and low refractive index material multilayer stack structure) exhibited by the DBR process. Compared with the method, the method has the advantages of low cost and improvement of the reliability defects of easy delamination and reflective secondary interference of the DBR process.
Fig. 3 and 4 show a light-transmissive type die-bond package. As shown in fig. 1, 3 and 4, the semiconductor package structure may further include a lid 4. The cover 4 may be provided above the electronic component 2. The light block 3 may cover the side of the cover 4. In fig. 1, the cover 4 may be fixed above the electronic component 2 by an adhesive layer 5.
Here, the cover 4 may function to protect the electronic component 2. The cover 4 may be made of a transparent material such as glass. The cover 4 may also be made of opaque material such as metal with an opening for light to pass through.
Still further, the top surface of the light block 3 may protrude compared to the top surface of the cover 4. The portion of the top surface of the light block 3 that protrudes above the top surface of the cover 4 may include a burr 31.
The method can improve the defect of side light leakage of the non-light-shielding structure and has better signal-to-noise ratio.
For the semiconductor package structures shown in fig. 1 to 4, the light block 3 may not include the filling particles. Here, the filler particles may be fine silica powder. This is because the light block 3 can be formed by a spray coating process using an epoxy resin adhesive containing carbon black. Unlike the manner in which EMC (Epoxy Molding Compound) containing filler particles is used and formed by a Molding process. And compared to this approach, the present application has an advantage of size reduction (e.g., the thickness of the light block 3 can be reduced from 100 μm to 25 μm at the OD5 level).
For the semiconductor package structure shown in fig. 1 to 4, the top surface of the light block 3 may protrude compared to the top surface of the window 32. Specifically, the portion of the top surface of the light block 3 that protrudes compared to the top surface of the window 32 may include a burr 31. Since the active surface 21 of the electronic component 2 needs to be exposed for sensing environmental signals, in the manufacturing process (see the description of fig. 5 to 7), the active surface 21 of the electronic component 2 is protected by the sacrificial layer material 7 to avoid contact with the light absorbing material 9, and then the sacrificial layer material 7 and the light absorbing material 9 thereon are removed to expose the active surface 21. In the above-described removal process, the top surface of the light block 3 exhibits the characteristic of the burr 31.
With the semiconductor package structure shown in fig. 1 to 4, the top surface of the light block 3 may protrude compared to the active surface 21 of the electronic component 2. This is because after the sacrificial layer 7 of the active surface 21 of the electronic component 2 and the light absorbing material 9 thereon are removed to expose the active surface 21 of the electronic component 2 in the manufacturing process (see the description of fig. 5 to fig. 7), a difference in height between the light blocker 3 on the sidewall of the electronic component 2 and the active surface 21 of the electronic component 2 can be exhibited, i.e., the top surface of the light blocker 3 is higher than the active surface 21 of the electronic component 2.
The application provides a semiconductor package structure utilizes the gluey material that contains the carbon black material, coats in electronic component 2's lateral wall, and rethread heating makes its solidification form the light barrier 3, and this material accessible light absorption principle realizes the sidelight and shields the effect. In addition, the method has lower cost compared with the DBR manufacturing process, and can improve the reliability defects of easy delamination and reflective secondary interference in the DBR manufacturing process. Compared with the molding process, the smaller size is beneficial to reducing the volume. In summary, the semiconductor package structure provided by the present application can achieve the side light shielding effect while achieving high reliability and small volume.
For the semiconductor package structure shown in fig. 1 to 4, the step of forming the light blocker 3 on the electronic element 2 may refer to the description of fig. 5 to 7 below. It should be noted that the step of forming the light block 3 on the electronic component 2 may be a single operation, or may be an efficient batch operation as shown in fig. 5 to 7.
As shown in fig. 5, a carrier 8 is provided. The electronic component 2 is placed on the carrier 8. A sacrificial layer material 7 is applied to the upper surface of the electronic component 2.
Here, the sacrificial layer material 7 may be, for example, a material such as a thermal decomposition glue or a thermal decomposition tape.
As shown in fig. 6, a light absorbing material 9 is sprayed and cured to form a light blocking body 3 covering the side wall of the electronic component 2 (see fig. 5).
As shown in fig. 7, the sacrificial layer material 7 of the bottom surface is removed, and the light block 3 above the sacrificial layer material 7 is removed together with the sacrificial layer material 7. Finally, the light barrier 3 is formed on the side wall of the electronic component 2, so that the side light shielding effect is achieved.
In addition, because the two steps of forming the light barrier 3 and removing the sacrificial layer material 7 by curing need heating, the temperature of the two steps can be selected by materials, so that the removal of the sacrificial layer material 7 can be continuously completed without adjusting the temperature in a single curing process, thereby reducing the manufacturing cost and improving the working efficiency.
While the present application has been described and illustrated with reference to particular embodiments thereof, such description and illustration are not intended to limit the present application. It will be clearly understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof within the embodiments without departing from the true spirit and scope of the present application as defined by the appended claims. The illustrations may not necessarily be drawn to scale. There may be a difference between the technical reproduction in the present application and the actual device due to variables in the manufacturing process and the like. There may be other embodiments of the application that are not specifically illustrated. The specification and drawings are to be regarded in an illustrative rather than a restrictive sense. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the application. All such modifications are intended to fall within the scope of the appended claims. Although the methods disclosed herein have been described with reference to particular operations performed in a particular order, it should be understood that these operations may be combined, sub-divided, or reordered to form equivalent methods without departing from the teachings of the present application. Accordingly, unless specifically indicated herein, the order and grouping of the operations is not a limitation of the present application.
Claims (9)
1. A semiconductor package structure, comprising:
a carrier plate;
the electronic element is arranged on the carrier plate, and the active surface of the electronic element faces to the direction far away from the carrier plate;
the top surface of the light barrier is provided with a window to expose the active surface of the electronic element for sensing an environmental signal;
the light barrier is made of epoxy resin glue containing carbon black, is coated on the side wall of the electronic element, and is cured and formed by heating.
2. The semiconductor package structure of claim 1, wherein the light block is configured to absorb light and prevent reflection.
3. The semiconductor package of claim 2, wherein the light block is a thermoset epoxy substrate.
4. The semiconductor package structure of claim 1, wherein a top surface of the light block protrudes compared to the top surface of the fenestration.
5. The semiconductor package structure of claim 4, wherein the portion of the top surface of the light block that protrudes from the top surface of the window comprises a burr.
6. The semiconductor package structure of claim 4, wherein a top surface of the light block protrudes relative to an active surface of the electronic component.
7. The semiconductor package structure of claim 1, further comprising:
the cover body is arranged above the electronic element, the light blocking body covers the side face of the cover body, and the top face of the light blocking body protrudes out of the top face of the cover body.
8. The semiconductor package structure of claim 1, wherein the light block does not include filler particles.
9. The semiconductor package of claim 1, wherein the light blocker is not present
Including multiple composite layers.
Priority Applications (1)
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CN202222075746.1U CN218887202U (en) | 2022-08-08 | 2022-08-08 | Semiconductor packaging structure |
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CN202222075746.1U CN218887202U (en) | 2022-08-08 | 2022-08-08 | Semiconductor packaging structure |
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CN218887202U true CN218887202U (en) | 2023-04-18 |
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