CN218771294U - ARM intelligent input surge suppressor - Google Patents
ARM intelligent input surge suppressor Download PDFInfo
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- CN218771294U CN218771294U CN202222978253.9U CN202222978253U CN218771294U CN 218771294 U CN218771294 U CN 218771294U CN 202222978253 U CN202222978253 U CN 202222978253U CN 218771294 U CN218771294 U CN 218771294U
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 20
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 20
- 239000010703 silicon Substances 0.000 claims abstract description 20
- 230000003287 optical effect Effects 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 6
- 230000010354 integration Effects 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 6
- 230000001629 suppression Effects 0.000 description 6
- 230000000452 restraining effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 206010063385 Intellectualisation Diseases 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000001012 protector Effects 0.000 description 1
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Abstract
The utility model discloses an ARM intelligent input surge suppressor, which comprises an AC/DC power circuit, an auxiliary power supply circuit and an ARM microcontroller control circuit; the method comprises the steps that a time delay control program is loaded through an ARM microcontroller U1 to achieve two paths of time delay control output, namely an I/O control port 1 and an I/O control port 2, the I/O control port 1 controls a silicon controlled rectifier SC1 through an optical coupler T1, and the silicon controlled rectifier SC1 serves as a short circuit controller of a surge limiting resistor R4 to control short circuit of the surge limiting resistor R4; the I/O control port 2 controls the direct current output of the AC/DC power supply circuit through an optocoupler T2; and the auxiliary power supply circuit provides a direct-current power supply for the ARM microcontroller control circuit. The utility model has the advantages that: the ARM intelligent input surge suppressor adopts a modular design, has the characteristics of simple circuit, convenience in use, high reliability and integration level, intelligentization and the like, can effectively suppress the surge impact current of the input of a power supply, and effectively suppresses the mutual interference between the power supply and the power supply.
Description
Technical Field
The utility model relates to a surge suppression circuit, specifically speaking relates to an ARM intelligence input surge suppressor.
Background
At present, most power supplies at home and abroad adopt a power resistance surge current suppression technology with a general scheme. The general surge current technical scheme is divided into two schemes, namely a silicon-controlled surge current suppression technology matched with a power resistor and a relay surge current suppression technology matched with the power resistor. The time delay circuit of the technology of restraining surge current by matching the silicon controlled rectifier with the power resistor and the technology of restraining surge current by matching the relay with the power resistor mostly adopts a charging time delay circuit, and the effect of restraining surge can be weakened along with the increase of the continuous times of electrifying when the power supply is continuously started. The intelligent input surge current protector can completely avoid the defects of the surge limiting technology, and can also delay the start of the power module after the input capacitor is completely charged, so as to realize multipoint input surge current suppression.
SUMMERY OF THE UTILITY MODEL
The utility model discloses just in order to solve above-mentioned technical problem and an ARM intelligence input surge suppressor that designs.
The utility model provides a technical scheme that its technical problem adopted is:
an ARM intelligent input surge suppressor comprises an AC/DC power supply circuit, an auxiliary power supply circuit and an ARM microcontroller control circuit; the method comprises the steps that a time delay control program is loaded through an ARM microcontroller U1 to realize two paths of time delay control output, namely an I/O control port 1 and an I/O control port 2, the I/O control port 1 controls a silicon controlled rectifier SC1 through an optical coupler T1, and the silicon controlled rectifier SC1 is used as a short circuit controller of a surge limiting resistor R4 to control the short circuit of the surge limiting resistor R4; the I/O control port 2 controls the direct current output of the AC/DC power supply circuit through an optocoupler T2; and the auxiliary power supply circuit provides a direct-current power supply for the ARM microcontroller control circuit.
The I/O control port 1 is connected with the anode of a diode D1 and is connected with GND through a resistor R1; the cathode of the diode D1 is connected with the base electrode of the triode V1, the emitting electrode of the triode V1 is connected with GND, the collector electrode of the triode V1 is connected with the cathode of the diode of the optocoupler T1, and the anode of the diode of the optocoupler T1 is connected with the output direct current power supply of the auxiliary power supply circuit through a resistor R2; the control end of the optocoupler T1 is connected in parallel between the anode and the control electrode of the controlled silicon SC1 through a resistor R3, and the anode and the cathode of the controlled silicon SC1 are respectively connected with two ends of a surge limiting resistor R4.
According to the ARM intelligent input surge suppressor, the I/O control port 2 is connected with the anode of a diode of the optocoupler T2 through a current-limiting resistor R5, the cathode of the diode of the optocoupler T2 is connected with GND, and the control end of the optocoupler T2 controls the direct current output of an AC/DC power supply circuit.
The ARM intelligent input surge suppressor is characterized in that the auxiliary power supply circuit outputs a 5V direct-current power supply.
The utility model discloses it is through many times experimental and applied component optimum parameter that obtains:
the ARM intelligent input surge suppressor is characterized in that the ARM intelligent input surge suppressor is an ARM microcontroller with the model of GD32F103RET6.
The ARM intelligent input surge suppressor is characterized in that the optical coupler is MOC3081 in model.
The ARM intelligent input surge suppressor is characterized in that the model of the controlled silicon is CS45-08.
The ARM intelligent input surge suppressor is characterized in that the triode is a driving control tube and is MPS2222 in model number.
The ARM intelligent input surge suppressor is characterized in that the optocoupler model is FOD817C-300.
The utility model discloses an ARM intelligence input surge suppressor. The unit is mainly applied to the input end of an AC/DC power supply, and the ability of suppressing surge current control of the input end of the AC/DC power supply is improved by adopting an ARM microcontroller delay control circuit, a delay control silicon controlled rectifier conduction suppression circuit and a delay control power supply module switching circuit. The surge protection device effectively restrains the impact of a power supply on the surge current of a power supply system and ensures the surge protection of continuous repeated power-on of an AC/DC front stage.
1. Principle of operation
The utility model discloses just in order to solve the ARM intelligent input surge suppressor that above-mentioned technical problem designed, wherein ARM microcontroller is master control core device, carries out surge current's control to peripheral device through the procedure, carries out the time delay setting through ARM microcontroller system clock. After the equipment is started, the time delay is accurate through an ARM microcontroller program, the SCR of the I/O1 interface is controlled to output high level to control a rear-stage circuit to be opened in a time delay mode through the ARM microcontroller, the control end of the main output power module is controlled to be switched on in a time delay mode through the ARM microcontroller, after the surge current is restrained through the surge limiting resistor, the SCR is opened, the surge limiting resistor is short, after the surge current is restrained by the surge limiting resistor, the work is quitted, the resistor is prevented from being damaged due to overheating during long-time work, the control end of the power module is opened in a time delay mode, an input end echelon switch is opened, and the surge current is restrained in multiple directions.
2. Features of the apparatus
(1) Excellent performance and low cost.
The utility model discloses control performance is good, and whole circuit cost is lower.
(2) The circuit is simple and stable in operation.
The protection device can guarantee accurate double-delay control to achieve the purpose of limiting surge, can guarantee the effect of limiting surge of continuous starting, and protects the resistance of limiting surge.
(3) Wide application range
The utility model discloses a modular design, the period error capability of whole circuit is also very strong, only needs to assemble according to the quantity value of the corresponding device that the theory of design calculated, can satisfy technical index's requirement.
The utility model has the advantages that: the ARM intelligent input surge suppressor adopts a modular design, has the characteristics of simple circuit, convenience in use, high reliability and integration level, intellectualization and the like, can effectively suppress surge impact current of input of a power supply, and effectively suppresses mutual interference between the power supply and power supply.
Drawings
Fig. 1 is the utility model discloses ARM intelligence input surge suppressor functional block diagram.
Description of the preferred embodiment
The present invention will be further explained with reference to the drawings and examples.
As shown in fig. 1, the utility model relates to an ARM intelligent input surge suppressor, which comprises an AC/DC power circuit, an auxiliary power supply circuit and an ARM microcontroller control circuit; the method comprises the steps that a time delay control program is loaded through an ARM microcontroller U1 to achieve two paths of time delay control output, namely an I/O control port 1 and an I/O control port 2, the I/O control port 1 controls a silicon controlled rectifier SC1 through an optical coupler T1, and the silicon controlled rectifier SC1 serves as a short circuit controller of a surge limiting resistor R4 to control short circuit of the surge limiting resistor R4; the I/O control port 2 controls the direct current output of the AC/DC power supply circuit through an optocoupler T2; and the auxiliary power supply circuit provides a direct-current power supply for the ARM microcontroller control circuit.
The I/O control port 1 is connected with the anode of a diode D1 and is connected with GND through a resistor R1; the cathode of the diode D1 is connected with the base electrode of the triode V1, the emitting electrode of the triode V1 is connected with GND, the collector electrode of the triode V1 is connected with the cathode of the diode of the optocoupler T1, and the anode of the diode of the optocoupler T1 is connected with the output direct current power supply of the auxiliary power supply circuit through a resistor R2; the control end of the optocoupler T1 is connected in parallel between the anode and the control electrode of the controlled silicon SC1 through a resistor R3, and the anode and the cathode of the controlled silicon SC1 are respectively connected with two ends of a surge limiting resistor R4.
According to the ARM intelligent input surge suppressor, the I/O control port 2 is connected with the anode of a diode of the optocoupler T2 through a current-limiting resistor R5, the cathode of the diode of the optocoupler T2 is connected with GND, and the control end of the optocoupler T2 controls the direct current output of an AC/DC power supply circuit.
The ARM intelligent input surge suppressor is characterized in that the auxiliary power supply circuit outputs a 5V direct-current power supply.
The utility model discloses it is through many times experimental and applied component optimum parameter that obtains:
the ARM intelligent input surge suppressor is characterized in that the ARM intelligent input surge suppressor is an ARM microcontroller U1 with the model of GD32F103RET6.
According to the ARM intelligent input surge suppressor, the type of the optocoupler T1 is MOC3081.
The ARM intelligent input surge suppressor is characterized in that the model of the controlled silicon SC1 is CS45-08.
According to the ARM intelligent input surge suppressor, the triode V1 is a driving control tube and is MPS2222 in type.
According to the ARM intelligent input surge suppressor, the type of the optocoupler T2 is FOD817C-300.
The surge limiting resistor R4 in the ARM intelligent input surge suppressor is 20W30 omega; the current limiting resistor R5 is 420 Ω.
The following is the main program of the ARM intelligent input surge suppressor:
void delay(u16 i)
{
while (i);/delay sequence
}
void main()
{
delay (500);/delay time can be adjusted according to actual circuit
Io1=1;
delay (300);/delay time can be adjusted according to actual circuit
Io2=1;
}
The present invention is not limited to the above-mentioned best mode, and any other products similar or identical to the present invention, which can be obtained by anyone under the teaching of the present invention, all fall within the protection scope of the present invention.
Claims (9)
1. An ARM intelligent input surge suppressor comprises an AC/DC power supply circuit, an auxiliary power supply circuit and an ARM microcontroller control circuit; the method is characterized in that: the method comprises the steps that a time delay control program is loaded through an ARM microcontroller (U1) to realize two paths of time delay control output, namely an I/O control port 1 and an I/O control port 2, the I/O control port 1 controls a silicon controlled rectifier (SC 1) through an optical coupler (T1), the silicon controlled rectifier (SC 1) is used as a short circuit controller of a surge limiting resistor (R4), and the short circuit of the surge limiting resistor (R4) is controlled; the I/O control port 2 controls the direct current output of the AC/DC power supply circuit through an optical coupler (T2); and the auxiliary power supply circuit provides a direct-current power supply for the ARM microcontroller control circuit.
2. The ARM smart input surge suppressor of claim 1 wherein: the I/O control port 1 is connected with the anode of a diode (D1) and is connected with GND through a resistor (R1); the cathode of the diode (D1) is connected with the base of the triode (V1), the emitting electrode of the triode (V1) is connected with GND, the collector of the triode (V1) is connected with the diode cathode of the optocoupler (T1), and the diode anode of the optocoupler (T1) is connected with the output direct current power supply of the auxiliary power supply circuit through the resistor (R2); the control end of the optocoupler (T1) is connected in parallel between the anode and the control electrode of the controlled silicon (SC 1) through a resistor (R3), and the anode and the cathode of the controlled silicon (SC 1) are respectively connected with two ends of the surge limiting resistor (R4).
3. The ARM smart input surge suppressor of claim 1 wherein: the I/O control port 2 is connected with the anode of a diode of the optocoupler (T2) through a current-limiting resistor (R5), the cathode of the diode of the optocoupler (T2) is connected with GND, and the control end of the optocoupler (T2) controls the direct current output of the AC/DC power supply circuit.
4. The ARM smart input surge suppressor of claim 1 or 2, wherein: the auxiliary power supply circuit outputs 5V direct current power supply.
5. The ARM smart input surge suppressor of claim 1 or 2, wherein: the model of the ARM microcontroller (U1) is GD32F103RET6.
6. The ARM smart input surge suppressor of claim 1 or 2, wherein: the type of the optical coupler (T1) is MOC3081.
7. The ARM smart input surge suppressor of claim 1 or 2, wherein: the model of the controllable silicon (SC 1) is CS45-08.
8. The ARM smart input surge suppressor of claim 2 wherein: the triode (V1) is a driving control tube and is MPS2222 in model number.
9. The ARM smart input surge suppressor of claim 1 or 3, wherein: the type of the optocoupler (T2) is FOD817C-300.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222978253.9U CN218771294U (en) | 2022-11-09 | 2022-11-09 | ARM intelligent input surge suppressor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222978253.9U CN218771294U (en) | 2022-11-09 | 2022-11-09 | ARM intelligent input surge suppressor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218771294U true CN218771294U (en) | 2023-03-28 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222978253.9U Active CN218771294U (en) | 2022-11-09 | 2022-11-09 | ARM intelligent input surge suppressor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218771294U (en) |
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2022
- 2022-11-09 CN CN202222978253.9U patent/CN218771294U/en active Active
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