CN218767262U - Lightning arrester monitoring device for monitoring leakage current - Google Patents
Lightning arrester monitoring device for monitoring leakage current Download PDFInfo
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- CN218767262U CN218767262U CN202222972247.2U CN202222972247U CN218767262U CN 218767262 U CN218767262 U CN 218767262U CN 202222972247 U CN202222972247 U CN 202222972247U CN 218767262 U CN218767262 U CN 218767262U
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Abstract
The utility model relates to leakage current monitoring, in particular to a lightning arrester monitoring device for monitoring leakage current, which comprises a singlechip, a signal conditioning circuit, a differential output circuit and a pulse counting circuit; the signal conditioning circuit is connected with the current transformer, performs signal conditioning on a current signal output by the current transformer, converts the current signal into a voltage signal and inputs the voltage signal to the differential output circuit and the pulse counting circuit; the differential output circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a differential signal and inputs the differential signal to the singlechip; the pulse counting circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a pulse signal and inputs the pulse signal to the singlechip; the utility model provides a technical scheme can effectively overcome the leakage current monitoring precision that prior art exists lower, can't receive the defect that the impact number of times carries out the count to the arrester.
Description
Technical Field
The utility model relates to a leakage current monitoring, concretely relates to arrester monitoring devices for monitoring leakage current.
Background
An arrester is a device that is protected against lightning strikes and operational overvoltages, such as lightning strikes and operational overvoltages that are easily encountered in substations and transmission lines. The lightning arrester can provide protection for lightning stroke and operation overvoltage, and when the instantaneous voltage of the lightning arrester reaches the breakover voltage of the lightning arrester, the lightning arrester acts to discharge instantaneous heavy current.
Along with the development of national economy, the power consumption is increasing day by day, and a new requirement is also put forward on the stability of power consumption. The leakage current of the lightning arrester in normal operation can be maintained at a relatively stable value, and the lightning arrester is gradually aged along with the increase of the service life, so that the leakage current is increased day by day. Therefore, the leakage current of the lightning arrester is monitored in real time, and the health condition of the lightning arrester can be visually judged so as to be convenient for replacement and maintenance in advance, and avoid tripping of a power grid system to cause unnecessary loss.
Traditional pointer-type arrester monitoring devices easily receive filthy influence to lead to the reading unclear, and everyone's reading error can cause the leakage current of arrester to fluctuate in a very large scale, consequently the monitoring precision is lower. In addition, traditional pointer-type arrester monitoring devices can not count the number of times that the arrester receives the impact.
SUMMERY OF THE UTILITY MODEL
Technical problem to be solved
To the above-mentioned shortcoming that prior art exists, the utility model provides an arrester monitoring devices for monitoring leakage current can effectively overcome the leakage current monitoring precision that prior art exists lower, can't receive the impact number of times to the arrester and carry out the defect of counting.
(II) technical scheme
In order to achieve the above purpose, the utility model discloses a following technical scheme realizes:
a lightning arrester monitoring device for monitoring leakage current comprises a single chip microcomputer, a signal conditioning circuit, a differential output circuit and a pulse counting circuit;
the signal conditioning circuit is connected to the current transformer, performs signal conditioning on a current signal output by the current transformer, converts the current signal into a voltage signal and inputs the voltage signal to the differential output circuit and the pulse counting circuit;
the differential output circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a differential signal and inputs the differential signal to the singlechip;
the pulse counting circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a pulse signal and inputs the pulse signal to the singlechip;
and the singlechip receives the differential signal sent by the differential output circuit and the pulse signal sent by the pulse counting circuit, obtains the magnitude of the original leakage current based on the differential signal, and counts the number of times of impact on the lightning arrester based on the pulse signal.
Preferably, the signal conditioning circuit comprises a signal input end, a voltage dependent resistor R1, a common-mode interference suppression circuit, a filter capacitor C1, a TVS tube D1 and a sampling resistor R3;
the signal input end receives a current signal output by the current transformer;
the voltage dependent resistor R1 is connected between the signal input ends and used for surge protection;
the common-mode interference suppression circuit is connected with the signal input end and used for suppressing common-mode interference;
the filter capacitor C1 is connected in parallel with the common-mode interference suppression circuit;
the TVS tube D1 is connected with the filter capacitor C1 in parallel and used for inhibiting overcurrent impact and protecting a rear-stage circuit;
and the sampling resistor R3 is connected with the TVS tube D1 in parallel and used for converting the current signal into a voltage signal and inputting the voltage signal into the differential output circuit and the pulse counting circuit.
Preferably, common mode interference suppression circuit includes inductance L1, resistance R2, inductance L2 and resistance R12, signal input part is inserted to inductance L1, resistance R12's one end, parallelly connected filter capacitor C1, TVS pipe D1, sampling resistance R3 between inductance L1, the other end of resistance R12, parallelly connected resistance R2 on the inductance L1, parallelly connected inductance L2 on the resistance R12.
Preferably, the differential output circuit comprises a differential amplifier U2, a blocking capacitor, an amplifying unit, an impedance matching resistor and a differential signal output end;
the direct current blocking capacitor is connected between the sampling resistor R3 in the signal conditioning circuit and the amplifying unit and is used for filtering direct current components;
the amplifying unit is connected between the input end and the output end of the differential amplifier U2 and used for controlling the amplification gain;
the impedance matching resistor is connected between the output end of the differential amplifier U2 and the differential signal output end and used for impedance matching;
and the differential signal output end outputs a differential signal to the singlechip.
Preferably, the dc blocking capacitors include dc blocking capacitors C4 and C5, the amplifying unit includes resistors R6, R7, R8 and R9, and the impedance matching resistor includes resistors R10 and R11;
a resistor R6 and a capacitor C4 are sequentially connected between the in-phase input end of the differential amplifier U2 and one end of the sampling resistor R3, a resistor R7 is connected between the in-phase input end and the in-phase output end of the differential amplifier U2, and a resistor R10 is connected between the in-phase output end and the differential signal output end of the differential amplifier U2;
the resistance R8 and the capacitance C5 are connected in sequence between the inverting input end of the differential amplifier U2 and the other end of the sampling resistor R3, a resistor R9 is connected between the inverting input end and the inverting output end of the differential amplifier U2, and a resistor R11 is connected between the inverting output end and the differential signal output end of the differential amplifier U2.
Preferably, the pulse counting circuit comprises an optical coupler U1, an RC integrating circuit, a pull-up resistor R5 and a pulse signal output end;
the RC integrating circuit is connected between a sampling resistor R3 in the signal conditioning circuit and the input end of the optocoupler U1 and is used for ensuring the waveform width;
the optocoupler U1 outputs a falling edge pulse signal when being conducted;
the pull-up resistor R5 is connected with the output end of the optocoupler U1;
and the pulse signal output end outputs a pulse signal to the singlechip.
Preferably, the RC integrating circuit includes current-limiting resistor R4, electric capacity C2 has parallelly connected between opto-coupler U1's the input, be connected with current-limiting resistor R4 between electric capacity C2's one end and sampling resistor R3's one end, opto-coupler U1's input is connected to sampling resistor R3's the other end, pulse signal output is connected to opto-coupler U1's output.
Preferably, the display device further comprises a communication module, a display module and a reset circuit;
the communication module is used for the communication between the singlechip and external equipment;
the display module is used for displaying the monitoring data by the singlechip;
a reset circuit for resetting the device;
wherein, the communication module adopts RS485 communication module, and the display module adopts the LCD screen.
(III) advantageous effects
Compared with the prior art, the utility model provides a lightning arrester monitoring devices for monitoring leakage current has following beneficial effect:
1) The differential output circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a differential signal and inputs the differential signal to the single chip microcomputer, the single chip microcomputer obtains the original leakage current based on the differential signal, so that the leakage current of the lightning arrester can be monitored in real time, the monitoring precision is high, and the health condition of the lightning arrester can be visually judged through the leakage current data monitored in real time;
2) The pulse counting circuit receives the voltage signal sent by the signal conditioning circuit and converts the voltage signal into a pulse signal to be input to the single chip microcomputer, the single chip microcomputer counts the number of times of impact on the lightning arrester based on the pulse signal, accurate counting of the number of times of impact on the lightning arrester is achieved, therefore, an operation database of the lightning arrester can be established, an aging curve diagram of the lightning arrester is fitted, and data support is provided for establishing an aging model of the lightning arrester.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
FIG. 1 is a schematic block diagram of the present invention;
fig. 2 is a circuit diagram of the signal conditioning circuit, the differential output circuit and the pulse counting circuit of fig. 1 according to the present invention;
fig. 3 is a production model diagram of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the drawings in the embodiments of the present invention are combined below to clearly and completely describe the technical solutions in the embodiments of the present invention. It is to be understood that the embodiments described are only some of the embodiments of the present invention, and not all of them. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
An arrester monitoring device for monitoring leakage current is shown in fig. 1 and 2 and comprises a single chip microcomputer, a signal conditioning circuit, a differential output circuit and a pulse counting circuit;
the signal conditioning circuit is connected with the current transformer, performs signal conditioning on a current signal output by the current transformer, converts the current signal into a voltage signal and inputs the voltage signal to the differential output circuit and the pulse counting circuit;
the differential output circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a differential signal and inputs the differential signal to the singlechip;
the pulse counting circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a pulse signal and inputs the pulse signal to the singlechip;
and the singlechip receives the differential signal sent by the differential output circuit and the pulse signal sent by the pulse counting circuit, obtains the magnitude of the original leakage current based on the differential signal, and counts the number of times of impact on the lightning arrester based on the pulse signal.
As shown in fig. 1, the present application further includes a communication module, a display module, and a reset circuit;
the communication module is used for the communication between the singlechip and external equipment;
the display module is used for displaying the monitoring data by the singlechip;
a reset circuit for resetting the device;
the communication module adopts an RS485 communication module, and the display module adopts an LCD screen.
(1) As shown in fig. 2, the signal conditioning circuit includes a signal input terminal (I +, I-) (fig. 2), a voltage dependent resistor R1, a common mode interference rejection circuit, a filter capacitor C1, a TVS tube D1, and a sampling resistor R3;
the signal input end receives a current signal output by the current transformer;
the voltage dependent resistor R1 is connected between the signal input ends and used for surge protection;
the common-mode interference suppression circuit is connected with the signal input end and used for suppressing common-mode interference;
the filter capacitor C1 is connected in parallel with the common-mode interference suppression circuit;
the TVS tube D1 is connected with the filter capacitor C1 in parallel and used for inhibiting overcurrent impact and protecting a post-stage circuit;
and the sampling resistor R3 is connected with the TVS tube D1 in parallel and is used for converting the current signal into a voltage signal and inputting the voltage signal into the differential output circuit and the pulse counting circuit.
The common mode interference suppression circuit comprises an inductor L1, a resistor R2, an inductor L2 and a resistor R12, one end of the inductor L1 and one end of the resistor R12 are connected to a signal input end, a filter capacitor C1, a TVS tube D1 and a sampling resistor R3 are connected between the other end of the inductor L1 and the other end of the resistor R12 in parallel, the inductor L1 is connected with the resistor R2 in parallel, and the resistor R12 is connected with the inductor L2 in parallel.
(2) As shown in fig. 2, the differential output circuit includes a differential amplifier U2, a dc blocking capacitor, an amplifying unit, an impedance matching resistor, and differential signal output terminals (IAP, IAN in fig. 2);
the direct current blocking capacitor is connected between the sampling resistor R3 in the signal conditioning circuit and the amplifying unit and is used for filtering direct current components;
the amplifying unit is connected between the input end and the output end of the differential amplifier U2 and used for controlling the amplification gain;
the impedance matching resistor is connected between the output end of the differential amplifier U2 and the differential signal output end and used for impedance matching;
and the differential signal output end outputs a differential signal to the singlechip.
The blocking capacitor comprises blocking capacitors C4 and C5, the amplifying unit comprises resistors R6, R7, R8 and R9, and the impedance matching resistor comprises resistors R10 and R11;
a resistor R6 and a capacitor C4 are sequentially connected between the in-phase input end of the differential amplifier U2 and one end of the sampling resistor R3, a resistor R7 is connected between the in-phase input end and the in-phase output end of the differential amplifier U2, and a resistor R10 is connected between the in-phase output end and the differential signal output end of the differential amplifier U2;
a resistor R8 and a capacitor C5 are sequentially connected between the inverting input end of the differential amplifier U2 and the other end of the sampling resistor R3, a resistor R9 is connected between the inverting input end and the inverting output end of the differential amplifier U2, and a resistor R11 is connected between the inverting output end and the differential signal output end of the differential amplifier U2.
(3) As shown in fig. 2, the pulse counting circuit includes an optical coupler U1, an RC integrating circuit, a pull-up resistor R5, and a pulse signal output terminal (INT in fig. 2);
the RC integrating circuit is connected between a sampling resistor R3 in the signal conditioning circuit and the input end of the optocoupler U1 and is used for ensuring the waveform width and preventing invalid counting caused by interference;
the optocoupler U1 is conducted when the current between the I & lt + & gt and the I & lt- & gt reaches a certain amplitude, and outputs a falling edge pulse signal when the current is conducted;
the pull-up resistor R5 is connected with the output end of the optocoupler U1;
and the pulse signal output end outputs a pulse signal to the singlechip.
RC integrating circuit includes current-limiting resistor R4, electric capacity C2, and the parallelly connected electric capacity C2 that has between opto-coupler U1's the input, is connected with current-limiting resistor R4 between electric capacity C2's one end and sampling resistor R3's one end, and opto-coupler U1's input is connected to sampling resistor R3's the other end, and pulse signal output is connected to opto-coupler U1's output.
In the technical scheme, the single chip microcomputer adopts an STM32G070 type single chip microcomputer, the pin functions of the electric appliance elements related in the technical scheme can be checked on technical data, the circuit connection relations of the electric appliance elements can be connected according to the technical data, and technicians in the field can complete the work.
It should be noted that the technical solution of the present application is only for providing a hardware configuration different from the prior art, so that the skilled person can implement further development under such a hardware configuration, and the software program can be programmed by the programmer in the field at a later stage according to the actual effect requirement.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (8)
1. An arrester monitoring device for monitoring leakage current, characterized in that: the device comprises a singlechip, a signal conditioning circuit, a differential output circuit and a pulse counting circuit;
the signal conditioning circuit is connected with the current transformer, performs signal conditioning on a current signal output by the current transformer, converts the current signal into a voltage signal and inputs the voltage signal to the differential output circuit and the pulse counting circuit;
the differential output circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a differential signal and inputs the differential signal to the singlechip;
the pulse counting circuit receives the voltage signal sent by the signal conditioning circuit, converts the voltage signal into a pulse signal and inputs the pulse signal to the singlechip;
and the singlechip receives the differential signal sent by the differential output circuit and the pulse signal sent by the pulse counting circuit, obtains the magnitude of the original leakage current based on the differential signal, and counts the number of times of impact on the lightning arrester based on the pulse signal.
2. The surge arrester monitoring device for monitoring a leakage current according to claim 1, wherein: the signal conditioning circuit comprises a signal input end, a piezoresistor R1, a common-mode interference suppression circuit, a filter capacitor C1, a TVS tube D1 and a sampling resistor R3;
the signal input end is used for receiving a current signal output by the current transformer;
the voltage dependent resistor R1 is connected between the signal input ends and used for surge protection;
the common-mode interference suppression circuit is connected with the signal input end and used for suppressing common-mode interference;
the filter capacitor C1 is connected in parallel with the common-mode interference suppression circuit;
the TVS tube D1 is connected with the filter capacitor C1 in parallel and used for inhibiting overcurrent impact and protecting a post-stage circuit;
and the sampling resistor R3 is connected with the TVS tube D1 in parallel and is used for converting the current signal into a voltage signal and inputting the voltage signal into the differential output circuit and the pulse counting circuit.
3. The surge arrester monitoring device for monitoring leakage current according to claim 2, wherein: common mode interference suppression circuit includes inductance L1, resistance R2, inductance L2 and resistance R12, signal input part is inserted to inductance L1, resistance R12's one end, parallelly connected have filter capacitor C1, TVS pipe D1, sampling resistance R3 between inductance L1, the other end of resistance R12, parallelly connected have resistance R2 on the inductance L1, parallelly connected have inductance L2 on the resistance R12.
4. The surge arrester monitoring device for monitoring leakage current according to claim 1, wherein: the differential output circuit comprises a differential amplifier U2, a blocking capacitor, an amplifying unit, an impedance matching resistor and a differential signal output end;
the direct current blocking capacitor is connected between the sampling resistor R3 in the signal conditioning circuit and the amplifying unit and is used for filtering direct current components;
the amplifying unit is connected between the input end and the output end of the differential amplifier U2 and used for controlling the amplification gain;
the impedance matching resistor is connected between the output end of the differential amplifier U2 and the differential signal output end and used for impedance matching;
and the differential signal output end outputs a differential signal to the singlechip.
5. The surge arrester monitoring device for monitoring leakage current according to claim 4, wherein: the blocking capacitor comprises blocking capacitors C4 and C5, the amplifying unit comprises resistors R6, R7, R8 and R9, and the impedance matching resistor comprises resistors R10 and R11;
a resistor R6 and a capacitor C4 are sequentially connected between the in-phase input end of the differential amplifier U2 and one end of the sampling resistor R3, a resistor R7 is connected between the in-phase input end and the in-phase output end of the differential amplifier U2, and a resistor R10 is connected between the in-phase output end and the differential signal output end of the differential amplifier U2;
the resistance R8 and the capacitance C5 are connected in sequence between the inverting input end of the differential amplifier U2 and the other end of the sampling resistor R3, a resistor R9 is connected between the inverting input end and the inverting output end of the differential amplifier U2, and a resistor R11 is connected between the inverting output end and the differential signal output end of the differential amplifier U2.
6. The surge arrester monitoring device for monitoring a leakage current according to claim 1, wherein: the pulse counting circuit comprises an optocoupler U1, an RC integrating circuit, a pull-up resistor R5 and a pulse signal output end;
the RC integrating circuit is connected between a sampling resistor R3 in the signal conditioning circuit and the input end of the optocoupler U1 and is used for ensuring the waveform width;
the optocoupler U1 outputs a falling edge pulse signal when the optocoupler is switched on;
the pull-up resistor R5 is connected with the output end of the optocoupler U1;
and the pulse signal output end outputs a pulse signal to the singlechip.
7. An arrester monitoring device for monitoring leakage current according to claim 6, characterized in that: RC integrating circuit includes current-limiting resistor R4, electric capacity C2, it has electric capacity C2 to connect in parallel between opto-coupler U1's the input, be connected with current-limiting resistor R4 between electric capacity C2's one end and sampling resistor R3's one end, opto-coupler U1's input is connected to sampling resistor R3's the other end, pulse signal output is connected to opto-coupler U1's output.
8. The surge arrester monitoring device for monitoring leakage current according to claim 1, wherein: the display device also comprises a communication module, a display module and a reset circuit;
the communication module is used for the communication between the singlechip and external equipment;
the display module is used for displaying the monitoring data by the singlechip;
a reset circuit for resetting the device;
wherein, the communication module adopts RS485 communication module, and the display module adopts the LCD screen.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222972247.2U CN218767262U (en) | 2022-11-08 | 2022-11-08 | Lightning arrester monitoring device for monitoring leakage current |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222972247.2U CN218767262U (en) | 2022-11-08 | 2022-11-08 | Lightning arrester monitoring device for monitoring leakage current |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116094877A (en) * | 2023-04-11 | 2023-05-09 | 浙江地芯引力科技有限公司 | Differential signal transmission circuit and data transmission device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116094877A (en) * | 2023-04-11 | 2023-05-09 | 浙江地芯引力科技有限公司 | Differential signal transmission circuit and data transmission device |
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