CN218546860U - Current signal acquisition circuit and current collector - Google Patents
Current signal acquisition circuit and current collector Download PDFInfo
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- CN218546860U CN218546860U CN202222344780.4U CN202222344780U CN218546860U CN 218546860 U CN218546860 U CN 218546860U CN 202222344780 U CN202222344780 U CN 202222344780U CN 218546860 U CN218546860 U CN 218546860U
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Abstract
The utility model relates to a current signal acquisition circuit and current collector, current signal acquisition circuit include at least one collection device, central processing unit, the output interface chip that connects in parallel, wherein, at least one collection device is including the collection resistance and the collection chip circuit of electricity connection in proper order, collection chip circuit electricity is connected to central processing unit for to central processing unit output PWM signal, central processing unit is used for converting the PWM signal into the digital current signal output that at least one collection device corresponds; the output interface chip is electrically connected with the central processing unit and is used for outputting the digital current signal corresponding to the at least one acquisition device to the corresponding terminal equipment. The utility model discloses acquire the current value of each passageway effectively, convert it to the current value of digital quantity to send terminal equipment with RS-485 communication form.
Description
Technical Field
The utility model relates to an industrial instrument technical field especially relates to a current signal acquisition circuit and current collector.
Background
In the industrial field, the conditioning of signals and the long-line transmission by using an instrumentation amplifier can cause the following problems: first, since the transmitted signal is a voltage signal, the transmission line may be interfered by noise; secondly, the distributed resistance of the transmission line generates a voltage drop; third, how to provide the operating voltage of the instrumentation amplifier in the field is also a problem; fourthly, most terminal devices no longer support analog input interfaces in the digital signal age.
To solve the above problem and to avoid the influence of the associated noise, a current is used to transmit the signal because the current is not sensitive to the noise. In general, a 4-20mA current loop is used to indicate a zero signal by 4mA, a full scale signal by 20mA, and a signal higher than 20mA and lower than 4mA is used for alarming various faults. The current signal collector with 4-20mA collects analog quantity and outputs digital signal. Therefore, a current signal collector of 4-20mA is produced at the same time, but the existing current signal collector has the defects of low precision and wide applicable scenes. In summary, how to provide a current collector with high precision and wide application range is an urgent problem to be solved.
SUMMERY OF THE UTILITY MODEL
In view of the above, a current signal collecting circuit and a current collector are needed to overcome the problems of low accuracy and wide application range of the current collector in the prior art.
In order to solve the above technical problem, the present invention provides a current signal collecting circuit, which comprises at least one collecting device, a central processing unit, and an output interface chip, wherein the at least one collecting device comprises a collecting resistor and a collecting chip circuit, which are electrically connected in sequence, the collecting chip circuit is electrically connected to the central processing unit, and is used for outputting a PWM signal to the central processing unit, and the central processing unit is used for converting the PWM signal into a digital current signal corresponding to the at least one collecting device for output; the output interface chip is electrically connected with the central processing unit and is used for outputting the digital current signal corresponding to the at least one acquisition device to the corresponding terminal equipment.
Furthermore, one end of the collection resistor is electrically connected to the first port of the corresponding current channel and the collection chip, and the other end of the collection resistor is electrically connected to the ground end and the second port of the corresponding current channel.
Further, the output interface chip is an RS485 chip and is used for realizing RS485 communication.
Further, the output interface chip is connected in parallel to two ends of the corresponding terminal device.
Further, the acquisition chip circuit comprises a conversion chip and a peripheral circuit, wherein a VIN port of the conversion chip is electrically connected to the peripheral circuit, a VCC port of the conversion chip is electrically connected to a voltage signal source, a GND port of the conversion chip is grounded, a PWM port of the conversion chip is electrically connected to the central processing unit, and a V5V port of the conversion chip is grounded through a capacitor.
Further, the peripheral circuit includes a first resistor, a second resistor, and a first capacitor, where one end of the first resistor is electrically connected to the first port of the corresponding current channel and one end of the second resistor, the other end of the first resistor is electrically connected to the second port of the corresponding current channel and the ground, the other end of the second resistor is electrically connected to the VIN port of the conversion chip and one end of the first capacitor, and the other end of the first capacitor is grounded.
Furthermore, the first resistor is a sampling resistor, and converts a current signal generated by a corresponding current channel into a voltage signal at two ends of the first resistor.
Furthermore, the second resistor is a current limiting resistor, and current limiting of the current signal generated by the corresponding current channel is realized.
Furthermore, the first capacitor is a filter capacitor, so as to filter the signal.
The utility model also provides a current collector, include as above current signal acquisition circuit.
Compared with the prior art, the beneficial effects of the utility model include: the device comprises at least one acquisition device which is arranged in parallel and used for acquiring current signals of a plurality of channels; converting the PWM signal into a digital current signal corresponding to at least one acquisition device for output by arranging a central processing unit; and outputting the digital current signal corresponding to at least one acquisition device to corresponding terminal equipment by arranging an output interface chip. To sum up, the utility model discloses acquire the current value of each passageway effectively, convert it to the current value of digital quantity to send terminal equipment with RS-485 communication form.
Drawings
Fig. 1 is a schematic structural diagram of an embodiment of a current signal collecting circuit provided by the present invention;
fig. 2 is a schematic structural diagram of an embodiment of a circuit of an acquisition chip provided by the present invention;
fig. 3 is a schematic diagram of capturing the PWM signal input of the signal pin according to an embodiment of the present invention.
Detailed Description
The following detailed description of the preferred embodiments of the invention, which is to be read in connection with the accompanying drawings, forms a part of this application, and together with the embodiments of the invention, serve to explain the principles of the invention and not to limit its scope.
In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Further, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Reference throughout this specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present invention. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the described embodiments can be combined with other embodiments.
The utility model provides a current signal acquisition circuit and current collector adopts load resistance to convert 4 ~ 20mA electric current into voltage signal, converts analog voltage signal linearity to the PWM signal output of 16% -80% duty cycle through the APC chip again, provides new thinking for further accuracy and the application universality that improve the electric current collection.
Before describing the specific embodiments, the terms involved are to be construed accordingly as follows:
4-20mA current: the industrial pipeline needs to collect some analog quantity, such as temperature, pressure, humidity, flow rate and the like. The physical quantity of these non-electric signals needs to be converted into analog electric signals for long-distance transmission, and 4-20mA current is commonly used in industry for transmitting analog quantity. The reason for adopting the current signal is not easy to be interfered, and the infinite internal resistance of the current source is connected with the wire resistor in series on the loop without influencing the precision, and the current signal can be transmitted on the common twisted pair wire by hundreds of meters. The upper limit of 20mA is because of the requirement of explosion prevention, and the energy of the spark caused by the on-off of the current of 20mA is not enough to ignite gas. The reason why the lower limit is not 0mA is to detect disconnection, and the lower limit is not lower than 4mA in normal operation, when the transmission line is in fault disconnection, the loop current is reduced to 0mA, and 2mA is usually taken as a disconnection alarm line. 4-20mA transmitters are generally classified into 4-wire type, 3-wire type and 2-wire type. Typically 4-wire, i.e. two power supply wires and two signal wires. Of course, the signal line and the power line can share one line, and the 3-line type is simplified. Of course, the line can supply power and transmit signals, and the 2-wire type is changed. The most common is now the 2-wire type, but the 2-wire transmitter itself consumes less than 4mA of current.
Based on the explanation of the above technical noun, among the prior art, 4 ~ 20 mA's current signal collector transmission precision is not high, and the range of application is limited, consequently, the utility model aims at providing a current signal acquisition circuit and current collector to realize high accuracy and the current signal collector that can the wide application, the following is explained in detail respectively:
the embodiment of the present invention provides a current signal collecting circuit, and when it is seen from fig. 1, fig. 1 is the structure schematic diagram of an embodiment of the current signal collecting circuit provided by the present invention, including at least one collecting device 1, a central processing unit 2 and an output interface chip 3 which are connected in parallel, wherein, the at least one collecting device 1 includes collecting resistors (R3, R4, R5 and R6 in the figure) and a collecting chip circuit 101 which are electrically connected in sequence, the collecting chip circuit 101 is electrically connected to the central processing unit 2 for outputting PWM signals to the central processing unit 2, the central processing unit 2 is used for converting the PWM signals into digital current signals output corresponding to the at least one collecting device 1; the output interface chip 3 is electrically connected with the central processing unit 2 and is used for outputting the digital current signal corresponding to the at least one acquisition device 1 to the corresponding terminal equipment.
In the embodiment of the present invention, at least one parallel collecting device is provided for collecting current signals of multiple paths; converting the PWM signal into a digital current signal corresponding to at least one acquisition device for output by arranging a central processing unit; and outputting the digital current signal corresponding to at least one acquisition device to corresponding terminal equipment by arranging an output interface chip.
The utility model discloses a concrete embodiment, a 4 ~ 20mA current signal collector is provided, can gather the current signal of 4 passageways simultaneously, it adopts 200 ohm load resistance to convert 4 ~ 20mA electric currents into voltage signal, again through the linear PWM signal output that converts the analog voltage signal to 16% -80% duty cycle of APC chip, the resolution ratio can reach 169IT, MCU configures the input pin into PWM input capture mode, can accurately measure the duty cycle of PWM signal, then through simple mathematics conversion just can obtain the current value of this passageway and adopt RS-485 interface with data transmission for terminal equipment.
As a preferred embodiment, one end of the collection resistors (R3, R4, R5, and R6 in the figure) is electrically connected to the first port of the corresponding current path (I1, I2, I3, and I4 in the figure) and the collection chip 2, respectively, and the other end of the collection resistors (R3, R4, R5, and R6 in the figure) is electrically connected to the ground terminal and the second port of the corresponding current path (I1, I2, I3, and I4 in the figure), respectively.
In the embodiment of the utility model, convert 4 ~ 20mA electric current into voltage signal through the collection resistance. Specifically, a load resistor of 200 ohms is used to convert the 4-20mA current into a voltage signal.
As a more specific embodiment, the acquisition resistors R3, R4, R5 and R6 are high-precision sampling resistors, and 4-20mA current signals are converted into voltage signals through the resistors of each channel.
As a preferred embodiment, the output interface chip 3 is an RS485 chip, and is configured to implement RS485 communication.
The embodiment of the utility model provides an in, collector input signal is the analog quantity electric current, and output signal is the digital quantity electric current value of RS-485 interface, can match the terminal equipment who supports RS-485 interface wantonly, and the range of application is wide.
As a preferred embodiment, the output interface chip 3 is connected in parallel to two ends of the corresponding terminal device.
In the embodiment of the utility model provides an in, effectively send for terminal equipment through RS-485 interface.
As a preferred embodiment, referring to fig. 2, fig. 2 is a schematic structural diagram of an embodiment of an acquisition chip circuit provided by the present invention, where the acquisition chip circuit 101 includes a conversion chip U1 and a peripheral circuit, a VIN port of the conversion chip U1 is electrically connected to the peripheral circuit, a VCC port of the conversion chip U1 is electrically connected to a voltage signal source, a GND port of the conversion chip U1 is grounded, a PWM port of the conversion chip U1 is electrically connected to the central processing unit, and a V5V port of the conversion chip U1 passes through a capacitor ground.
The embodiment of the utility model provides an in, the conversion chip is the PWM signal with the voltage linear conversion at R1 both ends, and the preferred APC chip, through APC chip analog voltage signal, the linear PWM signal output that converts 16% -80% duty cycle into, resolution ratio can be up to 16BIT.
It should be noted that, the central processing unit configures the input pin into the PWM input capture mode, that is, the duty ratio of the PWM signal can be accurately measured, and the current value of the channel can be obtained through simple mathematical conversion.
In a specific embodiment of the present invention, APC1, APC2, APC3, APC4 are voltage frequency conversion chips, and the output PWM Duty ratio Duty = VIN/5V, when sampling 4-20mA current with 200 ohm load resistor, the current of 4-20mA can be converted into 16% -80% Duty ratio, and the linearity is higher than 0.05%. The MCU configures 4 pins as a PWM input capture mode, so that the duty ratio of each channel can be measured, and then the MCU obtains the current value of each channel through specific mathematical operation.
As a preferred embodiment, the peripheral circuit includes a first resistor R1, a second resistor R2, and a first capacitor C1, wherein one end of the first resistor R1 is electrically connected to the first port of the corresponding current channel and one end of the second resistor R2, the other end of the first resistor R1 is electrically connected to the second port of the corresponding current channel and the ground, the other end of the second resistor R2 is electrically connected to the VIN port of the conversion chip U1 and one end of the first capacitor C1, and the other end of the first capacitor C1 is grounded.
The embodiment of the utility model provides an in, first resistance, second resistance and first electric capacity constitute peripheral circuit jointly, input conversion chip after handling current signal.
As a preferred embodiment, the first resistor R1 is a sampling resistor, and converts a current signal generated by a corresponding current channel into a voltage signal across the first resistor R1.
In the embodiment of the present invention, R1 is a 200 ohm high precision sampling resistor, and a 4-20mA current flowing through R1 will generate a voltage of 0.8-4V at the two ends of R1.
As a preferred embodiment, the second resistor R2 is a current limiting resistor, and realizes current limiting of the current signal generated by the corresponding current channel.
The embodiment of the utility model provides an in, R2 is current-limiting resistor, realizes current-limiting effect, protection circuit.
As a preferred embodiment, the first capacitor C1 is a filter capacitor, and is used for filtering a signal.
The embodiment of the utility model provides an in, C1 is filter capacitor, realizes corresponding signal filtering.
In a specific embodiment of the present invention, referring to fig. 3, fig. 3 is a schematic diagram of signal pin PWM signal input capture according to an embodiment of the present invention, wherein the MCU input capture mode can be used to measure the pulse width or the frequency. (1) Setting input capture as rising edge detection, (2) recording the value of TIMx _ CNT (counter) when rising edge occurs, (3) configuring capture signals as falling edge capture, and when falling edge occurs, capturing, (4) recording the value of TIMx _ CN (counter) T at the moment, and (5) the difference between the values of TIMx _ CNT (counter) at two times before and after is the high-level pulse width. Meanwhile, according to the counting frequency of TIM, the duty ratio of PWM signal can be known
The embodiment of the utility model provides a still provide a current collector, include as above current signal acquisition circuit.
The more specific implementation manner of each unit of the current collector can be referred to the description of the current signal collecting circuit, and has similar beneficial effects, and details are not repeated here.
The utility model discloses a current signal acquisition circuit, which is provided with at least one acquisition device connected in parallel and is used for acquiring current signals of a plurality of paths; converting the PWM signal into a digital current signal corresponding to at least one acquisition device and outputting the digital current signal by arranging a central processing unit; and outputting the digital current signal corresponding to at least one acquisition device to corresponding terminal equipment by arranging an output interface chip.
The utility model discloses technical scheme acquires the current value of each passageway effectively, converts it to the current value of digital quantity to send terminal equipment with RS-485 communication form.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention should be covered by the present invention.
Claims (10)
1. A current signal acquisition circuit is characterized by comprising at least one acquisition device, a central processing unit and an output interface chip which are connected in parallel, wherein the at least one acquisition device comprises an acquisition resistor and an acquisition chip circuit which are sequentially and electrically connected, the acquisition chip circuit is electrically connected to the central processing unit and is used for outputting PWM signals to the central processing unit, and the central processing unit is used for converting the PWM signals into digital current signals corresponding to the at least one acquisition device and outputting the digital current signals; the output interface chip is electrically connected with the central processing unit and is used for outputting the digital current signal corresponding to the at least one acquisition device to the corresponding terminal equipment.
2. The current signal collection circuit of claim 1, wherein one end of the collection resistor is electrically connected to the first port of the corresponding current channel and the collection chip, and the other end of the collection resistor is electrically connected to the ground and the second port of the corresponding current channel.
3. The current signal acquisition circuit of claim 1 wherein the output interface chip is an RS485 chip for implementing RS485 communication.
4. The current signal collection circuit of claim 1, wherein the output interface chip is connected in parallel across the corresponding terminal device.
5. The current signal collection circuit of claim 1, wherein the collection chip circuit comprises a conversion chip and a peripheral circuit, wherein a VIN port of the conversion chip is electrically connected to the peripheral circuit, a VCC port of the conversion chip is electrically connected to a voltage signal source, a GND port of the conversion chip is grounded, a PWM port of the conversion chip is electrically connected to the central processing unit, and a V5V port of the conversion chip is grounded through a capacitor.
6. The current signal collection circuit of claim 5, wherein the peripheral circuit comprises a first resistor, a second resistor and a first capacitor, wherein one end of the first resistor is electrically connected to the first port of the corresponding current channel and one end of the second resistor, the other end of the first resistor is electrically connected to the second port of the corresponding current channel and the ground, the other end of the second resistor is electrically connected to the VIN port of the conversion chip and one end of the first capacitor, and the other end of the first capacitor is grounded.
7. The current signal collection circuit of claim 6, wherein the first resistor is a sampling resistor, and the current signal generated by the corresponding current channel is converted into a voltage signal across the first resistor.
8. The current signal collection circuit of claim 6, wherein the second resistor is a current limiting resistor for limiting the current of the current signal generated by the corresponding current channel.
9. The current signal collection circuit of claim 6, wherein the first capacitor is a filter capacitor, and wherein filtering of the signal is achieved.
10. A current collector comprising a current signal collection circuit according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222344780.4U CN218546860U (en) | 2022-08-31 | 2022-08-31 | Current signal acquisition circuit and current collector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222344780.4U CN218546860U (en) | 2022-08-31 | 2022-08-31 | Current signal acquisition circuit and current collector |
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| Publication Number | Publication Date |
|---|---|
| CN218546860U true CN218546860U (en) | 2023-02-28 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202222344780.4U Active CN218546860U (en) | 2022-08-31 | 2022-08-31 | Current signal acquisition circuit and current collector |
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| CN (1) | CN218546860U (en) |
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- 2022-08-31 CN CN202222344780.4U patent/CN218546860U/en active Active
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