CN218352172U

CN218352172U - Intelligent controller

Info

Publication number: CN218352172U
Application number: CN202220589755.XU
Authority: CN
Inventors: 张世微; 肖磊; 陈龙钰; 魏洁; 陈高丰; 周源浩; 蔡朦朦
Original assignee: Zhejiang Chint Electrics Co Ltd
Current assignee: Zhejiang Chint Electrics Co Ltd
Priority date: 2022-03-17
Filing date: 2022-03-17
Publication date: 2023-01-20
Anticipated expiration: 2032-03-17

Abstract

The utility model relates to the field of low-voltage apparatus, in particular to an intelligent controller, which comprises a master processor circuit module, the intelligent controller also comprises at least three slave processor circuit modules, the master processor circuit module comprises a master processor MCU1, and each slave processor circuit module comprises a slave processor connected with the master processor MCU1; the main processor circuit module is at least used for realizing the current protection function of the circuit breaker; the at least three slave processor circuit modules include: the first slave processor circuit module is a metering MCU2 and is used for accurately measuring the current and the voltage of a circuit where the circuit breaker is located and carrying out power calculation according to the measured current and voltage; the second slave processor circuit module is a wireless communication MCU3 and is used for wirelessly communicating with an external circuit; the third slave processor circuit module is a human-computer interaction MCU4 and is used for realizing the human-computer interaction function of the intelligent controller; the intelligent controller has good reliability and high operation efficiency.

Description

Intelligent controller

Technical Field

The utility model relates to a low-voltage apparatus field, concretely relates to intelligent control ware.

Background

With the rapid development of the intelligent power grid technology and the increasing improvement of the requirements of safe power utilization management, the field of low-voltage electric appliances increasingly pays more attention to the improvement of the intelligence and the measurement precision of the universal circuit breaker, and the improvement of the functions is realized by a core component, namely an intelligent controller, of the universal circuit breaker.

The function of the traditional electronic intelligent controller is increased and intelligently improved, and the function of an internal MCU is required to be synchronously increased; in addition, the traditional intelligent controller mostly adopts a single processor to process current signals, voltage signals and I/O states, has single thread of data processing, large load and low efficiency, is difficult to process multitask concurrent events in time, can accelerate the aging of the MCU and reduce the service life of products when being in the state for a long time, and needs to carry on a more complex MCU to meet complex functional requirements.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to overcome prior art's defect, provide an intelligent control ware, its good reliability, operating efficiency are high.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

an intelligent controller comprises a main processor circuit module and at least three auxiliary processor circuit modules, wherein the main processor circuit module comprises a main processor MCU1, and each auxiliary processor circuit module comprises an auxiliary processor connected with the main processor MCU1;

the main processor circuit module is at least used for realizing the current protection function of the circuit breaker;

the at least three slave processor circuit modules include:

the first slave processor circuit module is a metering MCU2 and is used for accurately measuring the current and the voltage of a circuit where the circuit breaker is located and calculating power according to the measured current and voltage;

the second slave processor circuit module is a wireless communication MCU3 and is used for wirelessly communicating with an external circuit;

and the third slave processor circuit module is a human-computer interaction MCU4 and is used for realizing the human-computer interaction function of the intelligent controller.

Preferably, the main processor circuit module further includes a first current sampling circuit, a switch state detection circuit and an execution driving circuit, which are respectively connected to the main processor MCU1, the first current sampling circuit is used to collect the current of the circuit where the circuit breaker is located, the switch state detection circuit is used to detect the current state of the circuit breaker, and the execution driving circuit is used to drive the magnetic pole coil of the circuit breaker to act.

Preferably, the main processor circuit module further comprises a power supply circuit, a DI/DO circuit, an EEPROM circuit, a FLASH memory circuit, a wired communication circuit, an indication and key circuit and a clock chip circuit which are respectively connected with the main processor MCU1, the main processor MCU1 is in communication connection with an external circuit through the DI/DO circuit, the EEPROM circuit is used for storing product information setting parameters of the intelligent controller, the FLASH memory circuit is used for storing circuit breaker information, the circuit breaker information includes fault information and operation records, the wired communication circuit includes a wired communication interface, and the wired communication interface includes a USB interface and/or an RS485 interface and/or a CAN interface.

Preferably, the intelligent controller further comprises a power supply circuit for supplying power to the master processor circuit module and each slave processor circuit module, the master processor MCUI is in communication connection with each slave processor through the I/O output, and controls the power supply of each slave processor to enable through controlling a controllable switch connected between the power supply circuit and each slave processor.

Preferably, the first slave processor circuit module further comprises a second current sampling circuit and a voltage sampling circuit which are respectively connected with the metering MCU 2.

Preferably, the second slave processor circuit module further includes an NFC circuit, a busbar temperature detection circuit, and an ambient temperature detection circuit, which are connected to the wireless communication MCU3, respectively.

Preferably, the wireless communication MCU3 is a bluetooth communication chip of model NRF 52832; the metering MCU2 is a three-phase electric energy metering IC with the model number of ADE 7880; the third processor circuit module is a touch liquid crystal display circuit.

Preferably, the second current sampling circuit comprises at least one group of current sampling sub-circuits, the current sampling sub-circuit comprises a triode D4, an IA _ P terminal, an IA _ N terminal, an IAP terminal and an IAN terminal, resistors R31, R32 and R33 are sequentially connected in series between the IA _ P terminal and the IAP terminal, resistors R36, R37 and R38 are sequentially connected in series between the IA _ N terminal and the IAN terminal, a base of the triode D4 is connected with a node between the resistor R31 and the resistor R32, a collector and an emitter of the triode D4 are connected with a node between the resistor R36 and the resistor R37, one end of the resistor R34 is connected with a node between the resistor R31 and the resistor R32, the other end of the resistor R35 is connected with one end of the resistor R35, the other end of the resistor R35 is connected with a node between the resistor R36 and the resistor R37, one end of a capacitor C20 is connected with a node between the resistor R32 and the resistor R33, the other end of the capacitor C20 is connected with one end of a capacitor C23, the other end of the capacitor C23 is connected with a node between the resistor R37 and the resistor R38, one end of a capacitor C21 is connected with a node between the resistor R33 and the IAP end, the other end of the capacitor C21 is connected with one end of a capacitor C24, the other end of the capacitor C24 is connected with a node between the resistor R38 and the IAN end, a node between the resistor R34 and the resistor R35, a node between the capacitor C20 and the capacitor C23, and a node between the capacitor C21 and the capacitor C24 are sequentially connected and grounded, the IA _ P end and the IA _ N end are respectively connected with a current transformer, and the IAP end and the IAN end are respectively connected with the metering MCU 2.

Preferably, the voltage sampling circuit comprises a VAP terminal, a VBP terminal, a VCP terminal, a VN terminal, a UA terminal, a UB terminal, a UC terminal and a UN terminal, a first group of resistors is connected in series between the VAP terminal and the UA terminal, a second group of resistors is connected in series between the VBP terminal and the UB terminal, a third group of resistors is connected in series between the VCP terminal and the UC terminal, a fourth group of resistors is connected in series between the VN terminal and the UN terminal, a base of the triode D1, one end of the capacitor C4 and one end of the resistor R21 are all connected with a node between the VAP terminal and the first group of resistors, a base of the triode D2, one end of the capacitor C5 and one end of the resistor R26 are all connected with a node between the VBP terminal and the second group of resistors, triode D3's base, electric capacity C6 one end and resistance R31's one end all link to each other with the node between VCP end and the third group resistance, triode D1, D2, D3's collecting electrode and projecting pole, electric capacity C4, the C6 other end, the resistance R21 other end, the resistance R26 other end, the resistance R31 other end all links to each other with the node between VN end and the fourth group resistance, the node between VN end and the fourth group resistance passes through electric capacity C7 ground connection, the VAP end, the VBP end, VCP end and VN end still link to each other with measurement MCU2 respectively, UA end, UB end, UC end and UN end link to each other with voltage transformer respectively.

Preferably, the busbar temperature detection circuit comprises at least one group of busbar temperature detection sub-circuits, each busbar temperature detection sub-circuit comprises a resistor R7, a resistor R9, a capacitor C24, a capacitor C26, an operational amplifier U5A, TA _ IN end and a TA _ AD end, the resistor R7 and the capacitor C26 are sequentially connected between a node NFC _ VCC and ground IN series, a node between the resistor R7 and the capacitor C26 is connected with the TA _ IN end and connected with a non-inverting input end of the operational amplifier U5A, an inverting input end and an output end of the operational amplifier U5A are connected, an output end of the operational amplifier U5A is connected with the ground through the resistor R9 and the capacitor C24 which are sequentially connected IN series, the TA _ AD end is connected with a node between the resistor R9 and the capacitor C24, the TA _ IN end and a node between the capacitor C26 and the ground are respectively connected with a temperature acquisition thermistor, and the TA _ AD end is connected with the wireless communication MCU 3.

The utility model discloses intelligent controller, its main processor circuit module can realize the current protection function of circuit breaker, therefore even if become invalid from the processor circuit module, also can not cause the influence to the safety and the reliability of the core function-current protection of controller; the slave processor circuit module is used for realizing functions different from the master processor circuit module and realizing multi-core function design, so that the functional requirements of a master processor MCU1 of the master processor circuit module can be simplified and reduced, the load of the master processor MCU1 is reduced, and the service life of the master processor MCU1 is prolonged; along with the promotion of intelligent demand, wireless communication and human-computer interaction need increase gradually, the utility model discloses set up special wireless communication MCU3 and human-computer interaction MCU4, will intelligent control ware's function dispersion to main processor MCU1 and respectively from the processor, the operating efficiency is high, and main processor MCU1 and individual from the MCU that can adopt structure and function simple relatively, are favorable to reducing intelligent control ware's manufacturing cost.

Drawings

Fig. 1 is a schematic diagram of functional modules of the intelligent controller of the present invention;

fig. 2 is a circuit schematic diagram of the main processor MCU1 of the present invention;

FIG. 3 is a schematic diagram of the EEPROM circuit of the present invention;

fig. 4 is a schematic diagram of the USB interface circuit of the present invention;

fig. 5 is a schematic diagram of the FLASH memory circuit of the present invention;

fig. 6 is a schematic diagram of the clock chip circuit of the present invention;

FIG. 7 is a schematic circuit diagram of a first slave processor circuit module according to the present invention;

fig. 8 is an enlarged schematic diagram of a portion a of fig. 7 according to the present invention, showing a structure of a second current sampling circuit;

fig. 9 is an enlarged schematic diagram of a portion B of fig. 7 according to the present invention, showing a structure of a circuit of the metering MCU 2;

fig. 10 is an enlarged schematic view of a portion C of fig. 7, illustrating the structure of the voltage sampling circuit;

FIG. 11 is a circuit schematic of a second slave processor circuit block according to the present invention;

fig. 12 is a schematic diagram of the NFC circuit of the present invention;

fig. 13 is a schematic diagram of a bus bar temperature detection circuit of the present invention;

fig. 14 is a schematic diagram of a touch liquid crystal display circuit according to the present invention.

Detailed Description

The following describes the embodiment of the intelligent controller according to the present invention with reference to fig. 1 to 14. The intelligent controller of the present invention is not limited to the description of the following embodiments.

The utility model discloses an intelligent controller for install on the circuit breaker, it includes the master processor circuit module and a plurality of from processor circuit module, the master processor circuit module includes master processor MCU1, every is from the processor including linking with master processor MCU1 and is from the processor; the main processor circuit module is at least used for realizing the current protection function and/or the voltage protection function of the circuit breaker; each slave processor circuit module is used for realizing the functions different from those of the master processor circuit module.

As shown in fig. 1, it is an embodiment of the present invention.

As shown in fig. 1, the intelligent controller of this embodiment includes a master processor circuit module and three slave processor circuit modules, where the three slave processor circuit modules are respectively connected with the master processor circuit module; the main processor circuit module comprises a main processor MCU1; the master processor MCU1 is at least used for realizing the current protection function and/or the voltage protection function of the circuit breaker, and the three slave processor circuit modules are respectively a first slave processor circuit module, a second slave processor circuit module and a third slave processor circuit module; the first slave processor circuit module is a metering MCU2 and is used for accurately measuring the current and the voltage of a circuit where the circuit breaker is located and carrying out power calculation according to the measured current and voltage, for example, the total active/apparent power measurement and effective value calculation and fundamental wave active/reactive power measurement are realized; the second slave processor circuit module is a wireless communication MCU3 and is used for wirelessly communicating with an external circuit; and the third processor circuit module takes a human-computer interaction MCU4 as a processor and is used for realizing the human-computer interaction function of the intelligent controller.

The utility model discloses intelligent controller, its main processor circuit module can realize the current protection function of circuit breaker, therefore even from the failure of processor circuit module, also can not cause the influence to the safety and the reliability of the core function-current protection of controller; the slave processor circuit module is used for realizing the functions different from the master processor circuit module, so that the functional requirements of the master processor MCU1 of the master processor circuit module can be simplified and reduced, the load of the master processor MCU1 is reduced, and the service life of the master processor MCU1 is prolonged; along with the promotion of intelligent demand, wireless communication and human-computer interaction need increase gradually, the utility model discloses set up special wireless communication MCU3 and human-computer interaction MCU4, will intelligent control's function dispersion to main processor MCU1 and respectively from the processor, realize many nuclear functional design, consequently main processor MCU1 and individual from the MCU that can adopt structure and function simple relatively from the processor, be favorable to reducing intelligent control's cost.

It should be noted that, the intelligent controller of this embodiment may be provided with more slave processor circuit modules according to actual needs.

As shown in fig. 1-6, is one embodiment of the main processor circuit block.

The current protection function comprises a short circuit protection function and/or an overload protection function; the voltage protection function comprises an overvoltage protection function, and/or an undervoltage protection function, and/or an open-phase protection function and the like; the above are all the prior art in the field, and are not described in detail.

The main processor MCU1 is also used for self-checking of the intelligent controller.

As shown in fig. 1, the main processor circuit module further includes a first current sampling circuit connected to the main processor MCU1, a switch state detection circuit for detecting a current state of the circuit breaker, and an execution driving circuit for driving a magnetic pole coil of the circuit breaker to operate to drive an operating mechanism of the circuit breaker to trip, where the first sampling circuit is configured to collect a current of the circuit breaker, the switch state detection circuit is configured to detect a current state of the circuit breaker, and the current state of the circuit breaker preferably includes a closing state, an opening state, and a tripping state; the main processor MCU1, the first current sampling circuit, the switch detection circuit and the execution driving circuit are matched to realize the short-circuit protection function of the circuit breaker. Furthermore, the current sampling circuit samples the current of the circuit where the circuit breaker is located through the current transformer. The switch state detection circuit is connected with a microswitch arranged at the moving contact or the operating mechanism, when the moving contact or the operating mechanism moves to a switching-on position, a switching-off position or a tripping and tripping position, the corresponding microswitch is triggered to switch over, and the switch state detection circuit determines that the switch is currently in a switching-on state, a switching-off state or a tripping state by monitoring the state of the microswitch. When the main processor circuit module judges that a fault such as a short circuit exists, for example, the short circuit exists based on the current signal collected by the current sampling circuit, the tripping trip of the circuit breaker is triggered by the execution driving circuit.

As shown in fig. 1, the master processor circuit module further includes a power circuit connected to the master processor MCU1, where the power circuit supplies power to the master processor circuit module and to the three slave processor circuit modules, as well as to the switch state detection circuit and the execution drive circuit. Further, the master processor MCU1 is connected with each slave processor through an I/O output (serial port) to be in communication connection with each slave processor and control the power supply of each slave processor to enable, and control the power supply of each slave processor.

As shown in fig. 1, the main processor circuit module further includes a DI/DO circuit, the main processor MCU1 is connected to an external circuit through the DI/DO circuit, and controls the power supply of each slave processor by controlling a controllable switch connected between the power circuit and each slave processor to enable the power supply of each slave processor, and controlling the power supply of each slave processor; the controllable switch is a semiconductor switch such as a triode, an MOS tube and the like or a mechanical switch such as a relay and the like.

As shown in fig. 1, the main processor circuit module further includes an EEPROM circuit, and the EEPROM circuit is used to store the product information setting parameters of the intelligent controller. Further, as shown in fig. 2-3, the EEPROM circuit includes a chip U15, and a 5 th pin (SDA pin) and a6 th pin (SCL pin) of the chip U15 are respectively connected to a 93 th pin (PB 7 pin) and a 92 th pin (PB 6 pin) of the main processor MCU1. Further, as shown in fig. 3, the 4 th pin (GND pin) of the chip U15 is grounded, and the 8 th pin (VCC pin) is connected to the operating power supply.

Preferably, the model of the chip U15 is FM24CL16.

As shown in fig. 1, the main processor circuit module further includes a FLASH memory circuit connected to the main processor MCU1, where the FLASH memory circuit is used to store breaker information, and the breaker information includes fault information and operation records. Further, as shown in fig. 2 and 5, the FLASH circuit includes a chip U23, and a1 st pin (i) (of the chip U23)

Pin, 2 nd pin (DO pin), 3 rd pin (DO pin) (d pin)

Pin), the 5 th pin (DI pin), and the 6 th pin (CLK pin) are connected to a 86 th pin (PD 5 pin), a 91 th pin (PB 5 pin), an 85 th pin (PD 4 pin), a 90 th pin (PB 4/JNTRST pin), and an 89 th pin (PB 3/JTDO pin) of the main processor MCU1, respectively. Further, as shown in fig. 5, the 4 th pin (GND pin) of the chip 23 is grounded, and the 8 th pin (VCC pin) is connected to the operating power supply.

Preferably, the model of the chip U23 is GD25Q64ESIGR.

As shown in fig. 1, the main processor circuit module further includes a wired communication circuit connected to the main processor MCU1, where the wired communication circuit includes a wired communication interface, and the wired communication interface includes a USB interface and/or an RS485 interface and/or a CAN interface.

Specifically, the wired communication circuit comprises two RS485 communication circuits and two CAN communication circuits.

As shown in fig. 4, it is a preferred implementation manner of the USB interface: the USB interface includes a connector J1. Further, the connector J1 is a type-C connector.

Specifically, as shown in fig. 4, the connector J1 includes an A6 pin (D + pin) and an A7 pin (D-pin), and the connector J1 is connected to the 70 th pin (PA 11 pin) and the 71 th pin (PA 12 pin) of the main processor MCU1 through the A6 pin (D + pin) and the A7 pin (D-pin).

As shown in fig. 1, the main processor circuit module further includes an indication and key circuit connected to the main processor MCU1.

As shown in fig. 1, the main processor circuit module further includes a clock chip circuit connected to the main processor MCU1, and as shown in fig. 2 and 6, the clock chip circuit includes a chip U16, and a 5 th pin (SDA pin) and a6 th pin (SCL pin) of the chip U16 are respectively connected to a 48 th pin (PB 11 pin) and a 47 th pin (PB 10 pin) of the main processor MCU1. Further, as shown in fig. 6, the 4 th pin (VSS pin) and the 2 nd pin (OSCO pin) of the chip U16 are connected to ground, and the 8 th pin (VCC pin) of the chip U16 is connected to the operating power supply.

7-10, one embodiment of the first slave processor circuit, which is preferably a high precision measurement circuit.

The metering MCU2 is a three-phase electric energy metering IC with the model number of ADE7880, a serial interface is adopted, a current signal and a voltage signal of a circuit where the circuit breaker is located are collected through a second current sampling circuit and a voltage sampling circuit, a sigma-delta type digital converter (ADC), a digital integrator, a reference voltage source circuit and a signal processing circuit are arranged in the metering MCU2, and total (fundamental wave and harmonic wave) active/apparent power measurement and effective value calculation and fundamental wave active/reactive power measurement are realized according to the collected current signal and voltage signal; the metering MCU2 also transmits data to the main processor MCU1 through serial port communication, and the main processor MCU1 can realize a current protection function and/or a voltage protection function through current and voltage data provided by the metering MCU 2.

It should be particularly noted that the main processor MCU1 directly collects current signals through the first current sampling circuit, and can acquire processed current and voltage data through the metering MCU2, when the metering MCU2 is not started or fails, the main processor MCU1 can realize an important short-circuit protection function, and after the metering MCU2 is started, the main processor MCU1 can acquire the processed current and voltage data through the metering MCU2, thereby reducing the load of the main processor MCU1.

As shown in fig. 8, which is a preferred implementation manner of the second current sampling circuit, the second current sampling circuit includes four sets of current sampling sub-circuits with the same circuit structure, and the four sets of current sampling sub-circuits respectively collect a \ B \ C \ N phase currents of a circuit where the circuit breaker is located. Taking a current sampling sub-circuit for collecting the phase A current as an example to explain: the current sampling branch current comprises resistors R31-38, capacitors C20-24, a triode D4, an IA _ P end, an IA _ N end, an IAP end and an IAN end, wherein resistors R31-33 are sequentially connected between the IA _ P end and the IAP end in series, resistors R36-38 are sequentially connected between the IA _ N end and the IAN end in series, a1 st pin (namely a base) of the triode D4 is connected with a node between the resistor R31 and the resistor R32, a 2 nd pin and a 3 rd pin (namely a collector and an emitter) of the triode D4 are connected with a node between the resistor R36 and the resistor R37, one end of the resistor R34 is connected with a node between the resistor R31 and the resistor R32, the other end of the resistor R35 is connected with one end of the resistor R35, the other end of the resistor R35 is connected with a node between the resistor R36 and the resistor R37, one end of a capacitor C20 is connected with a node between the resistor R32 and the resistor R33, the other end of the capacitor C20 is connected with one end of a capacitor C23, the other end of the capacitor C23 is connected with a node between the resistor R37 and the resistor R38, one end of a capacitor C21 is connected with a node between the resistor R33 and the IAP end, the other end of the capacitor C21 is connected with one end of a capacitor C24, the other end of the capacitor C24 is connected with a node between the resistor R38 and the IAN end, a node between the resistor R34 and the resistor R35, a node between the capacitor C20 and the capacitor C23, and a node between the capacitor C21 and the capacitor C24 are sequentially connected and grounded, the IA _ P end and the IA _ N end are respectively connected with a current transformer, and the IAP end and the IAN end are respectively connected with the metering MCU 2.

As shown in fig. 10, in a preferred implementation of the voltage sampling circuit, the voltage sampling circuit includes resistors R16-33, R76-81, capacitors C4-6, transistors D1-3, VAP terminals, VBP terminals, VCP terminals, VN terminals, UA terminals, UB terminals, UC terminals, and UN terminals, resistors R16, R76-77, and resistors R17-20 form a first group of resistors, a plurality of resistors of the first group of resistors are sequentially connected in series between VAP terminals and UA terminals, resistors R78-79, and resistors R22-25 form a second group of resistors, a plurality of resistors of the second group of resistors are sequentially connected in series between VBP terminals and UB terminals, resistors R27-30, and resistors R80-81 form a third group of resistors, a plurality of resistors of the third group of resistors are sequentially connected in series between VCP terminals and UC terminals, resistors R32-33 form a fourth group of resistors, a plurality of resistors of the fourth group of resistors are sequentially connected in series between VN terminals and UN terminals, the base electrode of the triode D1, one end of the capacitor C4 and one end of the resistor R21 are connected with a node between the VAP end and the resistor R16, the base electrode of the triode D2, one end of the capacitor C5 and one end of the resistor R26 are connected with a node between the VBP end and the resistor R78, the base electrode of the triode D3, one end of the capacitor C6 and one end of the resistor R31 are connected with a node between the VCP end and the resistor R27, the collector and emitter electrodes of the triodes D1-3, the other end of the capacitor C4-6, the other end of the resistor R21, the other end of the resistor R26 and the other end of the resistor R31 are connected with a node between the VN end and the resistor R32, the node between the VN end and the resistor R32 is grounded through the capacitor C7, the VAP end, the VBP end, the VCP end and the VN end are further connected with the metering MCU2 respectively, and the UA end, the UB end, the UC end and the UN end are connected with the voltage transformer respectively.

As shown in fig. 9, the metering MCU2 includes a7 th pin (IAP pin), an 8 th pin (IAN pin), a9 th pin (IBP pin), a12 th pin (IBN pin), a 13 th pin (ICP pin), a 14 th pin (ICN pin), a 15 th pin (INP pin), and a 16 th pin (INN pin), which are respectively connected to an IAP terminal, an IAN terminal, an IBP terminal, an IBN terminal, an ICP terminal, an ICN terminal, an INP terminal, and an INN terminal of the second current sampling circuit; the metering MCU2 further comprises a 23 rd pin (VAP pin), a 22 nd pin (VBP pin), a 19 th pin (VCP pin) and an 18 th pin (VN pin), and the 23 th pin (VAP pin), the 22 nd pin (VBP pin), the 19 th pin (VCP pin) and the 18 th pin (VN pin) are respectively connected with a VAP end, a VBP end, a VCP end and a VN end of the voltage sampling circuit.

11-13, one embodiment of the second slave processor circuit block, which is preferably a wireless communication circuit.

The wireless communication MCU3 is a low-power-consumption Bluetooth communication chip with the model number of NRF 52832.

The second slave processor circuit module comprises an NFC circuit, a busbar temperature detection circuit and an ambient temperature detection circuit which are respectively connected with the wireless communication MCU3, and the wireless communication MCU3 respectively provides a working power supply for the NFC circuit, the busbar temperature detection circuit and the ambient temperature detection circuit. Further, the wireless communication MCU3 collects temperature data through the busbar temperature detection circuit and the environment temperature detection circuit and transmits the temperature data to the main processor MCU1. In addition, the main processor MCU1 can also be in wireless connection communication with a matched accessory module or equipment such as an upper computer through the wireless communication MCU3, and can realize remote control of a circuit breaker, power line carrier communication, 5G and the like.

As shown in fig. 12, a preferred implementation manner of the NFC circuit includes a chip U4, a 5 th pin (SDA pin) of the chip U4 is connected to a 48 th pin (VDD pin), a 13 th pin (VDD pin), a 24 th pin (P0.21/RESET pin), and a 36 th pin (VDD pin) of the wireless communication MCU3 through a resistor R11, a6 th pin (SCL pin) through a resistor R12, and a7 th pin (GPO pin) through a resistor R13 and an 8 th pin (VCC pin), and both are connected to a node NFC _ VCC; the 7 th pin, the 6 th pin and the 5 th pin of the chip U4 are respectively connected with the 29 th pin (P0.24 pin), the 28 th pin (P0.23 pin) and the 27 th pin (P0.23 pin) of the wireless communication MCU3, the 2 nd pin (AC 0 pin) and the 3 rd pin (AC 1 pin) of the chip U4 are connected with the NFC antenna, the 2 nd pin and the 3 rd pin are connected through a capacitor C21, and the 4 th pin (VSS pin) of the chip U4 is grounded.

Preferably, the model of the chip U4 is ST25DV16K.

As shown in fig. 13, a preferred embodiment of the busbar temperature detecting circuit includes four groups of busbar temperature detecting sub-circuits with the same structure, which are respectively used for detecting the temperature of the a/B/C/N phase busbar. The following description will be made by taking a sub-circuit for detecting the temperature of the a-phase busbar as an example: the sub-circuit comprises a resistor R7, a resistor R9, a capacitor C24, a capacitor C26, an operational amplifier U5A, TA _ IN end and a TA _ AD end, wherein the resistor R7 and the capacitor C26 are sequentially connected between a node NFC _ VCC and ground IN series, a node between the resistor R7 and the capacitor C26 is connected with the TA _ IN end and is connected with a non-inverting input end of the operational amplifier U5A, an inverting input end and an output end of the operational amplifier U5A are connected, an output end of the operational amplifier U5A is connected with ground through the resistor R9 and the capacitor C24 which are sequentially connected IN series, the TA _ AD end is connected with a node between the resistor R9 and the capacitor C24, the TA _ IN end and a node between the capacitor C26 and the ground are respectively connected with a temperature acquisition thermistor, and the TA _ AD end is connected with a fourth pin (P0.02/AIN 0 pin) of the wireless communication MCU 3.

As shown in part D of fig. 11, a preferred embodiment of the ambient temperature detection circuit includes a transistor Q1, a1 st pin (VDD pin) of which is connected to the NFC _ VCC node, a 2 nd pin (Vout pin) of which is connected to a 43 rd pin (P0.31/AIN 7 pin) of the wireless communication MCU3, and a 3 rd pin (Vss pin) of which is grounded.

As shown in FIG. 14, the third slave processor circuit block is an embodiment of the third slave processor circuit block, and is preferably a touch liquid crystal display circuit.

The human-computer interaction MCU4 receives data of the main processor MCU1 through the serial port to control liquid crystal display contents, and the human-computer interaction MCU can also transmit touch operation contents of a user on the liquid crystal display to the main processor MCU1 through the serial port to realize data interaction.

Referring to fig. 2 and 14, the third processor circuit module includes a polar capacitor C28, a resistor R45, a resistor R47, a transistor Q1, a field-effect transistor Q2, and an interface JP1, wherein a1 st pin (i.e., a base) of the transistor Q1 is connected to a drain of the field-effect transistor Q2 through the resistor R, a negative electrode of the polar capacitor C28 is grounded, a positive electrode thereof is connected to a 2 nd pin (an emitter) of the transistor Q1, a node between the capacitor C28 and the 2 nd pin of the transistor Q1 is connected to a +5V power supply, the 2 nd pin and the 1 st pin of the transistor Q1 are connected through the resistor R45, a 3 rd pin (a collector) of the transistor Q1 is connected to 1 st-3 rd pins of the interface JP1, 5 th-7 th pins of the interface JP1 are connected to a 69 th pin (a 10 th pin), a 68 th pin (a 9 th pin), a 66 th pin (a 9 th pin) of the main processor MCU1, 8 th-10 th pin of the interface JP1 is grounded, a1 st pin (a gate) of the field-effect transistor Q2 is connected to a source (a resistor R47) of the main processor MCU1, and a 2 nd pin (a source) of the field-effect transistor Q2 is connected to a source of the interface JP1 through a resistor R47.

Preferably, as shown in fig. 14, the interface JP1 is a patch PFC connector.

The foregoing is a more detailed description of the present invention, taken in conjunction with the specific preferred embodiments thereof, and it is not intended that the invention be limited to the specific embodiments shown and described. To the utility model belongs to the technical field of ordinary technical personnel, do not deviate from the utility model discloses under the prerequisite of design, can also make a plurality of simple deductions or replacement, all should regard as belonging to the utility model discloses a protection scope.

Claims

1. An intelligent controller comprises a main processor circuit module; the method is characterized in that: the intelligent controller also comprises at least three slave processor circuit modules, each master processor circuit module comprises a master processor MCU1, and each slave processor circuit module comprises a slave processor connected with the master processor MCU1;

the at least three slave processor circuit modules include:

the first slave processor circuit module is a metering MCU2 and is used for accurately measuring the current and the voltage of a circuit where the circuit breaker is located and carrying out power calculation according to the measured current and voltage;

2. The intelligent controller of claim 1, wherein: the main processor circuit module further comprises a first current sampling circuit, a switch state detection circuit and an execution driving circuit, wherein the first current sampling circuit, the switch state detection circuit and the execution driving circuit are respectively connected with the main processor MCU1, the first current sampling circuit is used for collecting current of a circuit where the circuit breaker is located, the switch state detection circuit is used for detecting the current state of the circuit breaker, and the execution driving circuit is used for driving a magnetic pole coil of the circuit breaker to act.

3. The intelligent controller according to claim 1 or 2, wherein: the main processor circuit module further comprises a power supply circuit, a DI/DO circuit, an EEPROM circuit, a FLASH storage circuit, a wired communication circuit, an indication and key circuit and a clock chip circuit which are respectively connected with the main processor MCU1, the main processor MCU1 is in communication connection with an external circuit through the DI/DO circuit, the EEPROM circuit is used for storing product information setting parameters of the intelligent controller, the FLASH storage circuit is used for storing breaker information, the breaker information comprises fault information and operation records, the wired communication circuit comprises a wired communication interface, and the wired communication interface comprises a USB interface and/or an RS485 interface and/or a CAN interface.

4. The intelligent controller according to claim 1, wherein: the intelligent controller also comprises a power supply circuit for supplying power to the main processor circuit module and each slave processor circuit module, the main processor MCUI is in communication connection with each slave processor through I/O output, and the power supply enabling of each slave processor is controlled through controlling a controllable switch connected between the power supply circuit and each slave processor.

5. The intelligent controller of claim 1, wherein: the first slave processor circuit module further comprises a second current sampling circuit and a voltage sampling circuit which are respectively connected with the metering MCU 2.

6. The intelligent controller of claim 1, wherein: the second slave processor circuit module further comprises an NFC circuit, a busbar temperature detection circuit and an environment temperature detection circuit which are respectively connected with the wireless communication MCU 3.

7. The intelligent controller according to claim 1, wherein: the wireless communication MCU3 is a Bluetooth communication chip with the model number of NRF 52832; the metering MCU2 is a three-phase electric energy metering IC with the model number of ADE 7880; the third slave processor circuit module is a touch liquid crystal display circuit.

8. The intelligent controller according to claim 5, wherein: the second current sampling circuit comprises at least one group of current sampling sub-circuits, the current sampling sub-circuits comprise triodes D4, IA _ P ends, IA _ N ends, IAP ends and IAN ends, resistors R31, R32 and R33 are sequentially connected between the IA _ P end and the IAP end in series, resistors R36, R37 and R38 are sequentially connected between the IA _ N end and the IAN end in series, the base electrode of the triode D4 is connected with a node between the resistor R31 and the resistor R32, the collector electrode and the emitter electrode of the triode D4 are connected with a node between the resistor R36 and the resistor R37, one end of the resistor R34 is connected with a node between the resistor R31 and the resistor R32, the other end of the resistor R35 is connected with one end of the resistor R35, the other end of the resistor R35 is connected with a node between the resistor R36 and the resistor R37, one end of a capacitor C20 is connected with a node between the resistor R32 and the resistor R33, the other end of the capacitor C20 is connected with one end of a capacitor C23, the other end of the capacitor C23 is connected with a node between the resistor R37 and the resistor R38, one end of a capacitor C21 is connected with a node between the resistor R33 and the IAP end, the other end of the capacitor C21 is connected with one end of a capacitor C24, the other end of the capacitor C24 is connected with a node between the resistor R38 and the IAN end, a node between the resistor R34 and the resistor R35, a node between the capacitor C20 and the capacitor C23, and a node between the capacitor C21 and the capacitor C24 are sequentially connected and grounded, the IA _ P end and the IA _ N end are respectively connected with a current transformer, and the IAP end and the IAN end are respectively connected with the metering MCU 2.

9. The intelligent controller according to claim 5, wherein: the voltage sampling circuit comprises a VAP end, a VBP end, a VCP end, a VN end, a UA end, a UB end, a UC end and a UN end, a first group of resistors are connected between the VAP end and the UA end in series, a second group of resistors are connected between the VBP end and the UB end in series, a third group of resistors are connected between the VCP end and the UC end in series, a fourth group of resistors are connected between the VN end and the UN end in series, a base electrode of a triode D1, one end of a capacitor C4 and one end of a resistor R21 are connected with a node between the VAP end and the first group of resistors, a base electrode of a triode D2, one end of a capacitor C5 and one end of a resistor R26 are connected with a node between the VBP end and the second group of resistors, triode D3's base, electric capacity C6 one end and resistance R31's one end all link to each other with the node between VCP end and the third group resistance, triode D1, D2, D3's collecting electrode and projecting pole, electric capacity C4, the C6 other end, the resistance R21 other end, the resistance R26 other end, the resistance R31 other end all links to each other with the node between VN end and the fourth group resistance, the node between VN end and the fourth group resistance passes through electric capacity C7 ground connection, the VAP end, the VBP end, VCP end and VN end still link to each other with measurement MCU2 respectively, UA end, UB end, UC end and UN end link to each other with voltage transformer respectively.

10. The intelligent controller according to claim 6, wherein: the busbar temperature detection circuit comprises at least one group of busbar temperature detection sub-circuits, each busbar temperature detection sub-circuit comprises a resistor R7, a resistor R9, a capacitor C24, a capacitor C26, an operational amplifier U5A, TA _ IN end and a TA _ AD end, the resistor R7 and the capacitor C26 are sequentially connected between a node NFC _ VCC and the ground IN series, a node between the resistor R7 and the capacitor C26 is connected with the TA _ IN end and connected with a non-inverting input end of the operational amplifier U5A, an inverting input end and an output end of the operational amplifier U5A are connected, an output end of the operational amplifier U5A is connected with the ground through the resistor R9 and the capacitor C24 which are sequentially connected IN series, the TA _ AD end is connected with a node between the resistor R9 and the capacitor C24, the TA _ IN end and a node between the capacitor C26 and the ground are respectively connected with a temperature acquisition thermistor, and the TA _ AD end is connected with the wireless communication MCU 3.