CN218274628U - Micro LED flip chip - Google Patents

Micro LED flip chip Download PDF

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CN218274628U
CN218274628U CN202222441139.2U CN202222441139U CN218274628U CN 218274628 U CN218274628 U CN 218274628U CN 202222441139 U CN202222441139 U CN 202222441139U CN 218274628 U CN218274628 U CN 218274628U
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micro
protective layer
type electrode
microparticle
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李漫铁
余亮
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Ledman Optoelectronic Co Ltd
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Ledman Optoelectronic Co Ltd
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Abstract

The utility model provides a Micro LED flip chip, which comprises a substrate, and an N-type electrode layer, a multi-quantum well layer and a P-type electrode layer which are arranged on the surface of the substrate in sequence; a first protective layer and a first microparticle conducting layer are arranged on one surface, far away from the substrate, of the N-type electrode layer, the first protective layer and the first microparticle conducting layer are in patterning complementation, and both the first protective layer and the first microparticle conducting layer are in contact with the N-type electrode layer; and a second protective layer and a second microparticle conducting layer are arranged on one surface, far away from the substrate, of the P-type electrode layer, the second protective layer and the second microparticle conducting layer are in patterning complementation, and both the second protective layer and the second microparticle conducting layer are in contact with the P-type electrode layer. The utility model provides a risk that Micro LED flip chip can avoid appearing the continuous tin short circuit.

Description

Micro LED flip chip
Technical Field
The utility model belongs to the technical field of the LED chip, concretely relates to Micro LED flip chip.
Background
The LED lamp is a lighting lamp widely applied at present, has the advantages of small volume, high brightness, low power consumption, less heat generation, long service life, environmental protection and the like, has various colors, and is deeply loved by consumers.
The production of LED lamps can be roughly divided into three steps: firstly, the LED luminous chip is manufactured, secondly, the circuit board is manufactured, the LED luminous chip is packaged, and thirdly, the LED lamp is assembled. The most important part in the LED lamp is an LED light-emitting chip, the main body of the LED light-emitting chip is a light-emitting PN junction and mainly comprises an N-type semiconductor, a P-type semiconductor and a light-emitting layer clamped between the N-type semiconductor and the P-type semiconductor, and metal electrodes are respectively arranged on the N-type semiconductor and the P-type semiconductor and emit light after being electrified.
The Micro LED display technology is a display technology in which a self-luminous micron-sized LED is used as a light-emitting pixel unit and is assembled on a driving panel to form an LED array, and because of the characteristics of small size, high integration, self-luminescence and the like, compared with the conventional LCD and OLED technologies, the Micro LED has greater advantages in brightness, contrast, resolution, energy consumption, response speed and the like, and is known as an ultimate display technology in the LED display industry.
Although the Micro LED display technology has significant advantages, the Micro LED flip chip is generally plated with gold or tin directly on the N-type electrode layer and the P-type electrode layer, and the electrode pitch of the Micro LED flip chip is very small, so that the risk of tin-connected short circuit is easily caused when a common soldering material is used.
Therefore, in the art, it is desirable to develop a Micro LED flip chip to avoid the risk of a tin-link short circuit when using common solder materials.
SUMMERY OF THE UTILITY MODEL
Not enough to prior art, the utility model aims to provide a Micro LED flip chip.
In order to achieve the purpose, the utility model adopts the following technical proposal:
the utility model provides a Micro LED flip chip, which comprises a substrate, and an N-type electrode layer, a multi-quantum well layer and a P-type electrode layer which are arranged on the surface of the substrate in sequence;
a first protective layer and a first microparticle conducting layer are arranged on one surface, far away from the substrate, of the N-type electrode layer, patterning of the first protective layer and patterning of the first microparticle conducting layer are complementary, and the first protective layer and the first microparticle conducting layer (referred to as the first protective layer and the first microparticle conducting layer) are both in contact with the N-type electrode layer;
and a second protective layer and a second microparticle conducting layer are arranged on one surface, far away from the substrate, of the P-type electrode layer, the second protective layer and the second microparticle conducting layer are in patterning complementation, and both the second protective layer and the second microparticle conducting layer (referred to as the second protective layer and the second microparticle conducting layer) are in contact with the P-type electrode layer.
The Micro LED flip chip comprises a substrate, and an N-type electrode layer, a multi-quantum well layer and a P-type electrode layer which are sequentially arranged on the surface of the substrate, wherein the N-type electrode layer is arranged adjacent to the substrate, and the multi-quantum well layer and the P-type electrode layer are sequentially arranged on one surface, far away from the substrate, of the N-type electrode layer.
The first protective layer and the first microparticle conductive layer are patterned complementarily, which means that the combination of the first protective layer and the first microparticle conductive layer can cover the surface region exposed by the N-type electrode layer and far from the substrate; the second protective layer and the second microparticle conducting layer are patterned complementarily, which means that the combination of the second protective layer and the second microparticle conducting layer can cover the surface area exposed by the P-type electrode layer and far away from the substrate. Of course, the complementary patterning of the first protection layer and the first microparticle conductive layer only means that the shapes of the first protection layer and the first microparticle conductive layer are complementary, and the thicknesses of the first protection layer and the first microparticle conductive layer may be the same or different.
The materials used for the first microparticle conductive layer and the second microparticle conductive layer are known in the prior art, and for example, the microparticle conductive material (nickel plated ball) can be prepared according to the method of chemically plating nickel on the surface of the polyglycidyl methacrylate microsphere disclosed in CN114807912a, and the prepared microparticle conductive material has conductive anisotropy, that is, it has longitudinal conductive and transverse non-conductive properties.
The utility model discloses in, N type electrode layer and P type electrode layer all are provided with the protective layer, and the partial area through to the protective layer carries out the sculpture and can obtain N type electrode region and P type electrode region, then can obtain the microparticle conducting layer through the deposit microparticle conducting material on N type electrode region and P type electrode region. The protective layer and the corpuscle conducting layer act together, and the corpuscle conducting layer is longitudinally conducting and transversely non-conducting, so that the risk of tin-connecting short circuit of the Micro LED flip chip can be avoided in the subsequent welding or packaging process.
As a preferred embodiment of the present invention, the thickness of the first microparticle conductive layer is 1 to 2 micro inches, for example, 1.1 micro inches, 1.2 micro inches, 1.3 micro inches, 1.4 micro inches, 1.5 micro inches, 1.6 micro inches, 1.7 micro inches, 1.8 micro inches, or 1.9 micro inches, and specific point values between the above point values are limited to space and for the sake of brevity, and the present invention does not exhaust the specific point values included in the above range.
As a preferred embodiment of the present invention, the thickness of the second microparticle conductive layer is 1 to 2 micro inches, for example, 1.1 micro inches, 1.2 micro inches, 1.3 micro inches, 1.4 micro inches, 1.5 micro inches, 1.6 micro inches, 1.7 micro inches, 1.8 micro inches, or 1.9 micro inches, and specific point values between the above point values are limited to space and for simplicity, and the present invention does not exhaust the specific point values included in the above range.
As the preferred technical scheme of the utility model, N type electrode layer is N type gallium nitride layer.
As the preferred technical scheme of the utility model, P type electrode layer is P type gallium nitride layer.
As the preferred technical scheme of the utility model, first protective layer is the silica protective layer.
As a preferred embodiment of the present invention, the thickness of the first protective layer is 1 to 2 micro inches, for example, 1.1 micro inch, 1.2 micro inch, 1.3 micro inch, 1.4 micro inch, 1.5 micro inch, 1.6 micro inch, 1.7 micro inch, 1.8 micro inch or 1.9 micro inch, and the specific point values between the above point values are limited to space and for the sake of brevity, and the present invention does not exhaust the specific point values included in the range.
In a preferred embodiment of the present invention, the thickness of the first microparticle conductive layer is equal to or greater than the thickness of the first protective layer, and more preferably, the thickness of the first microparticle conductive layer is the same as the thickness of the first protective layer.
As the preferred technical scheme of the utility model, the second protective layer is the silica protective layer.
As a preferred embodiment of the present invention, the thickness of the second protective layer is 1 to 2 micro inches, for example, 1.1 micro inch, 1.2 micro inch, 1.3 micro inch, 1.4 micro inch, 1.5 micro inch, 1.6 micro inch, 1.7 micro inch, 1.8 micro inch or 1.9 micro inch, and the specific point values between the above point values are limited to space and for the sake of brevity, and the present invention is not exhaustive of the specific point values included in the range.
In a preferred embodiment of the present invention, the thickness of the second microparticle conductive layer is equal to or greater than the thickness of the second protective layer, and more preferably, the thickness of the second microparticle conductive layer is the same as the thickness of the second protective layer.
It should be noted that the present invention is not limited to the thickness of the N-type electrode layer, the multiple quantum well layer and the P-type electrode layer, and the thickness of the N-type electrode layer may be, for example
Figure BDA0003846671000000041
(e.g. in
Figure BDA0003846671000000042
Figure BDA0003846671000000043
Or
Figure BDA0003846671000000044
Etc.), the thickness of the multiple quantum well layer may be 1 to 5 μm (e.g., 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, etc.), and the thickness of the P-type electrode layer may be 1 to 5 μm
Figure BDA0003846671000000045
(e.g. in
Figure BDA0003846671000000046
Or
Figure BDA0003846671000000047
Etc.).
As the preferred technical scheme of the utility model, the substrate is the sapphire substrate.
As the preferred technical scheme of the utility model, the Micro LED flip chip comprises a sapphire substrate, and an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer which are arranged on the surface of the sapphire substrate in sequence;
a silicon dioxide protective layer and a first microparticle conducting layer are arranged on one surface, far away from the sapphire substrate, of the N-type gallium nitride layer, the silicon dioxide protective layer and the first microparticle conducting layer are in patterning complementation, and both the silicon dioxide protective layer and the first microparticle conducting layer are in contact with the N-type gallium nitride layer;
and a silicon dioxide protective layer and a second microparticle conducting layer are arranged on one surface, far away from the sapphire substrate, of the P-type gallium nitride layer, the silicon dioxide protective layer and the second microparticle conducting layer are in patterning complementation, and both the silicon dioxide protective layer and the second microparticle conducting layer are in contact with the P-type gallium nitride layer.
The utility model discloses, there is not special restriction to Micro LED flip chip's preparation method, exemplarily, can adopt following method:
(1) Adopting an LED epitaxial wafer growth process to sequentially grow an LED epitaxial wafer structure on the substrate: the N-type electrode layer, the multi-quantum well layer and the P-type electrode layer;
(2) Sequentially etching the P-type electrode layer and the multiple quantum well layer under the shielding of the graphical mask plate until the N-type electrode layer is etched, and exposing part of the N-type electrode layer;
(3) Depositing a first protective layer on the exposed N-type electrode layer, and depositing a second protective layer on the P-type electrode layer;
(4) Etching an N-type electrode area on the first protective layer, and etching a P-type electrode area on the second protective layer;
(5) Respectively depositing a micro-particle conductive material in the N-type electrode area and the P-type electrode area in the step (4) to form a first micro-particle conductive layer and a second micro-particle conductive layer;
(6) Thinning, polishing and scribing the substrate;
(7) And testing, sorting and packaging.
Compared with the prior art, the utility model discloses following beneficial effect has:
the utility model discloses in, N type electrode layer and P type electrode layer all are provided with the protective layer, and the partial area through to the protective layer carries out the sculpture and can obtain N type electrode region and P type electrode region, then can obtain the microparticle conducting layer through the deposit microparticle conducting material on N type electrode region and P type electrode region. The protective layer and the Micro-particle conducting layer act together, and the Micro-particle conducting layer is longitudinally conducting and transversely non-conducting, so that the risk of tin connection short circuit of the Micro LED flip chip can be avoided in the subsequent welding or packaging process.
Drawings
Fig. 1 is a schematic structural diagram of a Micro LED flip chip provided in embodiment 1;
the solar cell comprises a 1-sapphire substrate, a 2-N type gallium nitride layer, a 3-multi-quantum well layer, a 4-P type gallium nitride layer, a 5-first protective layer, a 6-first microparticle conducting layer, a 7-second protective layer and a 8-second microparticle conducting layer.
Detailed Description
The technical solution of the present invention is further explained by the following embodiments with reference to the drawings. It should be understood by those skilled in the art that the specific embodiments described are merely to aid in understanding the present invention and should not be considered as specific limitations of the present invention.
The fine particle conductive material in the first fine particle conductive layer and the second fine particle conductive layer in the embodiment of the present invention is the nickel-plated microsphere prepared by the preparation method of embodiment 1 in CN114807912 a.
Example 1
In this embodiment, a Micro LED flip chip is provided, and a schematic structural diagram of the Micro LED flip chip is shown in fig. 1, where the Micro LED flip chip includes a sapphire substrate 1 and an N-type gallium nitride layer 2 (with a thickness of 1) sequentially disposed on a surface of the sapphire substrate
Figure BDA0003846671000000061
) A multiple quantum well layer 3 (thickness of 3 μm) and a P-type gallium nitride layer 4 (thickness of 3 μm)
Figure BDA0003846671000000062
);
A first protective layer 5 (a silicon dioxide protective layer with the thickness of 1.5 microinches) and a first microparticle conducting layer 6 (the thickness of 1.5 microinches) are arranged on one surface, away from the sapphire substrate 1, of the N-type gallium nitride layer 2, and the first protective layer 5 and the first microparticle conducting layer 6 are in patterning complementation and are both in contact with the N-type gallium nitride layer 2;
one surface of the P-type gallium nitride layer 4, which is far away from the sapphire substrate 1, is provided with a second protective layer 7 (a silicon dioxide protective layer, the thickness of which is 1.5 microinches) and a second microparticle conducting layer 8 (the thickness of which is 1.5 microinches), and the second protective layer 7 and the second microparticle conducting layer 8 are complementary in a patterning manner and both contact with the P-type gallium nitride layer 4.
The preparation method comprises the following steps:
(1) Adopting a GaN-based LED epitaxial wafer growth process to sequentially grow an LED epitaxial wafer structure on a sapphire substrate: the N-type GaN layer, the multi-quantum well layer and the P-type GaN layer;
(2) Sequentially etching the P-type gallium nitride layer and the multi-quantum well layer under the shielding of the graphical mask plate until the N-type gallium nitride layer is etched, and exposing a part of the N-type gallium nitride layer;
(3) Depositing silicon dioxide on the exposed N-type gallium nitride layer to form a first protective layer, and depositing silicon dioxide on the P-type electrode layer to form a second protective layer;
(4) Etching an N-type electrode area on the first protective layer, and etching a P-type electrode area on the second protective layer;
(5) Respectively depositing a micro-particle conductive material in the N-type electrode area and the P-type electrode area in the step (4) to respectively form a first micro-particle conductive layer and a second micro-particle conductive layer;
(6) And thinning, polishing and scribing the sapphire substrate.
Example 2
In this embodiment, a Micro LED flip chip is provided, which comprises a sapphire substrate and N-type gallium nitride layers (with a thickness of
Figure BDA0003846671000000081
) A multiple quantum well layer (thickness of 3 μm) and a P-type gallium nitride layer (thickness of
Figure BDA0003846671000000082
);
A first protective layer (a silicon dioxide protective layer with the thickness of 1 micro inch) and a first micro-particle conducting layer (the thickness of 1.2 micro inches) are arranged on one surface, away from the sapphire substrate, of the N-type gallium nitride layer, the first protective layer and the first micro-particle conducting layer are in patterning complementation, and both the first protective layer and the first micro-particle conducting layer are in contact with the N-type gallium nitride layer;
one surface of the P-type gallium nitride layer, which is far away from the sapphire substrate, is provided with a second protective layer (a silicon dioxide protective layer with the thickness of 1 micro-inch) and a second micro-particle conducting layer (with the thickness of 1.2 micro-inches), the second protective layer and the second micro-particle conducting layer are in patterning complementation, and the second protective layer and the second micro-particle conducting layer are both in contact with the P-type gallium nitride layer.
The preparation method is the same as example 1.
Example 3
In this embodiment, a Micro LED flip chip is provided, which comprises a sapphire substrate and N-type gallium nitride layers (with a thickness of
Figure BDA0003846671000000083
) A multiple quantum well layer (thickness of 3 μm) and a P-type gallium nitride layer (thickness of
Figure BDA0003846671000000084
);
A first protective layer (a silicon dioxide protective layer with the thickness of 1.8 microinches) and a first microparticle conducting layer (the thickness of 2 microinches) are arranged on one surface, away from the sapphire substrate, of the N-type gallium nitride layer, the first protective layer and the first microparticle conducting layer are in patterning complementation and are in contact with the N-type gallium nitride layer;
one surface of the P-type gallium nitride layer, which is far away from the sapphire substrate, is provided with a second protective layer (a silicon dioxide protective layer with the thickness of 1.8 microinches) and a second microparticle conducting layer (with the thickness of 2 microinches), the second protective layer and the second microparticle conducting layer are in patterning complementation, and the second protective layer and the second microparticle conducting layer are both in contact with the P-type gallium nitride layer.
The preparation method is the same as example 1.
Comparative example 1
In this comparative example, a Micro LED flip chip is provided, which includes a sapphire substrate and N-type gallium nitride layers (having a thickness of
Figure BDA0003846671000000091
) A multiple quantum well layer (thickness of 3 μm) and a P-type gallium nitride layer (thickness of
Figure BDA0003846671000000092
);
A first metal layer (Au, the thickness of which is 1.5 microinches) is arranged on one surface, away from the sapphire substrate, of the N-type gallium nitride layer;
and a second metal layer (Au, the thickness of which is 1.5 microinches) is arranged on one surface of the P-type gallium nitride layer, which is far away from the sapphire substrate.
The preparation method comprises the following steps:
(1) Adopting a GaN-based LED epitaxial wafer growth process to sequentially grow an LED epitaxial wafer structure on a sapphire substrate: the N-type GaN layer, the multi-quantum well layer and the P-type GaN layer;
(2) Sequentially etching the P-type gallium nitride layer and the multi-quantum well layer under the shielding of the graphical mask plate until the N-type gallium nitride layer is etched, and exposing part of the N-type gallium nitride layer;
(3) Depositing Au on the exposed N-type gallium nitride layer to form a first metal layer, and depositing Au on the P-type electrode layer to form a second metal layer;
(4) And thinning, polishing and scribing the sapphire substrate.
The Micro LED flip chip provided by the utility model is provided with the corpuscle conducting layer, so that a secondary printing process is not needed, printing equipment and welding materials are saved, and the cost is reduced; the micro particle conducting layer has the characteristics of conducting electricity in the vertical direction and not conducting electricity in the horizontal direction, so that the problem of tin connection short circuit or water vapor short circuit in the horizontal direction of the micro LED flip chip is avoided unlike the traditional chip; because traditional chip needs positive negative pole interval to keep the certain distance, otherwise positive negative pole short circuit easily, so there is certain restriction to the size of chip, but the utility model provides a chip is provided with the microparticle conducting layer, does not have the short circuit risk of horizontal direction, can be done the size of micro LED flip chip littleer, reduces the cost of chip, does not influence the reliability of chip.
The applicant states that the above description is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto, and those skilled in the art should understand that any changes or substitutions easily conceivable by those skilled in the art within the technical scope of the present invention are within the protection scope and the disclosure scope of the present invention.

Claims (10)

1. A Micro LED flip chip is characterized by comprising a substrate, and an N-type electrode layer, a multi-quantum well layer and a P-type electrode layer which are sequentially arranged on the surface of the substrate;
a first protective layer and a first corpuscle conducting layer are arranged on one surface, far away from the substrate, of the N-type electrode layer, patterning of the first protective layer and patterning of the first corpuscle conducting layer are complementary, and the first protective layer and the first corpuscle conducting layer are both in contact with the N-type electrode layer;
and a second protective layer and a second micro-particle conducting layer are arranged on one surface, far away from the substrate, of the P-type electrode layer, the second protective layer and the second micro-particle conducting layer are complementary in patterning and are both in contact with the P-type electrode layer.
2. A Micro LED flip chip according to claim 1, wherein the first particulate conductive layer has a thickness of 1 to 2 Micro inches.
3. A Micro LED flip chip according to claim 1, wherein the second particulate conductive layer has a thickness of 1 to 2 Micro inches.
4. The Micro LED flip chip of claim 1, wherein the N-type electrode layer is an N-type gallium nitride layer.
5. The Micro LED flip chip of claim 1, wherein the P-type electrode layer is a P-type gallium nitride layer.
6. A Micro LED flip chip according to claim 1, wherein the first protective layer is a silicon dioxide protective layer.
7. The Micro LED flip chip of claim 1, wherein the first protective layer has a thickness of 1 to 2 microinches.
8. A Micro LED flip chip according to claim 1, wherein the second protective layer is a silicon dioxide protective layer.
9. A Micro LED flip chip according to claim 1, wherein the thickness of the second protective layer is 1 to 2 Micro inches.
10. A Micro LED flip chip according to claim 1, wherein said substrate is a sapphire substrate.
CN202222441139.2U 2022-09-15 2022-09-15 Micro LED flip chip Active CN218274628U (en)

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