CN218243334U - MOS tube high-speed isolation driving circuit with three charge-discharge loops - Google Patents
MOS tube high-speed isolation driving circuit with three charge-discharge loops Download PDFInfo
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- CN218243334U CN218243334U CN202221090828.7U CN202221090828U CN218243334U CN 218243334 U CN218243334 U CN 218243334U CN 202221090828 U CN202221090828 U CN 202221090828U CN 218243334 U CN218243334 U CN 218243334U
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Abstract
The utility model discloses a high-speed drive circuit that keeps apart of MOS pipe with three routes charge-discharge circuit belongs to the high-speed drive circuit technical field that keeps apart of MOS pipe, including PWM circuit, photoelectric sensor U1, discharge circuit A, discharge circuit B and charge circuit, PWM circuit output end coupling photoelectric sensor U1, and photoelectric sensor U1's output coupling has discharge circuit A, discharge circuit B and charge circuit, discharge circuit A, discharge circuit B and charge circuit coupling MOS pipe drive circuit, through the PWM signal that adopts CPU to produce, after photoelectric sensor U1 keeps apart and level conversion, drive MOS pipe drive circuit to adopt discharge circuit A, discharge circuit B and charge circuit, reduce the switching loss of MOS pipe, ensure that MOS pipe safe and reliable ground works.
Description
Technical Field
The utility model relates to a high-speed drive circuit that keeps apart of MOS pipe especially relates to the high-speed drive circuit that keeps apart of MOS pipe that has three routes charge-discharge return circuit, belongs to the high-speed drive circuit technical field that keeps apart of MOS pipe.
Background
The MOS tube is a core component in the field of power electronics, and the drive control of the MOS tube directly determines the harmonic size of a power electronic system, the heat productivity, the reliability, the stability and the advancement of equipment.
The drive circuit of the MOS tube is the key point of research and breakthrough in the field of power electronics for a long time, and the improvement of the reliability of the drive circuit can play a subversive role in industries such as power supplies, inverters, frequency converters and the like.
In the prior art, a PWM signal is generated mainly by software, and the PWM signal directly drives an MOS tube, but a hardware circuit cannot control the rising edge time and the falling edge time of the PWM signal at all, so that the time of the MOS tube in an amplification state is prolonged, internal resistance is increased when the MOS tube is in the amplification state, and under the same load current, the MOS tube generates heat due to the prolonged time, so that the serious consequences of tube explosion and the like are caused.
SUMMERY OF THE UTILITY MODEL
The utility model discloses a main objective is in order to provide the high-speed drive circuit that keeps apart of MOS pipe that has three routes charge-discharge circuit, through the PWM signal that adopts CPU to produce, after photoelectric sensor U1 keeps apart and level conversion, drive MOS pipe drive circuit to adopt discharge circuit A, discharge circuit B and charge circuit, reduce the switching loss of MOS pipe, ensure MOS pipe safe and reliable ground and work.
The purpose of the utility model can be achieved by adopting the following technical scheme:
the MOS tube high-speed isolation driving circuit with the three charge-discharge loops comprises a PWM circuit, a photoelectric sensor U1, a discharge loop A, a discharge loop B and a charge loop, wherein the output end of the PWM circuit is coupled with the photoelectric sensor U1, the output end of the photoelectric sensor U1 is coupled with the discharge loop A, the discharge loop B and the charge loop, and the discharge loop A, the discharge loop B and the charge loop are coupled with an MOS tube driving circuit.
Preferably, the PWM circuit includes a resistor R1 and a transistor Q1, one end of the resistor R1 is electrically connected to the c pole of the transistor Q1, the e pole of the transistor Q1 is grounded, the d pole of the transistor Q1 receives the CPU control signal, and the other end of the resistor R1 is electrically connected to the 3.3V power supply.
Preferably, the photoelectric sensor U1 includes a light emitting diode and a phototransistor, an anode of the light emitting diode is electrically connected to one end of the resistor R1, a cathode of the light emitting diode is grounded, a c-pole of the phototransistor is electrically connected to the discharging circuit a, the discharging circuit B and the charging circuit, and an e-pole of the phototransistor is grounded.
Preferably, the discharge circuit a is composed of a gate parasitic capacitor C1, a diode D1 and a photo sensor U1, wherein a C-pole of the phototransistor is electrically connected to a cathode of the diode D1, an anode of the diode D1 is electrically connected to one end of the gate parasitic capacitor C1, and the other end of the gate parasitic capacitor C1 is grounded.
Preferably, the discharge circuit B is composed of a resistor R4 and a gate parasitic capacitor C1, one end of the resistor R4 is grounded, and the other end of the resistor R4 is electrically connected to one end of the gate parasitic capacitor C1.
Preferably, the charging loop is composed of a resistor R2, a resistor R3 and a gate parasitic capacitor C1, one end of the resistor R2 is electrically connected to the 15V power supply, the other end of the resistor R2 is electrically connected to the cathode of the diode D1 and one end of the resistor R3, and the other end of the resistor R3 is electrically connected to one end of the gate parasitic capacitor C1.
Preferably, the MOS transistor driving circuit includes a MOS transistor Q2 and a MOS transistor Q3, the G-pole electrical connection resistor R4 of the MOS transistor Q2, the S-pole electrical connection load R of the MOS transistor Q2, a resistor R5 and a capacitor C3, the other ends of the capacitor C3 and the resistor R5 and the D-pole of the MOS transistor Q2, the D-pole electrical connection resistor R8 and the capacitor C4 of the MOS transistor Q3, the other ends of the resistor R8 and the capacitor C4 are electrically connected to the S-pole of the MOS transistor Q3, and the S-pole of the MOS transistor Q3 is electrically connected to the D-pole of the MOS transistor Q2.
Preferably, the G-pole of the MOS transistor Q3 is electrically connected to one end of the resistor R7, one end of the capacitor C2, one end of the resistor R6, and one end of the anode of the diode D2, the cathode of the diode D2 is electrically connected to the other ends of the resistor R2 and the resistor R6, the other end of the capacitor C2 and the other end of the resistor R7 are grounded, and the other end of the load R is also grounded.
The utility model has the advantages of:
the utility model provides a high-speed drive circuit that keeps apart of MOS pipe with three routes charge-discharge circuit through the PWM signal that adopts CPU to produce, keeps apart and level conversion back through photoelectric sensor U1, drives MOS pipe drive circuit to adopt discharge circuit A, discharge circuit B and charge circuit, reduce the switching loss of MOS pipe, ensure that MOS pipe safe and reliable ground works.
Drawings
Fig. 1 is a circuit diagram of a preferred embodiment of a MOS transistor high-speed isolation driving circuit with three charge-discharge loops according to the present invention.
Detailed Description
In order to make the technical solutions of the present invention clearer and clearer for those skilled in the art, the present invention is further described in detail below with reference to the following examples and drawings, but the embodiments of the present invention are not limited thereto.
As shown in fig. 1, the MOS transistor high-speed isolation driving circuit with three charge-discharge circuits provided in this embodiment includes a PWM circuit, a photo sensor U1, a discharge circuit a, a discharge circuit B, and a charge circuit, where an output end of the PWM circuit is coupled to the photo sensor U1, an output end of the photo sensor U1 is coupled to the discharge circuit a, the discharge circuit B, and the charge circuit, and the discharge circuit a, the discharge circuit B, and the charge circuit are coupled to the MOS transistor driving circuit.
The PWM signal generated by the CPU is used for driving the MOS tube driving circuit after being isolated by the photoelectric sensor U1 and subjected to level conversion, and the discharging loop A, the discharging loop B and the charging loop are used for reducing the switching loss of the MOS tube and ensuring the safe and reliable work of the MOS tube.
In this embodiment, the PWM circuit includes a resistor R1 and a transistor Q1, one end of the resistor R1 is electrically connected to the c pole of the transistor Q1, the e pole of the transistor Q1 is grounded, the d pole of the transistor Q1 receives the CPU control signal, and the other end of the resistor R1 is electrically connected to the 3.3V power supply.
In this embodiment, the photo sensor U1 includes a light emitting diode and a phototransistor, an anode of the light emitting diode is electrically connected to one end of the resistor R1, a cathode of the light emitting diode is grounded, a c-pole of the phototransistor is electrically connected to the discharging circuit a, the discharging circuit B and the charging circuit, and an e-pole of the phototransistor is grounded.
In this embodiment, the discharge circuit a is composed of a gate parasitic capacitor C1, a diode D1 and a photo sensor U1, wherein a C-pole of the photo transistor is electrically connected to a cathode of the diode D1, an anode of the diode D1 is electrically connected to one end of the gate parasitic capacitor C1, and the other end of the gate parasitic capacitor C1 is grounded.
The circuit is a discharging circuit of a grid parasitic capacitor C1, when a PWM driving signal is changed from 1 to 0, the driving signal cannot be changed from 1 to 0 immediately because the voltage at two ends of the grid parasitic capacitor C1 cannot be suddenly changed, and the discharging circuit is connected to the ground through the grid parasitic capacitor C1 via a diode D1 and a phototriode in a photoelectric sensor U1.
When the discharge loop acts, the diode D1 short circuits the resistor R3, so that the discharge time can be reduced, the driving signal is quickly changed from 1 to 0, namely, the time of the MOS tube in an amplification region is reduced, and the heat productivity generated by the switching loss can be greatly reduced.
In this embodiment, the discharge circuit B is composed of a resistor R4 and a gate parasitic capacitor C1, one end of the resistor R4 is grounded, and the other end of the resistor R4 is electrically connected to one end of the gate parasitic capacitor C1.
When the PWM driving signal is changed from 1 to 0, the voltage at two ends of the grid parasitic capacitor C1 cannot change suddenly, the driving signal cannot change from 1 to 0 immediately, and the grid parasitic capacitor C1 of the discharging loop is connected to the ground through the resistor R4, so that the driving signal is changed from 1 to 0 quickly, namely the time of the MOS transistor in an amplification region is reduced, and the heat productivity generated by switching loss can be greatly reduced.
R4 also has a very important function, namely when the PWM signal is 0, the 0 level can be very quickly introduced into the grid electrode of the MOS tube from the ground, so that the MOS tube is very quickly cut off and clamped at the 0 level, and the grid electrode of the MOS tube is ensured not to be in a suspended state when the PWM signal is 0 level.
In this embodiment, the charging loop is composed of a resistor R2, a resistor R3 and a gate parasitic capacitor C1, one end of the resistor R2 is electrically connected to the 15V power supply, the other end of the resistor R2 is electrically connected to the cathode of the diode D1 and one end of the resistor R3, and the other end of the resistor R3 is electrically connected to one end of the gate parasitic capacitor C1.
In the high-level rising edge circuit of the PWM signal, due to the reverse conductivity of the diode D1, the high-level signal of the PWM signal cannot pass through the diode D2, the rising edge time of the driving signal is only determined by the resistance value of the resistor R3 and the gate parasitic capacitor C1 in the charging circuit, the resistance value of the resistor R3 is reduced, the rising edge time of the PWM signal (T = R3C 1) can be reduced, that is, the time of the MOS transistor in the amplification region is reduced, and the heat generation amount caused by the switching loss can be greatly reduced.
In this embodiment, the MOS transistor driving circuit includes a MOS transistor Q2 and a MOS transistor Q3, a G-pole electrical connection resistor R4 of the MOS transistor Q2, an S-pole electrical connection load R of the MOS transistor Q2, a resistor R5 and a capacitor C3, the other ends of the capacitor C3 and the resistor R5 and a D-pole of the MOS transistor Q2, a D-pole electrical connection resistor R8 and a capacitor C4 of the MOS transistor Q3, the other ends of the resistor R8 and the capacitor C4 are electrically connected to an S-pole of the MOS transistor Q3, and an S-pole of the MOS transistor Q3 is electrically connected to a D-pole of the MOS transistor Q2.
In this embodiment, the G-pole of the MOS transistor Q3 is electrically connected to one end of the resistor R7, one end of the capacitor C2, one end of the resistor R6, and one end of the anode of the diode D2, the cathode of the diode D2 is electrically connected to the other ends of the resistor R2 and the resistor R6, the other end of the capacitor C2 and the other end of the resistor R7 are grounded, and the other end of the load R is also grounded.
When the MOS tubes are connected in series, the system voltage can be improved, the resistor R5 and the resistor R8 form a static voltage-sharing circuit, and the capacitor C3 and the capacitor C4 form a dynamic voltage-sharing circuit, so that the MOS tubes can work under safe voltage.
Above, only the further embodiments of the present invention are shown, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can replace or change the technical solution and the concept of the present invention within the protection scope of the present invention.
Claims (8)
1. MOS pipe high speed isolation drive circuit with three routes charge-discharge circuit, its characterized in that: including PWM circuit, photoelectric sensor U1, discharge return circuit A, discharge return circuit B and the return circuit that charges, PWM circuit output coupling photoelectric sensor U1, and photoelectric sensor U1's output coupling has discharge return circuit A, discharge return circuit B and the return circuit that charges, discharge return circuit A, discharge return circuit B and the return circuit coupling MOS pipe drive circuit that charges.
2. The MOS tube high-speed isolation driving circuit with the three-way charging and discharging loop as claimed in claim 1, wherein: the PWM circuit includes resistance R1 and triode Q1, the one end electric connection triode Q1's of resistance R1 c utmost point, triode Q1's e utmost point ground connection, and CPU control signal is received to triode Q1's d utmost point, and resistance R1's other end electric connection 3.3V power.
3. The MOS tube high-speed isolation driving circuit with the three-way charging and discharging loop as claimed in claim 2, wherein: the photoelectric sensor U1 comprises a light emitting diode and a phototriode, wherein the anode of the light emitting diode is electrically connected with one end of a resistor R1, the cathode of the light emitting diode is grounded, the c electrode of the phototriode is electrically connected with a discharging circuit A, a discharging circuit B and a charging circuit, and the e electrode of the phototriode is grounded.
4. The MOS tube high-speed isolation driving circuit with the three-way charging and discharging loop as claimed in claim 3, wherein: the discharging loop A is composed of a grid parasitic capacitor C1, a diode D1 and a photoelectric sensor U1, the C pole of the phototriode is electrically connected with the cathode of the diode D1, the anode of the diode D1 is electrically connected with one end of the grid parasitic capacitor C1, and the other end of the grid parasitic capacitor C1 is grounded.
5. The MOS tube high-speed isolation driving circuit with the three-way charging and discharging loop as claimed in claim 4, wherein: the discharge loop B is composed of a resistor R4 and a grid parasitic capacitor C1, one end of the resistor R4 is grounded, and the other end of the resistor R4 is electrically connected with one end of the grid parasitic capacitor C1.
6. The MOS tube high-speed isolation driving circuit with the three-way charging and discharging loop as claimed in claim 5, wherein: the charging loop is composed of a resistor R2, a resistor R3 and a grid parasitic capacitor C1, one end of the resistor R2 is electrically connected with a 15V power supply, the other end of the resistor R2 is electrically connected with the cathode of the diode D1 and one end of the resistor R3, and the other end of the resistor R3 is electrically connected with one end of the grid parasitic capacitor C1.
7. The MOS tube high-speed isolation driving circuit with the three-way charging and discharging loop as claimed in claim 6, wherein: MOS pipe drive circuit includes MOS pipe Q2 and MOS pipe Q3, MOS pipe Q2 ' S G utmost point electric connection resistance R4, MOS pipe Q2 ' S S utmost point electric connection load R and resistance R5 and electric capacity C3, electric capacity C3 and resistance R5 ' S the other end and MOS pipe Q2 ' S D utmost point, MOS pipe Q3 ' S D utmost point electric connection resistance R8 and electric capacity C4, resistance R8 and electric capacity C4 ' S the other end electric connection MOS pipe Q3 ' S S utmost point, and MOS pipe Q3 ' S S utmost point electric connection MOS pipe Q2 ' S D utmost point.
8. The MOS tube high-speed isolation driving circuit with the three-way charging and discharging loop as claimed in claim 7, wherein: the G pole of the MOS transistor Q3 is electrically connected to one end of the resistor R7, one end of the capacitor C2, one end of the resistor R6, and one end of the anode of the diode D2, the cathode of the diode D2 is electrically connected to the other ends of the resistor R2 and the resistor R6, the other end of the capacitor C2 and the other end of the resistor R7 are grounded, and the other end of the load R is also grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221090828.7U CN218243334U (en) | 2022-05-09 | 2022-05-09 | MOS tube high-speed isolation driving circuit with three charge-discharge loops |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221090828.7U CN218243334U (en) | 2022-05-09 | 2022-05-09 | MOS tube high-speed isolation driving circuit with three charge-discharge loops |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218243334U true CN218243334U (en) | 2023-01-06 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202221090828.7U Active CN218243334U (en) | 2022-05-09 | 2022-05-09 | MOS tube high-speed isolation driving circuit with three charge-discharge loops |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218243334U (en) |
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2022
- 2022-05-09 CN CN202221090828.7U patent/CN218243334U/en active Active
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