CN218229010U - Digital input circuit - Google Patents
Digital input circuit Download PDFInfo
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- CN218229010U CN218229010U CN202222277821.2U CN202222277821U CN218229010U CN 218229010 U CN218229010 U CN 218229010U CN 202222277821 U CN202222277821 U CN 202222277821U CN 218229010 U CN218229010 U CN 218229010U
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- coupler
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Abstract
The utility model discloses a digital input circuit relates to train equipment data processing technology field. Including opto-coupler treater and DI signal input negative pole end, 4 ends of opto-coupler treater U167 are connected with VDD, 3 ends of opto-coupler treater U167 are connected with 6 ends of level conversion chip U136, 1 end and VCC end of level conversion chip U136 are connected, 3 ends ground connection of level conversion chip U136, 5 ends and VCC end of level conversion chip U136 are connected, and 5 ends of level conversion chip U136 are fixed mutually with the one end of electric capacity C74. The optical coupler has a wide working current range, and the circuit has reverse connection prevention treatment and over-current and over-voltage suppression treatment. The safety and the reliability are ensured, extra configuration in the FPGA is not needed, and circuits corresponding to the 24V voltage signal and the 110V voltage signal are not needed to be designed respectively, so that the circuit can be prevented from being burnt due to wrong voltage level signals caused by configuration errors, the applicability of the equipment is improved, and the use of actual equipment is facilitated.
Description
Technical Field
The utility model relates to a train equipment data processing technology field specifically is a digital input circuit.
Background
Trains, i.e. train sets, are divided into two major types, railway trains: i.e., a train, which is a general form. A road train: namely, a train type automobile, an automobile train and a highway train body, and corresponding trains are different when the types of railways are different. Land iron (land railway), subway, air iron (air train), and subway; the land rail is divided into a heavy rail and a light rail, and in the using process of the train, the state signal data of train equipment needs to be collected in real time so as to ensure that the train is used in a stable and safe state.
In the prior art, the status signal data of the train equipment is used to logically control the traction controller. Generally, a mainstream train state signal is 24V or 110V, and when state signal data is acquired, extra configuration needs to be performed in an FPGA, so that circuits corresponding to a 24V voltage signal and a 110V voltage signal need to be designed respectively, and a phenomenon that the circuit is burnt due to an incorrect voltage level signal caused by a configuration error often occurs, so that the applicability of equipment is reduced; in view of this, we propose a digital input circuit.
SUMMERY OF THE UTILITY MODEL
Technical problem to be solved
Not enough to prior art, the utility model provides a digital input circuit has solved the problem that above-mentioned background art mentioned.
(II) technical scheme
In order to achieve the above purpose, the utility model discloses a following technical scheme realizes: the utility model provides a digital input circuit, includes opto-coupler treater and DI signal input negative pole end, opto-coupler treater U167's 4 ends are connected with VDD, opto-coupler treater U167's 3 ends are connected with 6 ends of level conversion chip U136, level conversion chip U136's 1 end is connected with VCC end, level conversion chip U136's 3 ends ground connection, level conversion chip U136's 5 ends are connected with VCC end, and level conversion chip U136's 5 ends are fixed mutually with electric capacity C74's one end, electric capacity C74's other end ground connection.
Optionally, a resistor R752 is connected in series between the 1 terminal and the 2 terminal of the optocoupler processor U167.
Optionally, the optocoupler processor U167 is of the model TLP187.
Optionally, the model of the level conversion chip U136 is SN74LVC.
Optionally, the 2 end of the level shift chip U136 is grounded, the 2 end and the 6 end of the level shift chip U136 are connected in series with a resistor R440, and the 4 end of the level shift chip U136 is a signal output end.
Optionally, the 1 end of the optocoupler processor U167 is connected to one end of a diode D69, the other end of the diode D69 is connected to one end of a resistor R702, the other end of the resistor R702 is connected to the positive end of the DI signal input, and the two ends of the resistor R702 are connected in series to a diode D54 and a capacitor C357.
Optionally, a triode Q152, a resistor R747 and a switching diode are connected in series between the 2 terminal of the optocoupler processor U167 and the DI signal input negative terminal, and the type of the switching diode is BAW56.
(III) advantageous effects
The utility model provides a digital input circuit. The method has the following beneficial effects:
the optical coupler of the digital input circuit has a wide working current range, and the circuit has reverse connection prevention processing and overcurrent and overvoltage suppression processing. The safety and the reliability are ensured, extra configuration in the FPGA is not needed, and circuits corresponding to the 24V voltage signal and the 110V voltage signal are not needed to be designed respectively, so that the circuit can be prevented from being burnt due to wrong voltage level signals caused by configuration errors, the applicability of the equipment is improved, and the use of actual equipment is facilitated.
Drawings
Fig. 1 is a schematic diagram of the circuit structure of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, back, 8230; \8230;) in the embodiments of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the attached drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
Referring to fig. 1, the present invention provides a technical solution: the utility model provides a digital input circuit, including opto-coupler treater and DI signal input negative pole end, opto-coupler treater U167's 4 ends are connected with VDD, opto-coupler treater U167's 3 ends are connected with 6 of level conversion chip U136 mutually, level conversion chip U136's 1 end is connected with VCC end, level conversion chip U136's 3 end ground connection, level conversion chip U136's 5 ends are connected with VCC end, and 5 ends of level conversion chip U136 are fixed mutually with electric capacity C74's one end, electric capacity C74's other end ground connection.
In order to avoid the phenomenon of circuit configuration errors, the optocoupler processor U167 is arranged in this embodiment, wherein a resistor R752 is connected in series between the 1 end and the 2 end of the optocoupler processor U167, and the resistance of the resistor R752 is 20K Ω. The opto-coupler processor U167 is model TLP187. The model of the level conversion chip U136 is SN74LVC, and specifically, the working current of the TLP187 optocoupler diode is 50mA-1A. Under the working condition of 24V, the conducting current of the TLP187 optocoupler diode is about 60 mA. Under the working condition of 110V, the conduction current of a TLP187 optocoupler diode is about 280mA, the optocoupler has a wide working current range, the circuit has reverse connection prevention processing and overcurrent and overvoltage suppression processing. The safety and the reliability are ensured, extra configuration in the FPGA is not needed, and circuits corresponding to the 24V voltage signal and the 110V voltage signal are not needed to be designed respectively, so that the circuit can be prevented from being burnt due to wrong voltage level signals caused by configuration errors, the applicability of the equipment is improved, and the use of actual equipment is facilitated.
Furthermore, the 2 end of the level conversion chip U136 is grounded, and the 2 end and the 6 end of the level conversion chip U136 are connected in series with a resistor R440, wherein the resistance of the resistor R440 is 5.6K Ω, the 4 end of the level conversion chip U136 is a signal output end, and the signal output end is used for outputting a signal.
The 1 end of the optocoupler processor U167 is connected to one end of a diode D69, the other end of the diode D69 is connected to one end of a resistor R702, the other end of the resistor R702 is connected to the positive DI signal input terminal, and the two ends of the resistor R702 are connected in series to a diode D54 and a capacitor C357. A triode Q152, a resistor R747 and a switch diode are connected in series between the 2 end of the optocoupler processor U167 and the DI signal input negative end, the model of the switch diode is BAW56, and the DI signal input positive end and the DI signal input negative end are both signal inputs.
When the device is used, DI signals are restrained through D69 transient voltage, overvoltage damage of other elements is prevented, and D69 is wrong connection prevention processing. When the signal passes through R711, Q186 is turned on, then Q134 is turned on, and then the signal output by Q134 is subjected to voltage stabilization suppression and shunting by Q191, then Q40 is turned on, and U167 is also turned on.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (7)
1. A digital input circuit, characterized by: including opto-coupler treater and DI signal input negative pole end, opto-coupler treater U167's 4 ends are connected with VDD, 3 ends of opto-coupler treater U167 are connected with 6 ends of level conversion chip U136, 1 end and the VCC end of level conversion chip U136 are connected, 3 end ground connection of level conversion chip U136, 5 ends and VCC end of level conversion chip U136 are connected, and 5 ends of level conversion chip U136 are fixed mutually with the one end of electric capacity C74, the other end ground connection of electric capacity C74.
2. A digital input circuit as claimed in claim 1, wherein: and a resistor R752 is connected between the 1 end and the 2 end of the optocoupler processor U167 in series.
3. A digital input circuit according to claim 1, wherein: the optocoupler processor U167 is a TLP187.
4. A digital input circuit according to claim 1, wherein: the model of the level conversion chip U136 is SN74LVC.
5. A digital input circuit according to claim 4, wherein: the 2 end of the level shift chip U136 is grounded, the 2 end and the 6 end of the level shift chip U136 are connected in series with a resistor R440, and the 4 end of the level shift chip U136 is a signal output end.
6. A digital input circuit as claimed in claim 1, wherein: the 1 end of the optocoupler processor U167 is connected with one end of a diode D69, the other end of the diode D69 is connected with one end of a resistor R702, the other end of the resistor R702 is connected with the positive electrode end of the DI signal input, and the two ends of the resistor R702 are connected in series with a diode D54 and a capacitor C357.
7. A digital input circuit according to claim 6, wherein: a triode Q152, a resistor R747 and a switch diode are connected in series between the 2 end of the optocoupler processor U167 and the DI signal input negative electrode end, and the type of the switch diode is BAW56.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222277821.2U CN218229010U (en) | 2022-08-29 | 2022-08-29 | Digital input circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222277821.2U CN218229010U (en) | 2022-08-29 | 2022-08-29 | Digital input circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218229010U true CN218229010U (en) | 2023-01-06 |
Family
ID=84684314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222277821.2U Active CN218229010U (en) | 2022-08-29 | 2022-08-29 | Digital input circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218229010U (en) |
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2022
- 2022-08-29 CN CN202222277821.2U patent/CN218229010U/en active Active
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