CN218183553U - Fast switching circuit of light source brightness - Google Patents
Fast switching circuit of light source brightness Download PDFInfo
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- CN218183553U CN218183553U CN202221344963.XU CN202221344963U CN218183553U CN 218183553 U CN218183553 U CN 218183553U CN 202221344963 U CN202221344963 U CN 202221344963U CN 218183553 U CN218183553 U CN 218183553U
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Abstract
The utility model discloses a fast switching circuit of light source brightness, which comprises a communication module, a master control module, a digital-to-analog conversion module, a multi-path current cache module, a constant current regulating module and a light source module; the communication module is connected with the main control module; the digital-to-analog conversion module is respectively connected with the main control module and the multi-path current cache module; the multi-path current cache module is respectively connected with the main control module and the constant current regulating module; the constant current adjusting module is connected with the light source module. The utility model discloses a current value that a plurality of luminance values of buffer memory correspond for accessible hardware directly switches when needing, thereby the required time of light source luminance switching that has significantly reduced has also improved the stroboscopic speed of light source controller greatly, has higher market spreading value.
Description
Technical Field
The utility model relates to a light source control technical field especially relates to a fast switch over circuit of light source luminance.
Background
Along with the increasing production efficiency, the increasing complexity of the workpiece to be detected and the increasing speed of the machine vision photographing, the requirements on the brightness of the light source are more and more strict, and the requirements on the brightness of the light source are different when the machine vision photographs at each time.
At present, when the brightness of a light source is adjusted, a plurality of light source controllers are basically realized by using a digital-to-analog conversion chip, and because the chips need to be controlled by a certain time sequence, each time of communication and output conversion needs more time, the time required by the light source controller for changing the brightness of the light source is prolonged, and the stroboscopic speed of the light source controller cannot keep pace with the photographing speed of a camera.
Therefore, improvements in the prior art are needed.
The above information is given as background information only to aid in understanding the present disclosure, and no determination or admission is made as to whether any of the above is available as prior art against the present disclosure.
SUMMERY OF THE UTILITY MODEL
The utility model provides a fast switch over circuit of light source luminance to solve the not enough of prior art.
In order to achieve the above object, the present invention provides the following technical solutions:
a fast switching circuit of light source brightness comprises a communication module, a main control module, a digital-to-analog conversion module, a multi-path current cache module, a constant current regulation module and a light source module; wherein, the first and the second end of the pipe are connected with each other,
the communication module is connected with the main control module;
the digital-to-analog conversion module is respectively connected with the main control module and the multi-path current cache module;
the multi-path current cache module is respectively connected with the main control module and the constant current regulating module;
the constant current adjusting module is connected with the light source module;
the communication module is used for receiving a current value required to be used and prestoring the current value into the main control module;
the main control module is used for outputting a conversion signal to the digital-to-analog conversion module after receiving a pre-stored current value;
the digital-to-analog conversion module is used for outputting a corresponding current value after receiving the conversion signal;
the multi-path current caching module is used for caching the current value output by the digital-to-analog conversion module;
the communication module is also used for receiving a brightness switching instruction and transmitting the brightness switching instruction to the main control module;
the main control module is also used for outputting a control signal to the control multi-path current cache module after receiving the brightness switching instruction;
the multi-path current cache module is also used for outputting cached current values to the constant current regulation module after receiving the control signals;
the constant current adjusting module is used for changing the current value output to the light source module after receiving the current value input by the multi-path current cache module so as to adjust the brightness of the light source module.
Furthermore, in the circuit for rapidly switching the brightness of the light source, each main control module has at least three output ends, the digital-to-analog conversion module has at least two output ends, and the multi-path current cache module includes at least two current cache modules;
the first input end of each current cache module is correspondingly connected with one output end of the digital-to-analog conversion module, and the second input end of each current cache module is correspondingly connected with one output end of the main control module;
the output end of each current cache module is connected with the input end of the constant current regulating module;
the input end of the digital-to-analog conversion module is correspondingly connected with one output end of the main control module;
the output end of the communication module is connected with the input end of the main control module;
and the output end of the constant current regulating module is connected with the input end of the light source module.
Further, in the circuit for rapidly switching the brightness of the light source, the communication module includes a serial port conversion chip U7 and an electrical connector J1;
the GND pin, the RIN pin and the TOUT pin of the serial port conversion chip U7 are respectively connected with the electric connector J1, the TIN pin and the ROUT pin of the serial port conversion chip U7 are respectively connected with the main control module, and the VCC pin of the serial port conversion chip U7 is connected with a pull-up voltage source.
Further, in the circuit for rapidly switching the brightness of the light source, the main control module includes a main control chip U1, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a crystal oscillator Y1;
a U1_ TX pin of the main control chip U1 is connected with a TIN pin of the serial port conversion chip U7, and a U1_ RX pin of the main control chip U1 is connected with an ROUT pin of the serial port conversion chip U7;
the PC4 pin and the PC5 pin of the main control chip U1 are respectively connected with the multi-path current cache module, the PC0 pin, the PC1 pin, the PC2 pin and the PC3 pin of the main control chip U1 are respectively connected with the digital-to-analog conversion module, and the NRST pin of the main control chip U1 is grounded;
one end of the first resistor R1 is connected with a VDD pin of the main control chip U1, and the other end of the first resistor R1 is grounded; a VDD pin of the main control chip U1 is connected with a pull-up voltage source;
one end of the first capacitor C1 is connected with a VSS pin of the main control chip U1, and the other end of the first capacitor C1 is grounded;
one end of the second resistor R2 is connected with a BOOT1 pin of the main control chip U1, and the other end of the second resistor R2 is grounded;
one end of the third resistor R3 is connected with a BOOT2 pin of the main control chip U1, and the other end of the third resistor R3 is grounded;
one end of the second capacitor C2 is connected to the OSC _0 pin of the main control chip U1, and the other end of the second capacitor C2 is grounded;
one end of the third capacitor C3 is connected with the OCS _1 pin of the main control chip U1, and the other end of the third capacitor C3 is grounded;
one end of the crystal oscillator Y1 is connected between the second capacitor C2 and the OSC _0 pin of the main control chip U1, and the other end of the crystal oscillator Y1 is connected between the third capacitor C3 and the OCS _1 pin of the main control chip U1.
Further, in the fast switching circuit of the light source brightness, the digital-to-analog conversion module includes an analog-to-digital conversion chip U2;
the VA pin, the Vref1 pin and the Vref2 pin of the analog-to-digital conversion chip U2 are connected with a pull-up voltage source;
a SYNC pin of the analog-to-digital conversion chip U2 is connected with a PC3 pin of the main control chip U1, an SCLK pin of the analog-to-digital conversion chip U2 is connected with a PC2 pin of the main control chip U1, a DI pin of the analog-to-digital conversion chip U2 is connected with a PC1 pin of the main control chip U1, a DOUT pin of the analog-to-digital conversion chip U2 is connected with a PC0 pin of the main control chip U1, and a GND pin of the analog-to-digital conversion chip U2 is grounded;
and a VoutH pin and a VoutG pin of the analog-to-digital conversion chip U2 are respectively connected with the multi-path current cache module.
Furthermore, in the circuit for rapidly switching the brightness of the light source, the multi-path current cache module includes a follower circuit and two current cache modules, and the two current cache modules are respectively a first current cache module and a second current cache module;
the first current cache module comprises a first operational amplifier U3, a first NMOS tube Q1, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and an eighth resistor R8;
the second current cache module comprises a second operational amplifier U4, a second NMOS transistor Q2, a fourth resistor R4, a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11;
the follower circuit comprises a third operational amplifier U5, a twelfth resistor R12 and a thirteenth resistor R13;
the positive input end of the first operational amplifier U3 is connected to the VoutH pin of the analog-to-digital conversion chip U2, the negative input end of the first operational amplifier U3 is grounded through the eighth resistor R8, and the output end of the first operational amplifier U3 is connected to one end of the sixth resistor R6;
the other end of the sixth resistor R6 is connected to one end of the seventh resistor R7, and the other end of the seventh resistor R7 is connected to the positive input end of the third operational amplifier U5;
one end of the fifth resistor R5 is connected between the output end of the first operational amplifier U3 and the sixth resistor R6, and the other end of the fifth resistor R5 is connected between the negative input end of the first operational amplifier U3 and the eighth resistor R8;
the grid electrode of the first NMOS tube Q1 is connected with a pin PC4 of the main control chip U1, the source electrode of the first NMOS tube Q1 is grounded, and the drain electrode of the first NMOS tube Q1 is connected between the sixth resistor R6 and the seventh resistor R7;
the positive input end of the second operational amplifier U4 is connected to the VoutG pin of the analog-to-digital conversion chip U2, the negative input end of the second operational amplifier U4 is grounded through the fourth resistor R4, and the output end of the second operational amplifier U4 is connected to one end of the tenth resistor R10;
the other end of the tenth resistor R10 is connected to one end of the eleventh resistor R11, and the other end of the eleventh resistor R11 is connected to the positive input end of the third operational amplifier U5;
one end of the ninth resistor R9 is connected between the output end of the second operational amplifier U4 and the tenth resistor R10, and the other end of the ninth resistor R9 is connected between the negative input end of the second operational amplifier U4 and the fourth resistor R4;
the grid electrode of the second NMOS transistor Q2 is connected with a pin PC5 of the main control chip U1, the source electrode of the second NMOS transistor Q2 is grounded, and the drain electrode of the second NMOS transistor Q2 is connected between the tenth resistor R10 and the eleventh resistor R11;
the negative input end of the third operational amplifier U5 is grounded through the twelfth resistor R12 and the thirteenth resistor R13, and the output end of the third operational amplifier U5 is connected between the twelfth resistor R12 and the thirteenth resistor R13 and is connected with the constant current adjusting module.
Furthermore, in the circuit for rapidly switching the brightness of the light source, power supply terminals of the first operational amplifier U3, the second operational amplifier U4 and the third operational amplifier U5 are respectively connected to a pull-up voltage source, and grounding terminals of the first operational amplifier U3, the second operational amplifier U4 and the third operational amplifier U5 are respectively grounded.
Further, in the fast switching circuit of the light source brightness, the constant current adjusting module includes a fourth operational amplifier U6, a third NMOS transistor Q3, a fourteenth resistor R14, and a fifteenth resistor R15;
the positive input end of the fourth operational amplifier U6 is connected to the output end of the third operational amplifier U5, the negative input end of the fourth operational amplifier U6 is grounded through the fourteenth resistor R14 and the fifteenth resistor R15, and the output end of the fourth operational amplifier U6 is connected to the gate of the third NMOS transistor Q3;
the source of the third NMOS transistor Q3 is connected between the fourteenth resistor R14 and the fifteenth resistor R15, and the drain of the third NMOS transistor Q3 is connected to the light source module.
Further, in the circuit for rapidly switching the brightness of the light source, the power supply terminal of the fourth operational amplifier U6 is connected to a pull-up voltage source, and the ground terminal of the fourth operational amplifier U6 is grounded.
Further, in the circuit for rapidly switching the brightness of the light source, the light source module is composed of a plurality of light emitting diodes.
Compared with the prior art, the embodiment of the utility model provides a following beneficial effect has:
the embodiment of the utility model provides a pair of fast switch circuit of light source luminance comprises communication module, host system, digital-to-analog conversion module, multichannel electric current cache module, constant current regulating module and light source module, through the current value that a plurality of luminance values of cache correspond for accessible hardware directly switches when needing, thereby the light source luminance that has significantly reduced switches required time, has also improved the stroboscopic speed of light source controller greatly, has higher market spreading value.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic circuit block diagram of a fast switching circuit for brightness of a light source according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a fast switching circuit for brightness of a light source according to an embodiment of the present invention.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the embodiments of the present invention are clearly and completely described with reference to the drawings in the embodiments of the present invention, and obviously, the embodiments described below are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
In the description of the present invention, it is to be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present.
Furthermore, the terms "long", "short", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships illustrated in the drawings, and are only for convenience of describing the present invention, but do not indicate or imply that the device or element referred to must have the specific orientation, operate in the specific orientation configuration, and thus, should not be construed as limiting the present invention.
The technical solution of the present invention is further explained by the following embodiments with reference to the drawings.
Example one
In view of the above-mentioned drawbacks of the conventional light source brightness adjusting technology, the applicant of the present invention is based on practical experience and professional knowledge that are abundant for many years in such fields, and actively develops and innovates in cooperation with the application of theory, so as to hopefully create a technology capable of solving the drawbacks of the prior art, and make the light source brightness adjusting technology more practical. Through continuous research and design, and after repeatedly trying on samples and improving, finally the utility model discloses establish and confirm utensil practical value.
Referring to fig. 1-2, an embodiment of the present invention provides a fast switching circuit for light source brightness, including a communication module, a main control module, a digital-to-analog conversion module, a multi-path current buffer module, a constant current adjustment module, and a light source module; wherein the content of the first and second substances,
the communication module is connected with the main control module;
the digital-to-analog conversion module is respectively connected with the main control module and the multi-path current cache module;
the multi-path current cache module is respectively connected with the main control module and the constant current regulating module;
the constant current adjusting module is connected with the light source module;
the communication module is used for receiving a current value required to be used and prestoring the current value into the main control module;
the main control module is used for outputting a conversion signal to the digital-to-analog conversion module after receiving a pre-stored current value;
the digital-to-analog conversion module is used for outputting a corresponding current value after receiving the conversion signal;
the multi-path current caching module is used for caching the current value output by the digital-to-analog conversion module;
the communication module is also used for receiving a brightness switching instruction and transmitting the brightness switching instruction to the main control module;
the main control module is also used for outputting a control signal to the control multi-path current cache module after receiving the brightness switching instruction;
the multi-path current cache module is also used for outputting cached current values to the constant current regulation module after receiving the control signals;
the constant current adjusting module is used for changing the current value output to the light source module after receiving the current value input by the multi-path current cache module so as to adjust the brightness of the light source module.
In this embodiment, each main control module has at least three output ends, the digital-to-analog conversion module has at least two output ends, and the multi-path current cache module includes at least two current cache modules;
the first input end of each current cache module is correspondingly connected with one output end of the digital-to-analog conversion module, and the second input end of each current cache module is correspondingly connected with one output end of the main control module;
the output end of each current cache module is connected with the input end of the constant current regulating module;
the input end of the digital-to-analog conversion module is correspondingly connected with one output end of the main control module;
the output end of the communication module is connected with the input end of the main control module;
and the output end of the constant current regulating module is connected with the input end of the light source module.
In this embodiment, the communication module includes a serial port conversion chip U7 and an electrical connector J1;
the GND pin, the RIN pin and the TOUT pin of the serial port conversion chip U7 are respectively connected with the electric connector J1, the TIN pin and the ROUT pin of the serial port conversion chip U7 are respectively connected with the main control module, and the VCC pin of the serial port conversion chip U7 is connected with a pull-up voltage source (+ 3.3V).
It should be noted that the serial port conversion chip U7 may select a chip with a product model of MAX3232, and the electrical connector J1 may select an electrical connector with a product model of DB 9.
In this embodiment, the main control module includes a main control chip U1, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a crystal oscillator Y1;
a U1_ TX pin of the main control chip U1 is connected with a TIN pin of the serial port conversion chip U7, and a U1_ RX pin of the main control chip U1 is connected with an ROUT pin of the serial port conversion chip U7;
a PC4 pin and a PC5 pin of the main control chip U1 are respectively connected with the multi-path current cache module, a PC0 pin, a PC1 pin, a PC2 pin and a PC3 pin of the main control chip U1 are respectively connected with the digital-to-analog conversion module, and an NRST pin of the main control chip U1 is grounded;
one end of the first resistor R1 is connected with a VDD pin of the main control chip U1, and the other end of the first resistor R1 is grounded; a VDD pin of the main control chip U1 is connected with a pull-up voltage source (+ 3.3V);
one end of the first capacitor C1 is connected with the VSS pin of the main control chip U1, and the other end of the first capacitor C1 is grounded;
one end of the second resistor R2 is connected with a BOOT1 pin of the main control chip U1, and the other end of the second resistor R2 is grounded;
one end of the third resistor R3 is connected with a BOOT2 pin of the main control chip U1, and the other end of the third resistor R3 is grounded;
one end of the second capacitor C2 is connected to the OSC _0 pin of the main control chip U1, and the other end of the second capacitor C2 is grounded;
one end of the third capacitor C3 is connected with the OCS _1 pin of the main control chip U1, and the other end of the third capacitor C3 is grounded;
one end of the crystal oscillator Y1 is connected between the second capacitor C2 and the OSC _0 pin of the main control chip U1, and the other end of the crystal oscillator Y1 is connected between the third capacitor C3 and the OCS _1 pin of the main control chip U1.
It should be noted that, the main control chip U1 may select a chip whose product model is STM32F103, the resistance value of the first resistor R1 may be selected to be 1k Ω, the resistance value of the second resistor R2 may be selected to be 10k Ω, the resistance value of the third resistor R3 may be selected to be 10k Ω, the capacitance value of the first capacitor C1 may be selected to be 0.1uF, the capacitance value of the second capacitor C2 may be selected to be 24pF, the capacitance value of the third capacitor C3 may be selected to be 24pF, and the frequency of the crystal oscillator Y1 may be selected to be 8Mhz.
In this embodiment, the digital-to-analog conversion module includes an analog-to-digital conversion chip U2;
the VA pin, the Vref1 pin and the Vref2 pin of the analog-to-digital conversion chip U2 are connected with a pull-up voltage source (+ 5V);
a SYNC pin of the analog-to-digital conversion chip U2 is connected with a PC3 pin of the main control chip U1, an SCLK pin of the analog-to-digital conversion chip U2 is connected with a PC2 pin of the main control chip U1, a DI pin of the analog-to-digital conversion chip U2 is connected with a PC1 pin of the main control chip U1, a DOUT pin of the analog-to-digital conversion chip U2 is connected with a PC0 pin of the main control chip U1, and a GND pin of the analog-to-digital conversion chip U2 is grounded;
and a VoutH pin and a VoutG pin of the analog-to-digital conversion chip U2 are respectively connected with the multi-path current cache module.
It should be noted that the analog-to-digital conversion chip U2 may select a chip with a model of DAC108S 085.
In this embodiment, the multi-path current cache module includes a follower circuit and two current cache modules, where the two current cache modules are respectively a first current cache module (i.e., current cache module 1) and a second current cache module (i.e., current cache module 2);
the first current cache module comprises a first operational amplifier U3, a first NMOS tube Q1, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and an eighth resistor R8;
the second current cache module comprises a second operational amplifier U4, a second NMOS transistor Q2, a fourth resistor R4, a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11;
the follower circuit comprises a third operational amplifier U5, a twelfth resistor R12 and a thirteenth resistor R13;
the positive input end of the first operational amplifier U3 is connected to the VoutH pin of the analog-to-digital conversion chip U2, the negative input end of the first operational amplifier U3 is grounded through the eighth resistor R8, and the output end of the first operational amplifier U3 is connected to one end of the sixth resistor R6;
the other end of the sixth resistor R6 is connected to one end of the seventh resistor R7, and the other end of the seventh resistor R7 is connected to the positive input end of the third operational amplifier U5;
one end of the fifth resistor R5 is connected between the output end of the first operational amplifier U3 and the sixth resistor R6, and the other end of the fifth resistor R5 is connected between the negative input end of the first operational amplifier U3 and the eighth resistor R8;
the grid electrode of the first NMOS tube Q1 is connected with a PC4 pin of the main control chip U1, the source electrode of the first NMOS tube Q1 is grounded, and the drain electrode of the first NMOS tube Q1 is connected between the sixth resistor R6 and the seventh resistor R7;
the positive input end of the second operational amplifier U4 is connected to the VoutG pin of the analog-to-digital conversion chip U2, the negative input end of the second operational amplifier U4 is grounded through the fourth resistor R4, and the output end of the second operational amplifier U4 is connected to one end of the tenth resistor R10;
the other end of the tenth resistor R10 is connected to one end of the eleventh resistor R11, and the other end of the eleventh resistor R11 is connected to the positive input end of the third operational amplifier U5;
one end of the ninth resistor R9 is connected between the output end of the second operational amplifier U4 and the tenth resistor R10, and the other end of the ninth resistor R9 is connected between the negative input end of the second operational amplifier U4 and the fourth resistor R4;
the grid electrode of the second NMOS transistor Q2 is connected with a pin PC5 of the main control chip U1, the source electrode of the second NMOS transistor Q2 is grounded, and the drain electrode of the second NMOS transistor Q2 is connected between the tenth resistor R10 and the eleventh resistor R11;
the negative input end of the third operational amplifier U5 is grounded through the twelfth resistor R12 and the thirteenth resistor R13, and the output end of the third operational amplifier U5 is connected between the twelfth resistor R12 and the thirteenth resistor R13 and is connected with the constant current adjusting module.
It should be noted that the first operational amplifier U3, the second operational amplifier U4, and the third operational amplifier U5 may all select an operational amplifier of the type LM258, the amplification factor is K =3 times, the first NMOS transistor Q1 and the second NMOS transistor Q2 may each select an NMOS transistor of the type RU207C, the resistance value of the fifth resistor R5 may be selected to be 2K Ω, the resistance value of the sixth resistor R6 may be selected to be 1K Ω, the resistance value of the seventh resistor R7 may be selected to be 1K Ω, the resistance value of the eighth resistor R8 may be selected to be 1K Ω, the resistance value of the fourth resistor R4 may be selected to be 1K Ω, the resistance value of the ninth resistor R9 may be selected to be 2K Ω, the resistance value of the tenth resistor R10 may be selected to be 1K Ω, the resistance value of the eleventh resistor R11 may be selected to be 1K Ω, the resistance value of the twelfth resistor R12 may be selected to be 1K Ω, and the resistance value of the thirteenth resistor R13K may be 10K Ω.
In this embodiment, the power supply terminals of the first operational amplifier U3, the second operational amplifier U4 and the third operational amplifier U5 are respectively connected to a pull-up voltage source (+ 5V), and the ground terminals of the first operational amplifier U3, the second operational amplifier U4 and the third operational amplifier U5 are respectively grounded.
In this embodiment, the constant current adjusting module includes a fourth operational amplifier U6, a third NMOS transistor Q3, a fourteenth resistor R14, and a fifteenth resistor R15;
the positive input end of the fourth operational amplifier U6 is connected to the output end of the third operational amplifier U5, the negative input end of the fourth operational amplifier U6 is grounded through the fourteenth resistor R14 and the fifteenth resistor R15, and the output end of the fourth operational amplifier U6 is connected to the gate of the third NMOS transistor Q3;
the source of the third NMOS transistor Q3 is connected between the fourteenth resistor R14 and the fifteenth resistor R15, and the drain of the third NMOS transistor Q3 is connected to the light source module.
It should be noted that the fourth operational amplifier U6 may select an operational amplifier of a model LM258, the third NMOS transistor Q3 may select an NMOS transistor of a model 50N06, a resistance value of the fourteenth resistor R14 may be selected to be 1K Ω, and a resistance value of the fifteenth resistor R15 may be selected to be 10 Ω.
In this embodiment, the power supply terminal of the fourth operational amplifier U6 is connected to a pull-up voltage source (+ 5V), and the ground terminal of the fourth operational amplifier U6 is grounded.
In this embodiment, the light source module is composed of a plurality of light emitting diodes.
Specifically, a plurality of the light emitting diodes are connected in series and then connected in parallel with another plurality of the light emitting diodes, and then connected with a pull-up voltage source (+ 24V).
The method comprises the following principle steps:
(1) The current value I to be used 1 ＝50mA、I 2 =100mA is pre-stored in the main control module through the communication module.
(2) The main control module is used for controlling the current I according to a prestored current value 1 ＝50mA、I 2 =100mA, and outputs a conversion signal to the digital-to-analog conversion module, and after the digital-to-analog conversion module receives the conversion signal from the main control module, the output channel VoutH pin of the digital-to-analog conversion chip DAC108S085 outputs a corresponding voltage value V 1i =0.5V, the output channel VoutG pin outputs the corresponding voltage value V 2i ＝1V。
(3) The multi-path current buffer module outputs the voltage value V output by the digital-to-analog conversion module 1i 、V 2i And the current buffer modules are respectively buffered in the current buffer module 1 and the current buffer module 2. When a single current cache module receives a control signal to enable the NMOS tube to be conducted, a 3-time attenuation circuit is formed by the single current cache module and the other current cache module, so that in order to ensure that the voltage input to the constant current regulating module is equal to a set voltage value, a third operational amplifier is required to be usedThe amplifier U5 amplifies in phase and outputs V 1o ＝V 1i *K＝0.5*3＝1.5V、 V 2o ＝V 2i * K =1 x 3=3V, decay to V 1i Or V 2i And transmitting the data to a constant current regulating module.
(4) After receiving the brightness switching instruction through the communication module, the main control module directly transmits IO signals CTRL1 as high level and CTRL2 as low level, controls the multi-path current cache module and enables V to be converted into high level and low level 1i And transmitting the signal to a constant current regulating module.
(5) The constant current regulating module outputs a current value through a constant current negative feedback circuit taking a fourth operational amplifier U6 as a core
And adjusting the brightness of the light source module.
(6) After the main control module receives the brightness switching command again through the communication module, the main control module directly transmits IO signals CTRL1 to be low level and CTRL2 to be high level, controls the multi-path current cache module and enables V to be converted into voltage 2i And transmitting the data to a constant current regulating module.
(7) The constant current regulating module outputs a current value through a constant current negative feedback circuit taking a fourth operational amplifier U6 as a core
And adjusting the brightness of the light source module.
(8) And (3) repeating the steps (1) - (7) after the main control module receives the new current value transmitted by the communication module.
Although the terms of communication module, main control module, digital-to-analog conversion module, multi-path current buffer module, constant current regulation module, light source module, etc. are used more herein, the possibility of using other terms is not excluded. These terms are used merely to more conveniently describe and explain the nature of the present invention; they are to be construed in a manner that is inconsistent with the spirit of the invention.
The embodiment of the utility model provides a pair of fast switch circuit of light source luminance comprises communication module, host system, digital-to-analog conversion module, multichannel electric current cache module, constant current regulating module and light source module, through the current value that a plurality of luminance values of cache correspond for accessible hardware directly switches when needing, thereby the light source luminance that has significantly reduced switches required time, has also improved the stroboscopic speed of light source controller greatly, has higher market spreading value.
The foregoing description of the embodiments has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same elements or features may also be varied in many respects. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.
Example embodiments are provided so that this disclosure will be thorough and will fully convey the scope to those skilled in the art. Numerous details are set forth, such as examples of specific parts, devices, and methods, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to those skilled in the art that specific details need not be employed, that example embodiments may be embodied in many different forms and that neither should be construed to limit the scope of the disclosure. In certain example embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises" and "comprising" are intended to be inclusive and therefore specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed and illustrated, unless explicitly indicated as an order of performance. It should also be understood that additional or alternative steps may be employed.
When an element or layer is referred to as being "on … …," "engaged with … …," "connected to," or "coupled to" another element or layer, it can be directly on, engaged with, connected to, or coupled to the other element or layer, or intervening elements or layers may also be present. In contrast, when an element or layer is referred to as being "directly on … …," "directly engaged with … …," "directly connected to," or "directly coupled to" another element or layer, there may be no intervening elements or layers present. Other words used to describe the relationship of elements should be interpreted in a similar manner (e.g., "between … …" and "directly between … …", "adjacent" and "directly adjacent", etc.). As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. Although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region or section from another element, component, region or section. Unless clearly indicated by the context, use of terms such as the terms "first," "second," and other numerical values herein does not imply a sequence or order. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.
Spatially relative terms, such as "inner," "outer," "below," "… …," "lower," "above," "upper," and the like, may be used herein for ease of description to describe a relationship between one element or feature and another element or feature or elements as illustrated in the figures. Spatially relative terms may be intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below … …" may encompass both an orientation of up and down. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted.
Claims (10)
1. A fast switching circuit of light source brightness is characterized by comprising a communication module, a main control module, a digital-to-analog conversion module, a multi-path current cache module, a constant current regulation module and a light source module; wherein the content of the first and second substances,
the communication module is connected with the main control module;
the digital-to-analog conversion module is respectively connected with the main control module and the multi-path current cache module;
the multi-path current cache module is respectively connected with the main control module and the constant current regulating module;
the constant current adjusting module is connected with the light source module;
the communication module is used for receiving a current value required to be used and prestoring the current value into the main control module;
the main control module is used for outputting a conversion signal to the digital-to-analog conversion module after receiving a pre-stored current value;
the digital-to-analog conversion module is used for outputting a corresponding current value after receiving the conversion signal;
the multi-path current caching module is used for caching the current value output by the digital-to-analog conversion module;
the communication module is also used for receiving a brightness switching instruction and transmitting the brightness switching instruction to the main control module;
the main control module is also used for outputting a control signal to the control multi-path current cache module after receiving the brightness switching instruction;
the multi-path current cache module is also used for outputting cached current values to the constant current regulation module after receiving the control signals;
the constant current adjusting module is used for changing the current value output to the light source module after receiving the current value input by the multi-path current caching module so as to adjust the brightness of the light source module.
2. The circuit of claim 1, wherein each of the main control modules has at least three output terminals, the digital-to-analog conversion module has at least two output terminals, and the multi-path current buffer module includes at least two current buffer modules;
the first input end of each current cache module is correspondingly connected with one output end of the digital-to-analog conversion module, and the second input end of each current cache module is correspondingly connected with one output end of the main control module;
the output end of each current cache module is connected with the input end of the constant current regulating module;
the input end of the digital-to-analog conversion module is correspondingly connected with one output end of the main control module;
the output end of the communication module is connected with the input end of the main control module;
and the output end of the constant current regulating module is connected with the input end of the light source module.
3. The circuit for rapidly switching the brightness of the light source according to claim 2, wherein the communication module comprises a serial port conversion chip U7 and an electrical connector J1;
the GND pin, the RIN pin and the TOUT pin of the serial port conversion chip U7 are respectively connected with the electric connector J1, the TIN pin and the ROUT pin of the serial port conversion chip U7 are respectively connected with the main control module, and the VCC pin of the serial port conversion chip U7 is connected with a pull-up voltage source.
4. The circuit of claim 3, wherein the main control module comprises a main control chip U1, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a crystal oscillator Y1;
a U1_ TX pin of the main control chip U1 is connected with a TIN pin of the serial port conversion chip U7, and a U1_ RX pin of the main control chip U1 is connected with an ROUT pin of the serial port conversion chip U7;
the PC4 pin and the PC5 pin of the main control chip U1 are respectively connected with the multi-path current cache module, the PC0 pin, the PC1 pin, the PC2 pin and the PC3 pin of the main control chip U1 are respectively connected with the digital-to-analog conversion module, and the NRST pin of the main control chip U1 is grounded;
one end of the first resistor R1 is connected with a VDD pin of the main control chip U1, and the other end of the first resistor R1 is grounded; a VDD pin of the main control chip U1 is connected with a pull-up voltage source;
one end of the first capacitor C1 is connected with the VSS pin of the main control chip U1, and the other end of the first capacitor C1 is grounded;
one end of the second resistor R2 is connected with a BOOT1 pin of the main control chip U1, and the other end of the second resistor R2 is grounded;
one end of the third resistor R3 is connected with a BOOT2 pin of the main control chip U1, and the other end of the third resistor R3 is grounded;
one end of the second capacitor C2 is connected to the OSC _0 pin of the main control chip U1, and the other end of the second capacitor C2 is grounded;
one end of the third capacitor C3 is connected with the OCS _1 pin of the main control chip U1, and the other end of the third capacitor C3 is grounded;
one end of the crystal oscillator Y1 is connected between the second capacitor C2 and the OSC _0 pin of the main control chip U1, and the other end of the crystal oscillator Y1 is connected between the third capacitor C3 and the OCS _1 pin of the main control chip U1.
5. The fast switching circuit of the light source brightness according to claim 4, wherein the digital-to-analog conversion module includes an analog-to-digital conversion chip U2;
the VA pin, the Vref1 pin and the Vref2 pin of the analog-to-digital conversion chip U2 are connected with a pull-up voltage source;
a SYNC pin of the analog-to-digital conversion chip U2 is connected with a PC3 pin of the main control chip U1, an SCLK pin of the analog-to-digital conversion chip U2 is connected with a PC2 pin of the main control chip U1, a DI pin of the analog-to-digital conversion chip U2 is connected with a PC1 pin of the main control chip U1, a DOUT pin of the analog-to-digital conversion chip U2 is connected with a PC0 pin of the main control chip U1, and a GND pin of the analog-to-digital conversion chip U2 is grounded;
and a VoutH pin and a VoutG pin of the analog-to-digital conversion chip U2 are respectively connected with the multi-path current cache module.
6. The circuit for fast switching of brightness of a light source according to claim 5, wherein the plurality of current buffer modules include a follower circuit and two current buffer modules, the two current buffer modules being a first current buffer module and a second current buffer module, respectively;
the first current cache module comprises a first operational amplifier U3, a first NMOS transistor Q1, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and an eighth resistor R8;
the second current cache module comprises a second operational amplifier U4, a second NMOS transistor Q2, a fourth resistor R4, a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11;
the follower circuit comprises a third operational amplifier U5, a twelfth resistor R12 and a thirteenth resistor R13;
the positive input end of the first operational amplifier U3 is connected to the VoutH pin of the analog-to-digital conversion chip U2, the negative input end of the first operational amplifier U3 is grounded through the eighth resistor R8, and the output end of the first operational amplifier U3 is connected to one end of the sixth resistor R6;
the other end of the sixth resistor R6 is connected to one end of the seventh resistor R7, and the other end of the seventh resistor R7 is connected to the positive input end of the third operational amplifier U5;
one end of the fifth resistor R5 is connected between the output end of the first operational amplifier U3 and the sixth resistor R6, and the other end of the fifth resistor R5 is connected between the negative input end of the first operational amplifier U3 and the eighth resistor R8;
the grid electrode of the first NMOS tube Q1 is connected with a pin PC4 of the main control chip U1, the source electrode of the first NMOS tube Q1 is grounded, and the drain electrode of the first NMOS tube Q1 is connected between the sixth resistor R6 and the seventh resistor R7;
the positive input end of the second operational amplifier U4 is connected to the VoutG pin of the analog-to-digital conversion chip U2, the negative input end of the second operational amplifier U4 is grounded through the fourth resistor R4, and the output end of the second operational amplifier U4 is connected to one end of the tenth resistor R10;
the other end of the tenth resistor R10 is connected to one end of the eleventh resistor R11, and the other end of the eleventh resistor R11 is connected to the positive input end of the third operational amplifier U5;
one end of the ninth resistor R9 is connected between the output end of the second operational amplifier U4 and the tenth resistor R10, and the other end of the ninth resistor R9 is connected between the negative input end of the second operational amplifier U4 and the fourth resistor R4;
the grid electrode of the second NMOS transistor Q2 is connected with a pin PC5 of the main control chip U1, the source electrode of the second NMOS transistor Q2 is grounded, and the drain electrode of the second NMOS transistor Q2 is connected between the tenth resistor R10 and the eleventh resistor R11;
the negative input end of the third operational amplifier U5 is grounded through the twelfth resistor R12 and the thirteenth resistor R13, and the output end of the third operational amplifier U5 is connected between the twelfth resistor R12 and the thirteenth resistor R13 and is connected with the constant current adjusting module.
7. The circuit for fast switching brightness of a light source according to claim 6, wherein power supply terminals of the first operational amplifier U3, the second operational amplifier U4 and the third operational amplifier U5 are respectively connected to a pull-up voltage source, and ground terminals of the first operational amplifier U3, the second operational amplifier U4 and the third operational amplifier U5 are respectively connected to ground.
8. The circuit for rapidly switching the brightness of the light source according to claim 7, wherein the constant current adjusting module comprises a fourth operational amplifier U6, a third NMOS transistor Q3, a fourteenth resistor R14 and a fifteenth resistor R15;
the positive input end of the fourth operational amplifier U6 is connected to the output end of the third operational amplifier U5, the negative input end of the fourth operational amplifier U6 is grounded through the fourteenth resistor R14 and the fifteenth resistor R15, and the output end of the fourth operational amplifier U6 is connected to the gate of the third NMOS transistor Q3;
the source of the third NMOS transistor Q3 is connected between the fourteenth resistor R14 and the fifteenth resistor R15, and the drain of the third NMOS transistor Q3 is connected to the light source module.
9. The circuit for rapidly switching brightness of a light source according to claim 8, wherein a power supply terminal of the fourth operational amplifier U6 is connected to a pull-up voltage source, and a ground terminal of the fourth operational amplifier U6 is grounded.
10. The circuit for fast switching brightness of a light source according to claim 1, wherein the light source module comprises a plurality of light emitting diodes.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221344963.XU CN218183553U (en) | 2022-05-31 | 2022-05-31 | Fast switching circuit of light source brightness |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221344963.XU CN218183553U (en) | 2022-05-31 | 2022-05-31 | Fast switching circuit of light source brightness |
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| CN218183553U true CN218183553U (en) | 2022-12-30 |
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| CN202221344963.XU Active CN218183553U (en) | 2022-05-31 | 2022-05-31 | Fast switching circuit of light source brightness |
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