CN218162473U - Time phase coding chip for quantum key distribution - Google Patents
Time phase coding chip for quantum key distribution Download PDFInfo
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Abstract
The utility model discloses a time phase code chip for quantum key distribution, it is including luring out attitude preparation module and time phase code module, wherein, lures out attitude preparation module and time phase code module and is used for preparing respectively on optical signal and lures out attitude and time phase state. The time phase coding module comprises an equal-arm interferometer chip module and an unequal-arm interferometer chip module, at least one of two optical arms of the unequal-arm interferometer chip module is provided with a dimmable delay module, and the dimmable delay module comprises one or a plurality of cascaded delay switching units realized based on interferometers and used for providing delay switching for optical signals.
Description
Technical Field
The utility model relates to a secret communication field of quantum, in particular to time phase place coding chip for quantum key distribution.
Background
Quantum secret communication is a secret communication mode different from classical communication, can generate completely consistent unconditional security keys between two communication parties, supports the encryption of classical information through a one-time pad mode, can ensure high security of information transmission, and is widely concerned. Existing quantum secure communication systems are mainly implemented based on Quantum Key Distribution (QKD) technology. The QKD system comprises a sender and a receiver, wherein the sender adopts an encoder to realize the encoding and sending of the quantum state, and the receiver adopts a decoder to decode and detect the quantum state.
The time phase coding scheme is one of mainstream schemes in quantum key distribution, the main mode of the time phase coding at present is to realize the time phase coding in a mode of cascading a first-stage equal-arm interferometer and a first-stage unequal-arm interferometer, and the positions of the front interferometer and the rear interferometer can be interchanged. In the time phase coding scheme based on the BB84 protocol, the basis vectors include a phase basis vector and a time basis vector, the phase basis vector corresponds to a pair of front and rear pulse photons with a specific phase difference, and the time basis vector corresponds to pulse photons distributed in front and rear directions in a time domain. An unequal-arm interferometer can be used as a first stage, light pulses emitted by a laser are divided into front and rear pulse photon pairs with fixed delay difference, the relative phase difference of the pulse photon pairs is adjusted to be 0 or pi in the first-stage unequal-arm interferometer, and a phase basis vector quantum state is prepared; or the second-stage equal arm interferometer makes the former or the latter light pulse at the output port interfere and expand or cancel to prepare the time base vector quantum state.
Or the equal-arm interferometer can be used as a first stage, and the phase difference of the upper arm and the lower arm of the first-stage equal-arm interferometer is controlled to enable all the light pulses output by the first-stage equal-arm interferometer to go away from the upper arm or the lower arm of the next-stage unequal-arm interferometer, so that the time-base vector quantum state is prepared; or the light pulses output to the upper arm and the lower arm of the next-stage unequal arm interferometer respectively account for half to prepare the phase basis vector quantum state.
Fig. 1 shows a transmit side encoding module for time phase encoding. As shown in fig. 1, the encoding module uses the first optical splitter, the second optical splitter, the first phase modulation module and the second phase modulation module to form an equal arm interferometer, and uses the second optical splitter, the second optical waveguide delay module and the beam combiner to form an unequal arm interferometer. By modulating the phase difference in the equal-arm interferometer, the output port of the optical signal can be dynamically modulated so that the optical signal travels only along the long arm or the short arm in the unequal-arm interferometer, or along the long and short arms at the same time, thereby preparing 4 states in accordance with the BB84 protocol.
Fig. 2 shows a high-speed silicon-based chip QKD coding system, during coding, a phase of one arm of an interferometer to be modulated is statically pre-biased at pi/2 through a thermal phase shifter and is kept unchanged, then pi/2 phase shift is loaded on an upper arm or a lower arm randomly through a carrier depletion type modulator (CDM), so that the total phase difference of the upper arm and the lower arm is 0 (pi/2-pi/2) or pi (pi/2 + pi/2), pi voltage needs to be modulated through a CDM mode originally, the same phase difference modulation effect can be achieved through the combined modulation mode only by modulating the CDM to pi/2, and loss phenomena related to phase modulation are reduced.
An external laser generates weak coherent pulses through intensity modulation, and the weak coherent pulses are coupled into a silicon optical chip, wherein the chip comprises an asymmetric Mach-Zehnder interferometer (MZI) and divides one optical pulse into two optical pulses which are distributed back and forth on a time domain. When there is only the previous light pulse, the code is |0>; when only the latter light pulse exists, the code is |1>; if there are both the front and rear light pulses and the phase difference is 0, the code is | + >, and if there are both the front and rear light pulses and the phase difference is pi, the code is | - >.
The upper arm of the asymmetric MZI comprises a group of MZIs, and a thermal phase shifter is arranged in each MZI so as to balance the loss and the emergent light intensity of the upper arm and the lower arm. A thermal phase shifter in the asymmetric MZI is used for adjusting the direct current relative phase difference before and after separating the optical pulses, CDM is used for rapidly switching between states of | + > and | - >, a Beam Splitter (BS) behind the asymmetric MZI is replaced by one MZI, the thermal phase shifter is used as a bias to enable two optical pulses before and after to be superposed in an equalizing mode, and two CDM are used for selecting the first optical pulse or the second optical pulse to be coupled into the optical fiber.
The existing on-chip time phase encoder is realized by high-speed phase adjustment, and the encoding state of output light is related to the phase difference between the upper arm and the lower arm of the modulated interferometer. The half-wave voltage (the driving voltage required for realizing pi phase shift) of the current silicon-based phase modulator is generally larger. For quantum key distribution based on BB84 time-phase encoding protocol, at least 4 states are generally used for encoding, one of the time states is prepared when the phase difference is phi =0, and the other time state is prepared when the phase difference is pi. When phi = pi/2, preparing a phase state; phi =3 pi/2, another phase state is prepared. For this reason, the maximum modulation voltage often needs to be up to 1.5 times the half-wave voltage, and also needs to randomly achieve high-speed switching between 4 different levels (0, 0.5 times the half-wave voltage, and 1.5 times the half-wave voltage).
In addition, high-speed phase modulation is realized in a silicon-based material based on the principle of a plasma dispersion effect, typical modulation types include a carrier deposition type, a carrier injection type, a carrier depletion type and the like, and the problem of modulation-dependent loss generally exists, namely when different phases are modulated, the generated attenuation is different. Therefore, when the encoder modulates different time phase states, the attenuation of light is different, and a coding state with unbalanced power is generated. Although the system in fig. 2 adopts the combined modulation mode of the thermal phase shifter and the carrier depletion type modulator, the modulation phase required by CDM can be properly reduced, but the influence of this effect is not completely eliminated, and the phenomenon of inconsistent power still exists in the prepared four states.
Since in quantum key distribution, theoretically the remaining dimensions, except the encoding state, need to be indistinguishable. I.e. in theory the encoder should not introduce an imbalance in power. Although, there have been research reports that the problem can be solved by sacrificing a certain secure coding rate through modes such as late algorithm correction. But the research on the encoder with consistent attenuation can improve the safe encoding rate from the hardware and reduce the requirement on the algorithm.
In addition, in the existing time phase encoder scheme, an unequal arm interferometer is generally adopted to generate front and rear pulse photon pairs, and the difference between the long arm optical path and the short arm optical path of the interferometer depends on the etched waveguide length. The actual length of the waveguide is greatly influenced by the process, especially the long waveguide is greatly influenced, the large delay length difference between different batches is easy to occur, even the delay lengths between the same batch are not equal, and further the arm length difference matching of the sending end interferometer and the receiving end interferometer is influenced. Therefore, the time phase coding quantum key distribution chip is greatly prevented from being produced.
SUMMERY OF THE UTILITY MODEL
To the above-mentioned problem that exists among the prior art, the utility model discloses a time phase coding chip for quantum key distribution wherein through introducing the delay module of can adjusting luminance based on chip scheme special design, the poor inconsistent problem of interferometer arm length of sender and receiver in can effectively solving quantum key distribution improves quantum key distribution efficiency and bit error rate. Meanwhile, by means of the power balancing unit, the power balance of the phase states at different coding time can be easily realized, algorithm correction on the power imbalance commonly existing in the existing coding device is not needed, the safe code rate of quantum key distribution can be improved, and the requirement on later algorithm optimization is reduced. Furthermore, two phase drive levels and a maximum V may be utilized π/2 The phase driving level value of the quantum key distribution circuit realizes 4 time phase states required by the quantum key distribution, complex four-level driving and complex monitoring and compensation are not needed, the engineering is easier to realize, and the high-temperature and low-temperature stability is good.
Particularly, the utility model discloses a time phase coding chip for quantum key distribution, it includes decoy attitude preparation module and time phase coding module;
the decoy state preparation module is used for preparing a decoy state or a signal state on the optical signal;
the time phase coding module is used for preparing a time phase state on the optical signal;
the time phase coding module is characterized by comprising an equal-arm interferometer chip module and an unequal-arm interferometer chip module;
at least one of the two optical arms of the unequal arm interferometer chip module is provided with an adjustable optical delay module;
the tunable optical delay module comprises one or a plurality of cascaded delay switching units, which are realized based on an interferometer and are used for providing delay switching for optical signals.
Further, the time phase encoding module includes a first optical splitter, a second optical splitter, and a third optical splitter;
two output ends of the first optical splitter are respectively connected with two input ends of the second optical splitter through a first waveguide and a second waveguide, and at least one of the first waveguide and the second waveguide is provided with a phase adjusting unit for carrying out phase modulation on optical signals, so that the equal-arm interferometer chip module is formed;
two output ends of the second optical beam splitter are respectively connected with two input ends of the third optical beam splitter through a third waveguide and a fourth waveguide, and the adjustable optical delay module is arranged on at least one of the third waveguide and the fourth waveguide, so that the unequal-arm interferometer chip module is formed.
Further, the delay switching unit includes an optical path selection component, a sixth waveguide, a seventh waveguide, and a fourth optical splitter;
the optical path selection component comprises an equal-arm MZ interferometer, the phase difference of two arms of the equal-arm MZ interferometer is adjustable, the equal-arm MZ interferometer is provided with an input end and two output ends, the two output ends are respectively connected with the two input ends of the fourth optical splitter through a sixth waveguide and a seventh waveguide, and therefore optical signals can enter the sixth waveguide or the seventh waveguide selectively;
the fourth optical beam splitter is arranged for coupling out the optical signals propagating along the sixth waveguide and the seventh waveguide;
the sixth waveguide and the seventh waveguide in the same delay switching unit have different optical paths.
Optionally, a thermally tuned phase shifter is disposed on at least one of the two arms of the equal-arm MZ interferometer of the optical path selection assembly.
Furthermore, the sixth waveguide and the seventh waveguide are respectively provided with a variable optical attenuator.
Optionally, the variable optical attenuator is implemented based on a carrier injection principle or based on an MZ interferometer.
Further, the delay switching unit includes a fifth optical splitter and a sixth optical splitter, two output ends of the fifth optical splitter are connected to two input ends of the sixth optical splitter through an eighth waveguide and a ninth waveguide, the eighth waveguide and the ninth waveguide are respectively provided with an adjustable optical attenuator, and the eighth waveguide and the ninth waveguide have different optical paths.
Further, an attenuation control module is arranged on at least one of the two optical arms of the unequal arm interferometer chip module and is used for providing controllable attenuation for optical signals propagating along the optical arms, so that the optical signals have the same attenuation in the unequal arm interferometer chip module.
Optionally, the attenuation control module comprises a carrier injection type attenuator.
Furthermore, a first high-speed phase modulator and a second high-speed phase modulator are arranged on the first waveguide, and a third high-speed phase modulator is arranged on the second waveguide.
Further, the modulation phase α of the first high-speed phase modulator 1 Modulation phase alpha of the second high-speed phase modulator 2 And modulation phase alpha of the third high-speed phase modulator 3 Selected from modulation phase combinations [ (0, 0), (pi/2, 0), (0, pi/2)]。
Further, the decoy state preparation module comprises an MZ interferometer;
the MZ interferometer of the decoy state preparation module comprises a seventh optical beam splitter and an eighth optical beam splitter;
two output ends of the seventh optical beam splitter are respectively connected with two input ends of the eighth optical beam splitter through a tenth waveguide and an eleventh waveguide;
a fifth high-speed phase modulator is arranged on the tenth waveguide;
and a phase modulator is arranged on the eleventh waveguide.
Optionally, the phase modulator on the eleventh waveguide is a high-speed phase modulator or a low-speed phase modulator based on thermo-optic effect.
Alternatively, the high-speed phase modulator is implemented based on the principle of the plasma dispersion effect, and is either a carrier injection type, a carrier deposition type, or a carrier depletion type.
Furthermore, the time phase coding chip further comprises a power equalization unit for equalizing the power of the time phase state.
Furthermore, the first output end of the decoy state preparation module is connected with the time phase coding module through a fifth waveguide, and a fourth high-speed phase modulator is arranged on the fifth waveguide and used as a power balancing unit.
Preferably, a first output end of the decoy state preparation module is provided with a variable optical attenuator, and a second output end is provided with a photodetector.
Optionally, the photodetector is a germanium photodetector epitaxially grown on a silicon material.
Preferably, the optical beam splitter is a multimode interferometer or a directional coupler.
Preferably, the time phase encoding chip is formed of a silicon material.
Drawings
The following describes the embodiments of the present invention in further detail with reference to the attached drawings.
In order to illustrate the embodiments of the present invention or the technical solutions in the prior art more clearly, the drawings used in the description of the embodiments or the prior art will be briefly introduced, it is obvious that the drawings in the description below are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained without creative efforts.
Fig. 1 shows a transmitting end encoding module for time phase encoding in the prior art;
FIG. 2 illustrates a prior art high speed silicon-based on-chip QKD encoding system;
fig. 3 shows an example of a time-phase encoded chip for quantum key distribution according to the present invention;
fig. 4 shows an example of the adjustable optical delay module of the present invention;
FIG. 5 illustrates a further example of the tunable optical delay module shown in FIG. 4;
fig. 6 shows another example of the dimmable delay module of the present invention.
Detailed Description
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following examples are provided by way of illustration in order to fully convey the spirit of the invention to those skilled in the art. Accordingly, the present invention is not limited to the embodiments disclosed herein.
According to the utility model discloses, time phase code chip can be including luring out attitude preparation module and time phase code module, and wherein, luring out attitude preparation module and being used for preparing on the light signal and luring out attitude or signal state, time phase code module then is used for preparing time phase state on the light signal.
Fig. 3 shows an example of the time phase encoding chip for quantum key distribution according to the present invention.
The utility model discloses in, the preparation module of tricking into attitude can realize with the help of MZ interferometer.
In the example of fig. 3, the MZ interferometer may include a seventh optical beam splitter 201 and an eighth optical beam splitter 202, wherein: the input end of the seventh optical splitter 201 is used as the input end of the decoy state preparation module and is connected with the input waveguide 100; two output ends of the seventh optical splitter 201 are connected to two input ends of the eighth optical splitter 202 through a tenth waveguide and an eleventh waveguide, respectively, to form two optical arms; the output of the eighth optical splitter 202 serves as the output of the spoofed state preparing module.
In the MZ interferometer, a fifth high-speed phase modulator 301 may be provided on the tenth waveguide for modulating the two-arm phase difference of the MZ interferometer to achieve high-speed preparation of the signal state and the decoy state.
Furthermore, a phase modulator 400 may be arranged on the eleventh waveguide for modulating the operating point of the MZ interferometer to the desired value. Since the phase modulator 400 does not directly participate in high-speed preparation of the signal state and the decoy state, it may employ a low-speed phase modulator based on the thermo-optic effect. Of course, the phase modulator 400 may also be a high-speed phase modulator.
Alternatively, the high-speed phase modulator may be implemented based on the principle of the plasma dispersion effect, and may also be of a carrier injection type, a carrier deposition type, or a carrier depletion type.
With continued reference to fig. 3, the optical signal prepared by the decoy state preparation module may be output to the outside through two output terminals of the eighth optical splitter 202. Therefore, a fifth waveguide may be connected at the first output of the eighth optical splitter 202 for allowing the optical signal to be transmitted to the time phase encoding module.
As mentioned before, the problem of power imbalance in the different time phase states produced when time phase encoding by means of high speed phase modulation in silicon based materials. Therefore, the utility model discloses a time phase code chip still is equipped with the power balancing unit for the different time phase state that makes time phase code chip output has balanced power.
Considering that the power imbalance in the time phase state results from different attenuations generated by the high-speed phase modulator at different modulation phases, the power equalization unit can be implemented with the fourth high-speed phase modulator 302 in the preferred example shown in fig. 3.
In particular, the attenuation IL (i) on the optical signal when encoding different time phase states i (i =1,2, 3.., N ') with the time phase encoding module may be calculated or tested obtained and the maximum value M' of IL (i) determined.
Then, the modulation phase φ of the fourth high-speed phase modulator 302 corresponding to the encoding of the different time phase states i such that the attenuation on the optical signal is at a maximum M' is determined PM4 (i)。
Therefore, the modulation phase of the fourth high-speed phase modulator 302 (power equalization unit) can be adjusted to φ when encoding the time phase state i PM4 (i) The attenuation on the optical signal of the temporal phase state i is guaranteed to a fixed value M', thereby achieving equalization of the power.
Optionally, an adjustable optical attenuator 501 may also be provided on the fifth waveguide for allowing the optical signal to be formed into a single photon signal.
The utility model discloses in, adjustable optical attenuator can realize based on the carrier injection principle, also can realize based on MZ interferometer.
Optionally, a photodetector 600 may be further connected to a second output terminal of the decoy state preparation module (e.g., a second output terminal of the eighth optical splitter 202) for monitoring the input optical power.
Preferably, photodetector 600 employs a germanium photodetector that is epitaxially grown on a silicon material.
The time phase encoding module may include an equal arm interferometer chip module and an unequal arm interferometer chip module.
The utility model discloses in, can set up the delay module 700 of can adjusting luminance on at least one in two optical arms of arm interferometer chip module not waiting, a delay difference for allow adjusting between two optical arms, provide adjustable arm length poor from this in arm interferometer chip module not waiting, make it to reduce the chip processing link to the poor accuracy requirement of arm length of arm interferometer not waiting, reduce the requirement of design link to the environmental disturbance resistance nature of arm interferometer not waiting, can satisfy the poor uniformity requirement of arm length of arm waiting in quantum key distribution in-process sender and the receiver based on time phase coding scheme simultaneously.
According to the utility model discloses, the delay module 700 of can adjusting luminance can be by one or cascaded a plurality of delay switching unit constitute, and wherein, every delay switching unit realizes based on the interferometer structure, allows the parameter that changes the interferometer structure, provides different time delay volume for the light signal switches, realizes the regulation to the arm length of light signal place light arm from this, realizes the regulation of the arm length difference (delay difference) of arm interferometer that varies promptly.
Those skilled in the art will appreciate that the tunable optical delay module 700 can theoretically have any desired adjustment accuracy and delay difference adjustment range in the cascade mode.
For example, when the tunable optical delay module 700 adopts a cascade structure, it is assumed that the cascade structure is formed by sequentially connecting N delay switching units through a waveguide, and a single delay switching unit hasWith M operating states (i.e., allowing switching between M time delay amounts), the tunable optical delay module 700 can provide M total time delay values for the optical signal N Different amounts of time delay.
For example, if the ith delay switching unit has the longest and shortest time delay amounts of Li1 and Li2, respectively, the tunable optical delay module 700 may have the longest and shortest time delay amounts of (L11 + L21+. + LN 1) and (L12 + L22+. + LN 2), respectively, and also have a plurality of selectable time delay amounts between the longest and shortest time delay amounts.
Fig. 4 shows an example of the tunable optical delay module of the present invention, which is formed by cascading a plurality of (e.g., three) delay switching units.
In the example of fig. 4, the delay switching unit includes an optical path selection component implemented by an equal-arm MZ interferometer.
The input end of the equal-arm MZ interferometer serving as the optical path selection member is connected to the input waveguide to receive the optical signal, and the two output ends (i.e., the first and second output ends) are connected to the two input ends of the fourth optical splitter through the sixth waveguide and the seventh waveguide, respectively.
And the fourth optical beam splitter is used for coupling out the optical signals transmitted along the sixth waveguide and the seventh waveguide.
The sixth waveguide and the seventh waveguide have different optical paths (lengths). For example, as shown in fig. 4, the sixth waveguide may have a length longer than the seventh waveguide by dT1 or dT2 or dT3.
Under the structure of the delay switching unit, the optical signal can be controlled to be output from the first or second output end of the equal-arm MZ interferometer to enter the sixth or seventh waveguide simply by changing the phase difference of the two arms in the equal-arm MZ interferometer, and thus the path selection of the optical signal is realized. Since the sixth and seventh waveguides have different optical paths, selection of the amount of time delay can be achieved by this path selection.
As an example, as shown in fig. 4, an equal-arm MZ interferometer used as an optical path selection member may include two optical splitters and first and second arms formed therebetween by means of waveguides, wherein at least one of the first and second arms is provided with a phase shifter PM for adjusting a phase difference between the two arms to allow path selection.
Preferably, the phase shifter PM used in the equal-arm MZ interferometer may employ a thermally tuned phase shifter.
Assume that the tunable optical delay module 700 employs a three-stage delay switching unit cascade structure shown in fig. 4, wherein: the first-stage delay switching unit has a maximum delay difference of 3ps and a minimum delay difference of 1 ps; the second-stage delay switching unit has a maximum delay difference of 5ps and a minimum delay difference of 1 ps; the third stage delay switching unit has a delay difference of at most 9ps and a delay difference of at least 1 ps.
At this time, different two-arm phase differences can be modulated by the phase shifters PM in the delay switching units of each stage, so that the tunable optical delay module 700 provides different time delay amounts for the optical signal. The corresponding relationship between the phase difference of the two arms and the time delay amount can be seen in table one.
(watch one)
As can be seen from the above table, with the 3-stage cascade structure, the tunable optical delay module 700 can have a step value of 2ps and a time delay amount tuning capability of minimum 3ps and maximum 17 ps.
Further, especially for the tunable optical delay module 700 with the cascade structure, a lookup table between the phase difference between the two arms of the interferometer and the target delay amount in each stage of the delay switching unit may be established in advance, so that the phase difference between the two arms of each stage of the delay switching unit required for realizing the target delay amount can be obtained conveniently by querying the lookup table.
Further, in the tunable optical delay module 700 with the cascade structure, the sixth waveguides in different delay switching units may have the same length, or may have different lengths; the seventh waveguides in different delay switching units may have the same length or may have different lengths. Thereby allowing rich time delay adjustment capabilities to be provided.
Those skilled in the art can understand that in the structure of the tunable optical delay module 700 shown in fig. 4, the equal-arm MZ interferometer used as the optical path selection component is only relied on to realize the path selection, which would require that the phase shifter (or the phase modulator) in the equal-arm MZ interferometer can well realize the extinction at a certain output end. In order to reduce the extinction requirement, the present invention is further improved based on the delay switching unit shown in fig. 4.
Fig. 5 shows a further example of the delay switching unit (dimmable delay module) of fig. 4.
As shown, the delay switching unit further includes adjustable optical attenuators VOA respectively disposed on the sixth waveguide and the seventh waveguide. Therefore, the optical signal propagated on the waveguide where the optical attenuator VOA is located can reach an extinction state by controlling the attenuation value of the variable optical attenuator VOA, thereby realizing the path selection function. At this time, even if the extinction ratio in the equal-arm MZ interferometer fails to completely realize that the optical signal is output from only a single output terminal, the optical signal can be extinguished on an undesired optical arm by means of the adjustable optical attenuator VOA, and the selection of the path is realized.
Fig. 6 shows another example of the delay switching unit (dimmable delay module) of the present invention.
As shown, the delay switching unit may include a fifth optical splitter and a sixth optical splitter, wherein: two output ends of the fifth optical beam splitter are connected with two input ends of the sixth optical beam splitter through an eighth waveguide and a ninth waveguide respectively to form an interferometer structure, the input end of the fifth optical beam splitter is used as the input end of the delay switching unit, and the output end of the sixth optical beam splitter is used as the output end of the delay switching unit.
In the delay switching unit shown in fig. 6, variable optical attenuators VOAs are provided on the eighth waveguide and the ninth waveguide, respectively, and the eighth waveguide and the ninth waveguide have different optical paths (lengths). Therefore, in the delay switching unit, the optical signal propagating on the waveguide where the variable optical attenuator VOA is located can be made to reach an extinction state simply by controlling the attenuation value of the variable optical attenuator VOA, thereby implementing a path selection function.
Continuing to refer to fig. 3, in the unequal-arm interferometer chip module, the optical signal can obtain different attenuations when obtaining different time delays, therefore, can also be in the utility model discloses a set up attenuation control module 502 on at least one in two optical arms of unequal-arm interferometer chip module for providing controllable attenuation for the optical signal of the waveguide propagation at its place, the power difference when compensating the optical signal and propagating along different optical arms makes the optical signal obtain the same attenuation in unequal-arm interferometer chip module.
As an example, after calibration of the delay difference between the two arms in the unequal-arm interferometer chip module is completed, the attenuation control module 502 may be adjusted to make the attenuation of the optical signal after passing through the two arms consistent, thereby ensuring that the prepared delay meets the expected quantum state.
As a preferred example, the attenuation control module 502 may employ a carrier injection type attenuator.
With continued reference to fig. 3, in this example, the temporal phase encoding module may include a first optical splitter 203, a second optical splitter 204, and a third optical splitter 205.
Two output ends of the first optical splitter 203 are connected to two input ends of the second optical splitter 204 through a first waveguide and a second waveguide, respectively, wherein at least one of the first waveguide and the second waveguide is provided with a phase adjusting unit for performing phase modulation on an optical signal, thereby forming an equal arm interferometer chip module.
Two output ends of the second optical splitter 204 are connected to two input ends of the third optical splitter 205 through a third waveguide and a fourth waveguide, respectively, thereby constituting an unequal arm interferometer chip module.
Wherein the tunable optical delay module 700 is disposed on at least one of the third waveguide and the fourth waveguide (e.g., the third waveguide); meanwhile, the attenuation control module 502 is disposed on at least one of the third waveguide and the fourth waveguide (e.g., the fourth waveguide).
An input of the equal arm interferometer chip module (e.g., the input of the first optical splitter 203) may be an input of the time phase encoding module, and the fifth waveguide is connected to receive the optical signal. The output of the unequal arm interferometer chip module (e.g., the output of the third optical splitter 205) may be used as the output of the time phase encoding module, and the output waveguide 800 is connected to output the encoded optical signal.
Therefore, when an optical signal (which is output by the decoy state preparation module, for example) enters the time phase encoding module via a waveguide (e.g., the fifth waveguide), the phase difference between the two arms in the equal-arm interferometer chip module can be adjusted to 0 by means of the phase adjustment unit in the equal-arm interferometer chip module, so that the optical signal is all output from the first output end of the equal-arm interferometer chip module into the long arm of the unequal-arm interferometer chip module, thereby preparing the | Z1> state on the optical signal; adjusting the phase difference of two arms in the equal-arm interferometer chip module to pi, so that all optical signals are output from a second output end of the equal-arm interferometer chip module to enter a short arm of the unequal-arm interferometer chip module to prepare an | Z0> state; adjusting the phase difference of two arms in the equal-arm interferometer chip module to pi/2, enabling optical signals to be equally and simultaneously output from two output ends of the equal-arm interferometer chip module and respectively enter a long arm and a short arm of the unequal-arm interferometer chip module, and preparing an | X0> state; and adjusting the phase difference of two arms in the equal-arm interferometer chip module to be 3 pi/2, so that optical signals are equally and simultaneously output from two output ends of the equal-arm interferometer chip module and respectively enter a long arm and a short arm of the unequal-arm interferometer chip module to prepare an | X1> state.
In the present invention, in order to reduce the number and maximum level values of the phase driving levels for time phase encoding, the phase adjusting unit on the first waveguide may be realized by means of two high-speed phase modulators (i.e., the first high-speed phase modulator 303 and the second high-speed phase modulator 304), and the phase adjusting unit on the second waveguide may be realized by means of a single high-speed phase modulator (i.e., the third high-speed phase modulator 305).
Table two shows the modulation phase α of the first high-speed phase modulator 303 for implementing 4 time phase states 1 Modulation phase α of the second high-speed phase modulator 304 2 And the modulation phase alpha of the third high-speed phase modulator 305 3 The corresponding numerical values in (1).
(watch two)
It can be seen that the modulation phase α of the first high speed phase modulator 303 1 Modulation phase α of the second high-speed phase modulator 304 2 And the modulation phase a of the third high-speed phase modulator 305 3 Selected from modulation phase combinations [ (0, 0), (pi/2, 0), (0, pi/2)]The preparation of 4 time phase states can be realized. At this time, the maximum phase of modulation required by a single high-speed phase modulator is pi/2, namely 4 time phase states required by the distribution of the coded quantum key can be coded, and correspondingly, the loaded voltage is only half of the half-wave voltage (V) π/2 ) Which is reduced to the conventional scheme (V) 3π/2 ) 1/3 of (1). Meanwhile, each phase modulator only needs to drive 2 levels (0 and 0.5 sesqui-wave voltage), complex four-level driving is not needed, the phase modulator is easy to realize in engineering, high and low temperature stability is good, and complex monitoring and compensation on voltage characteristics are not needed.
The power equalization process implemented by means of the fourth high-speed phase modulator 302 will be described in detail below with reference to the example of fig. 3.
First, the modulation phases of the first to third high- speed phase modulators 303, 304, and 305 may be set to 0.
Then, the attenuation IL (i) of the first to third high-speed phase modulators on the optical signal under different encoding conditions with a phase difference φ (i) between the first and second input terminals of the second optical splitter 204 is obtained according to calculation or testing, wherein i =1,2,3, \8230;, N'.
The maximum value M' of the attenuation IL (i) is solved.
The phase φ of the fourth high-speed phase modulator 302 is then adjusted by theoretical calculations or tests PM4 (i) Such that the attenuation on the optical signal is constant at M' when the phase difference between the first and second inputs of the second optical splitter 204 is phi (i).
Thus, when time phase encoding is performed, the phase difference φ (i) between the first and second inputs of the second optical splitter 204 corresponds to a time phaseIn this state, the modulation phase of the fourth high-speed phase modulator 302 can be adjusted to phi PM4 (i) Thereby, the optical signals in different time phase states obtain the same attenuation M'.
The time phase coding chip of the utility model can be preferably prepared by silicon-based materials. Accordingly, each of the optical beam splitter, the waveguide, the (high speed) phase modulator, the phase shifter, the variable optical attenuator, and the photodetector is formed of a silicon material.
Preferably, the optical beam splitter may be a multimode interferometer or a directional coupler.
To sum up, the utility model discloses a time phase coding chip can drive level and biggest V with the help of two kinds of phase place π/2 The phase driving level value of (4) time phase states required by quantum key distribution are realized, complex four-level driving and complex monitoring and compensation are not needed, the implementation is easier in engineering, the high and low temperature stability is good, and meanwhile, because the phase driving level value is implemented on a chip, the cost and the volume cannot be obviously increased by increasing the number of phase modulators.
In addition, by introducing the power balancing unit, the power of the phase states at different coding times is more balanced easily, algorithm correction on the power imbalance commonly existing in the existing coding device is not needed, the safe code rate of quantum key distribution can be improved, and the requirement on later algorithm optimization is reduced.
Particularly, the problem of inconsistent arm lengths of interferometers of a sender and a receiver in quantum key distribution can be effectively solved by introducing the specially designed adjustable optical delay module based on a chip scheme, and the quantum key distribution efficiency and the bit error rate are improved.
Although the present invention has been described in connection with the accompanying drawings by way of specific embodiments, those skilled in the art will readily appreciate that the above-described embodiments are illustrative only and are not intended to be limiting, in view of the principles of the present invention, and that various combinations, modifications and equivalents of the above-described embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention.
Claims (20)
1. A time phase coding chip for quantum key distribution comprises a decoy state preparation module and a time phase coding module;
the decoy state preparation module is used for preparing a decoy state or a signal state on the optical signal;
the time phase coding module is used for preparing a time phase state on the optical signal;
the time phase coding module is characterized by comprising an equal-arm interferometer chip module and an unequal-arm interferometer chip module;
at least one of the two optical arms of the unequal arm interferometer chip module is provided with an adjustable optical delay module;
the tunable optical delay module comprises one or a plurality of cascaded delay switching units, which are realized based on an interferometer and are used for providing delay amount switching for optical signals.
2. The time phase encoding chip of claim 1, wherein the time phase encoding module comprises a first optical splitter, a second optical splitter, and a third optical splitter;
two output ends of the first optical splitter are respectively connected with two input ends of the second optical splitter through a first waveguide and a second waveguide, and at least one of the first waveguide and the second waveguide is provided with a phase adjusting unit for carrying out phase modulation on optical signals, so that the equal-arm interferometer chip module is formed;
two output ends of the second optical beam splitter are respectively connected with two input ends of the third optical beam splitter through a third waveguide and a fourth waveguide, and the adjustable optical delay module is arranged on at least one of the third waveguide and the fourth waveguide, so that the unequal-arm interferometer chip module is formed.
3. The time-phase coding chip of claim 1 or 2, wherein the delay switching unit includes an optical path selection component, a sixth waveguide, a seventh waveguide, and a fourth optical beam splitter;
the optical path selection component comprises an equal-arm MZ interferometer, the phase difference of two arms of the equal-arm MZ interferometer is adjustable, the equal-arm MZ interferometer is provided with an input end and two output ends, the two output ends are respectively connected with the two input ends of the fourth optical splitter through a sixth waveguide and a seventh waveguide, and therefore optical signals can enter the sixth waveguide or the seventh waveguide selectively;
the fourth optical beam splitter is arranged for coupling out the optical signals propagating along the sixth waveguide and the seventh waveguide;
the sixth waveguide and the seventh waveguide in the same delay switching unit have different optical lengths.
4. The time-phase encoding chip of claim 3, wherein a thermally tuned phase shifter is disposed on at least one of the two arms of the equal-arm MZ interferometer of the optical path selection assembly.
5. The time phase encoding chip according to claim 3, wherein the sixth waveguide and the seventh waveguide are respectively provided with a variable optical attenuator.
6. The time-phase encoded chip of claim 5, wherein the variable optical attenuator is implemented based on a carrier injection principle or based on an MZ interferometer.
7. The time-phase coding chip of claim 1 or 2, wherein the delay switching unit comprises a fifth optical splitter and a sixth optical splitter, two output terminals of the fifth optical splitter are connected to two input terminals of the sixth optical splitter through an eighth waveguide and a ninth waveguide, respectively, an adjustable optical attenuator is disposed on each of the eighth waveguide and the ninth waveguide, and the eighth waveguide and the ninth waveguide have different optical paths.
8. The time phase encoding chip of claim 1, wherein an attenuation control module is disposed on at least one of the two arms of the unequal arm interferometer chip module for providing a controllable attenuation to the optical signal propagating along the arm, such that the optical signal has the same attenuation in the unequal arm interferometer chip module.
9. The time-phase encoded chip of claim 8, wherein the attenuation control module comprises a carrier injection type attenuator.
10. The time phase encoded chip of claim 2, wherein a first high speed phase modulator and a second high speed phase modulator are disposed on the first waveguide, and a third high speed phase modulator is disposed on the second waveguide.
11. The time phase encoded chip of claim 10, wherein the modulation phase a of the first high speed phase modulator 1 Modulation phase alpha of the second high-speed phase modulator 2 And modulation phase alpha of the third high-speed phase modulator 3 Selected from modulation phase combinations [ (0, 0), (pi/2, 0), (0, pi/2)]。
12. The time-phase encoded chip of claim 1, wherein the decoy-state preparation module comprises a MZ interferometer;
the MZ interferometer of the decoy state preparation module comprises a seventh optical beam splitter and an eighth optical beam splitter;
two output ends of the seventh optical beam splitter are respectively connected with two input ends of the eighth optical beam splitter through a tenth waveguide and an eleventh waveguide;
a fifth high-speed phase modulator is arranged on the tenth waveguide;
and the eleventh waveguide is provided with a phase modulator.
13. The time phase encode chip of claim 12, wherein the phase modulator on the eleventh waveguide is a high speed phase modulator or a low speed phase modulator based on thermo-optic effect.
14. The time phase encoding chip of any one of claims 10-13, wherein the high speed phase modulator is implemented based on the principle of the plasma dispersion effect, or is of a carrier injection type, a carrier deposition type, or a carrier depletion type.
15. The time-phase encoded chip of claim 1, further comprising a power equalization unit to equalize the power of the time phase states.
16. The time phase coding chip of claim 15, wherein the first output end of the decoy state preparation module is connected to the time phase coding module through a fifth waveguide, and a fourth high-speed phase modulator is disposed on the fifth waveguide and used as a power equalization unit.
17. The time phase encoding chip of claim 1, wherein the decoy state preparation module has a variable optical attenuator at a first output and a photodetector at a second output.
18. The time-phase encoded chip of claim 17, wherein the photodetector is a germanium photodetector epitaxially grown on a silicon material.
19. The time phase encoding chip of claim 2, wherein the optical beam splitter is a multimode interferometer or a directional coupler.
20. The time-phase encoded chip of claim 1, formed of a silicon material.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116633538A (en) * | 2023-06-28 | 2023-08-22 | 安庆师范大学 | Multi-protocol compatible quantum key distribution integrated chip for high-speed coding |
| WO2023246768A1 (en) * | 2022-06-22 | 2023-12-28 | 科大国盾量子技术股份有限公司 | Method for adjusting time delay difference between unequal-arm interferometer chip and time phase coding chip |
| CN118018201A (en) * | 2024-04-09 | 2024-05-10 | 国开启科量子技术(安徽)有限公司 | Chip structure for time phase coding and transmitting end of QKD system |
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2022
- 2022-06-22 CN CN202221588911.7U patent/CN218162473U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023246768A1 (en) * | 2022-06-22 | 2023-12-28 | 科大国盾量子技术股份有限公司 | Method for adjusting time delay difference between unequal-arm interferometer chip and time phase coding chip |
| CN116633538A (en) * | 2023-06-28 | 2023-08-22 | 安庆师范大学 | Multi-protocol compatible quantum key distribution integrated chip for high-speed coding |
| CN116633538B (en) * | 2023-06-28 | 2024-04-26 | 安庆师范大学 | Multi-protocol compatible quantum key distribution integrated chip for high-speed coding |
| CN118018201A (en) * | 2024-04-09 | 2024-05-10 | 国开启科量子技术(安徽)有限公司 | Chip structure for time phase coding and transmitting end of QKD system |
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