CN218158255U - Universal battery information acquisition circuit device - Google Patents

Universal battery information acquisition circuit device Download PDF

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CN218158255U
CN218158255U CN202222248921.2U CN202222248921U CN218158255U CN 218158255 U CN218158255 U CN 218158255U CN 202222248921 U CN202222248921 U CN 202222248921U CN 218158255 U CN218158255 U CN 218158255U
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circuit
voltage
isolation
acquisition
cpu
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马晓涛
张干
李晓伟
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Yantai Dongfang Yokelin Electonic Co ltd
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Yantai Dongfang Yokelin Electonic Co ltd
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Abstract

The utility model provides a general battery information acquisition circuit device, it includes CPU and a set of or the general acquisition circuit of multiunit, include in the general acquisition circuit: the system comprises an information acquisition circuit block, a single voltage isolation switching circuit, a voltage isolation and operational amplifier processing circuit and a temperature acquisition circuit; the single voltage isolation switching circuit comprises an external series resistor and a sampling resistor, realizes the voltage division sampling of the battery voltage, and is connected with the voltage isolation and operational amplifier processing circuit through a solid relay isolation control component; the isolation and operational amplifier processing circuit comprises an isolation amplifier and an operational amplifier processing circuit which are sequentially connected, and an ADV signal suitable for the voltage grade of the CPU is formed and is connected to the CPU; the temperature acquisition circuit comprises one or more groups of temperature sensors and standard resistors, and is connected to the CPU in combination with the control time sequence of the IIC expansion IO port. The device breaks the solidification design limitation of the existing information acquisition device, realizes the information acquisition of batteries with different voltage grades by configuring an external resistor, and has flexible topology application and simple and easy operation.

Description

Universal battery information acquisition circuit device
Technical Field
The utility model relates to a battery information acquires and handles technical field comprehensively, especially relates to a general battery information acquisition circuit arrangement.
Background
Based on the demand of new energy revolution, the electric application in a plurality of fields such as automobiles, communication, electric power, railways, ships, underwater equipment, unmanned aerial vehicles and the like is gradually widened; based on different requirements of various application occasions on battery characteristics, the types of applied batteries are different, different acquisition schemes are adopted for batteries with different voltage grades, the requirement on the universality of a battery management system, particularly a battery acquisition unit, a special battery front-end acquisition chip is generally adopted for acquiring battery information at present, the range of the voltage grade of the targeted battery is narrow, the technology applied in the current field is solidified in the chip due to principle design, so the voltage sampling grade can be generally only applied to a single type of battery, the acquisition chip is fixed according to the acquisition voltage grade, the voltage and temperature acquisition paths, the structure and the acquisition principle belong to solidified design, when the battery is used for different battery scales and models, the condition that the acquisition effect and the acquisition requirement cannot be matched easily occurs, when the batteries with different types are acquired, the acquisition chips of different manufacturers need to be replaced, and the manufacturers need to frequently drive the application personnel from the bottom layer to develop and design; and the single voltage temperature sampling path ratio of the traditional battery front end acquisition chip is lower, the temperature acquisition path number is relatively less, and the reliability of a temperature data result is difficult to ensure.
The information disclosed in this background section of the invention is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information constitutes prior art already known to a person skilled in the art.
SUMMERY OF THE UTILITY MODEL
In order to solve the problems, the utility model provides a universal battery information acquisition circuit device, which is characterized in that a monomer voltage isolation switching circuit is arranged to realize the voltage division sampling of the battery voltage through an external series resistor and a sampling resistor, and the polarity selection and the cut-in of a single battery are realized through the isolation control of a photoelectric solid-state relay; the isolation and operational amplifier processing circuit performs isolation and amplification on the cut-in battery voltage division signals, ADV signals suitable for the CPU voltage grade are obtained through operational amplifier processing, and the temperature acquisition circuit is combined with the IIC to expand the control time sequence of the IO port, so that the acquisition of the voltage division signals of the NTC thermistor temperature sensor and the standard resistor is realized. The bottom layer code and the application layer code can be universal, the modular circuit can be universal, and the application topology of the universal acquisition circuit block can be flexibly configured based on the requirements of different application occasions such as the number of serial battery nodes, the battery space layout, the communication mode and the like. Preferably, in one embodiment, the circuit arrangement comprises:
CPU and one or more corresponding group of general acquisition circuit, general acquisition circuit includes: the system comprises an information acquisition circuit block, a single voltage isolation switching circuit, a voltage isolation and operational amplifier processing circuit and a temperature acquisition circuit;
the single voltage isolation switching circuit comprises an external series resistor and a sampling resistor, realizes the voltage division sampling of the battery voltage, and is connected with the voltage isolation and operational amplifier processing circuit through the solid relay isolation control component;
the isolation and operational amplifier processing circuit is arranged on the information acquisition circuit block and comprises an isolation amplifier and an operational amplifier processing circuit which are connected in sequence, the isolation amplifier is used for carrying out isolation amplification on a switched-in battery voltage division signal, an ADV signal suitable for the voltage grade of the CPU is formed through operational amplifier processing, and the ADV signal is connected to the CPU through an AD interface;
the temperature acquisition circuit comprises one or more groups of temperature sensors and standard resistors, temperature signals of the acquired battery and voltage division signals of the associated standard resistors are sampled by the temperature sensors, and the temperature signals and the voltage division signals are connected to the CPU in combination with the control time sequence of the IIC expansion IO port.
As a further improvement of the present invention, in an embodiment, the general acquisition circuit further includes: and the power supply conversion circuit is connected with the isolation amplifier of the isolation and operational amplifier processing circuit, and VA is obtained by VCC isolation conversion, so that the isolation of the low-voltage digital circuit and the high-voltage battery loop is realized, and the crosstalk of the high-voltage battery loop to the low-voltage digital circuit is avoided.
Further, in one embodiment, the universal acquisition circuit further includes an IIC expansion IO circuit, which is connected to the CPU through an IIC interface to realize IO expansion; when a plurality of universal acquisition circuits are adopted, the IIC expansion IO circuit is correspondingly connected to the IIC interface of the CPU in parallel through the SDA and the SCL.
Optionally, the IIC extended IO circuit is connected to the CPU through the primary side of the photoelectric solid-state relay, the input end of the IIC extended IO circuit is connected to the address lines of different information acquisition circuit blocks, and the output end is connected to the primary side of the photoelectric solid-state relay, so as to implement on-off control of the photoelectric solid-state relay, and implement synchronous application of multiple general acquisition circuits by combining multiple address lines.
Furthermore, one end of the external series resistor is connected to the positive electrode or negative electrode sampling point of the corresponding battery through a fuse, and the other end of the external series resistor is connected with a voltage acquisition interface pin of the information acquisition circuit block;
the sampling resistor is connected between voltage acquisition resistor interfaces RG1 and RG2 of the information acquisition circuit block.
In an optional embodiment, one end of each temperature sensor of the temperature acquisition circuit is connected to the Tn pin of the information acquisition circuit block, the other end is connected to VCC or GND, one end of the standard resistor is connected to the TnR pin of the information acquisition circuit block, and the other end is connected to GND or VCC.
On the other hand, in one embodiment, when the temperature sensor is a thermistor temperature sensor, the temperature signal line is connected to the CPU through an AD interface, and when the temperature sensor is a digital temperature sensor, the temperature signal line is connected to the CPU through a digital IO interface.
Further, in an optional embodiment, the circuit device further includes an external AD acquisition chip, one end of which is connected to the ADV signal interface of the information acquisition circuit block, and the other end of which is connected to the communication port of the CPU, and the CPU reads the corresponding detection information.
In addition, as the utility model discloses a further improvement, circuit arrangement still includes isolation sensor, sets up the inside AD collection of passing through the switch break-make access of temperature acquisition interface, and the interface is gathered as the extension to the signal that the sensor was kept apart in the outside access for the pressure or the humidity information of battery are gathered in the extension.
Compared with the closest prior art, the utility model discloses still have following beneficial effect:
the utility model provides a pair of general battery information acquisition circuit arrangement, monomer voltage isolation switching circuit include external series resistance and sampling resistor, realize the partial pressure sampling of battery voltage, realize the information acquisition of different voltage levels battery through disposing external resistance, the topology is nimble in the system application, bottom and application layer code can be general, the modularization circuit can be general, voltage sampling level adaptation scope is wider, only need change external divider resistance can realize the sampling commonality of different grade type batteries, need not change the procedure of bottom;
furthermore, the photoelectric solid-state relay is adopted because the secondary side conduction resistance is small, the influence on the sampling precision caused by the serial connection in the sampling loop is small, and the accuracy of the battery information acquisition result is ensured;
in addition, the utility model discloses keep apart the amplification to the battery partial pressure signal that cuts in through keeping apart and operational amplifier treatment circuit, obtain the ADV signal that is fit for CPU voltage grade through operational amplifier treatment to insert CPU's AD interface and sample, CPU combines the control chronogenesis of IIC extended IO, judges the battery serial number of inserting, thereby corresponds the voltage information who obtains the battery according to the partial pressure proportion;
the temperature acquisition circuit comprises one or more groups of temperature sensors and standard resistors, and is connected with the CPU in combination with the control time sequence of the IIC expansion IO port, so that the defect of insufficient temperature sampling paths in the prior art is overcome, the temperature sampling paths can be flexibly changed according to application requirements, and the operation is simple.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, together with the description of embodiments of the invention, serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic circuit diagram of a general battery information acquisition circuit device according to an embodiment of the present invention;
fig. 2 is an independent structural diagram of a general acquisition circuit block in the general battery information acquisition circuit device provided by the embodiment of the present invention;
fig. 3 is an equivalent schematic diagram of voltage sampling of a voltage isolation switching circuit in a general battery information acquisition circuit device according to an embodiment of the present invention;
fig. 4 is a diagram of a topology of an optoelectronic solid state relay of a general battery information collecting circuit device according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a switching timing sequence of a photoelectric solid-state relay of the general battery information acquisition circuit device provided in the embodiment of the present invention;
fig. 6 is an exemplary diagram illustrating a channel sampling timing principle of an optoelectronic solid-state relay of a general battery information collecting circuit device according to an embodiment of the present invention;
fig. 7 is an equivalent schematic diagram of temperature sampling of a temperature sampling circuit in the general battery information acquisition circuit device provided by the embodiment of the present invention;
fig. 8 is a diagram illustrating an exemplary centralized application of a circuit device for collecting battery information according to an embodiment of the present invention;
fig. 9 is a structural diagram of an exemplary distributed application of a general battery information collecting circuit device according to another embodiment of the present invention.
Detailed Description
The following will be described in detail with reference to the drawings and examples, whereby the implementers of the present invention can fully understand how to apply the technical means to solve the technical problems, and achieve the technical effect of the implementation process and implement the implementation process according to the above. It should be noted that, as long as no conflict is formed, the embodiments and the features of the embodiments of the present invention may be combined with each other, and the technical solutions formed are all within the scope of the present invention.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. When an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The demand of new energy revolution, and the electric application in a plurality of fields such as automobiles, communication, electric power, railways, ships, underwater equipment, unmanned aerial vehicles and the like is gradually widened; based on different requirements of various application occasions on battery characteristics, the types of applied batteries are different, different acquisition schemes are adopted for batteries with different voltage grades, the requirement on the universality of a battery management system, particularly a battery acquisition unit, a special battery front-end acquisition chip is generally adopted for acquiring battery information at present, the range of the voltage grade of the targeted battery is narrow, the technology applied in the current field is solidified in the chip due to principle design, so the voltage sampling grade can be generally only applied to a single type of battery, the acquisition chip is fixed according to the acquisition voltage grade, the voltage and temperature acquisition paths, the structure and the acquisition principle belong to solidified design, when the battery is used for different battery scales and models, the condition that the acquisition effect and the acquisition requirement cannot be matched easily occurs, when the batteries with different types are acquired, the acquisition chips of different manufacturers need to be replaced, and the manufacturers need to frequently drive the application personnel from the bottom layer to develop and design; moreover, the single voltage and temperature sampling path ratio of the traditional battery front-end acquisition chip is low, the temperature acquisition path ratio is relatively small, the reliability of a temperature data result is difficult to guarantee, and the requirement of a customer (2.
In order to solve the above problem, the utility model provides a general battery information acquisition circuit device, from the modularization performance of optimizing the circuit device, be different from the principle solidification design that the chip was gathered to the special battery front end, including CPU and a set of or the general acquisition circuit of multiunit, include in the general acquisition circuit: the system comprises an information acquisition circuit block, a single voltage isolation switching circuit, a voltage isolation and operational amplifier processing circuit and a temperature acquisition circuit; the single voltage isolation switching circuit comprises an external series resistor and a sampling resistor, realizes the voltage division sampling of the battery voltage, and is connected with the voltage isolation and operational amplifier processing circuit through a solid relay isolation control component; the isolation and operational amplifier processing circuit comprises an isolation amplifier and an operational amplifier processing circuit which are sequentially connected, and an ADV signal suitable for the voltage grade of the CPU is formed and is connected to the CPU; the temperature acquisition circuit is connected to the CPU in combination with the control time sequence of the IIC expansion IO port. The device bottom layer and application layer code can be general, and the modular circuit can be general, only needs to change external divider resistance can realize the sampling commonality of different grade type batteries.
The detailed structure and operation of the system of the embodiments of the present invention will be described in detail based on the accompanying drawings, and although the logical order of the operations is indicated in the operation description, in some cases, the operation procedures shown or described may be performed in an order different from that herein.
Example one
Fig. 1 shows a schematic circuit structure diagram of a general battery information acquisition circuit device provided in an embodiment of the present invention, and as can be seen from fig. 1, the circuit device includes:
CPU and one set or multiunit general acquisition circuit, general acquisition circuit includes: the system comprises an information acquisition circuit block, a single voltage isolation switching circuit, a voltage isolation and operational amplifier processing circuit and a temperature acquisition circuit;
the single voltage isolation switching circuit comprises an external series resistor and a sampling resistor, realizes voltage division sampling of the battery voltage, and is connected with the voltage isolation and operational amplifier processing circuit through a solid relay isolation control assembly;
the isolation and operational amplifier processing circuit is arranged on the information acquisition circuit block and comprises an isolation amplifier and an operational amplifier processing circuit which are connected in sequence, the isolation amplifier is used for carrying out isolation amplification on a switched-in battery voltage division signal, an ADV signal suitable for the voltage grade of the CPU is formed through operational amplifier processing, and the ADV signal is connected to the CPU through an AD interface;
the temperature acquisition circuit comprises one or more groups of temperature sensors and standard resistors, temperature signals of the acquired battery and voltage division signals of the associated standard resistors are sampled by the temperature sensors, and the temperature signals and the voltage division signals are connected to the CPU in combination with the control time sequence of the IIC expansion IO port.
By adopting the universal battery information acquisition circuit device in the embodiment, the bottom layer and the application layer codes can be universal, the modular circuit can be universal, and the sampling universality of different types of batteries can be realized only by changing the external divider resistor.
Based on the universality and flexible configurability of the universal acquisition circuit block, the current battery information acquisition requirements and common applications are combined, and when the universal acquisition circuit block is actually put into life application, the universal acquisition circuit block can be standardized and modularized according to the design thought, so that the subsequent acquisition system can be conveniently designed, for example, a simplified schematic diagram of the standardized and modularized universal acquisition circuit block is shown in fig. 2;
the functional classification and description for the pins are shown in table 1 below:
Figure BDA0003816538240000061
in a preferred embodiment, one end of the external series resistor is connected to the positive or negative sampling point of the corresponding battery through a fuse, and the other end of the external series resistor is connected with a voltage acquisition interface pin of the information acquisition circuit block;
the sampling resistor is connected between voltage acquisition resistor interfaces RG1 and RG2 of the information acquisition circuit block.
The monomer voltage isolation switching circuit realizes the voltage division sampling of the battery voltage through an external series resistor and a sampling resistor, wherein one end of the external series resistor is connected to Cn (C0-C8), the other end is connected to the positive electrode or negative electrode sampling point of the corresponding battery through a fuse,
one end of the sampling resistor is connected to RG1, and the other end is connected to RG2, and the specific values and design requirements can be seen in fig. 3.
Based on the voltage sampling equivalence principle shown in fig. 3, C0 to C8 are battery voltage sampling connection points, and a technician usually determines the proportion of the series resistor R and the sampling resistor RG according to the battery voltage grade based on a set rule and in combination with the input parameters of the adopted isolation amplifier;
in one embodiment, the skilled person sets the resistance ratio to satisfy the following formula, taking the voltage across the sampling resistor RG as 2V as an example:
Figure BDA0003816538240000071
in the formula, VRG is the voltage at two ends of a sampling resistor RG, RG is the resistance value of the sampling resistor externally connected with RG1 and RG2 pins shown in figure 3, and R is the resistance value of a divider resistor sampled and connected in series by C0-C8 batteries shown in figure 3; VBmax is the highest value of the cell voltage.
Considering the equivalent impedance requirement of the sampling circuit on the battery, the resistance value is set according to the following formula:
2R+RG≥5kΩ/V
taking VBmax =20V as an example, by substituting the above two equations, the following setting results can be obtained:
Figure BDA0003816538240000072
take R =5RG
Figure BDA0003816538240000073
Take RG =15k Ω
Then R =75k Ω
Based on the foregoing the utility model discloses the design does not need the topological structure of artifical adjustment circuit block to the battery object of difference, only need according to the voltage class, confirm external resistance value can, further according to the battery way number, confirm the quantity of gathering the circuit block.
Furthermore, single battery polarity selection and switching-in are realized through isolation control of the photoelectric solid-state relay, and a subsequent isolation and operational amplifier processing circuit is accessed;
the photoelectric solid-state relay is shown in a schematic block diagram in fig. 4: the reason for adopting the photoelectric solid-state relay is that the secondary side on-resistance is small, the influence on the sampling precision is small when the photoelectric solid-state relay is connected in series in a sampling loop, further, the photoelectric solid-state relay is not limited to the photoelectric solid-state relay, devices with an isolation function and small secondary side on-resistance are also suitable for the circuit, such as a reed switch relay and the like, and the switching time sequence of the photoelectric solid-state relay is shown in figure 5.
Taking a certain type of ARM as an example, an AD sampling timing sequence can realize sampling conversion of 8 paths of AD ports in 250 μ S, combining a photoelectric solid state relay switching timing sequence shown in fig. 5, where the time of Ton and Toff is less than 1ms, further considering an IIC communication timing sequence and an isolation amplifier conversion timing sequence, a channel switching interval is set to be 2-3 ms, and a channel sampling timing sequence with a 2.5ms period as an example is shown in fig. 6, configuring and issuing a switching state of a corresponding channel 1 through IIC communication, where the photoelectric solid state relay performs a switching action according to the corresponding switching state, cuts in a corresponding acquisition channel to an isolation amplifier, and finally outputs an ADV voltage to subsequent AD acquisition through the isolation amplifier and an operational amplifier processing circuit, so far, the used timing sequence time is 2ms, and the following 0.5ms is used as a reading time of AD acquisition, and can perform software filtering for reading an AD value for multiple times to obtain an AD value within the timing sequence time for 1 filtering; after the operation of the channel is executed, the operation of the channel 2 is carried out according to the time sequence, the operation to the channel n is executed in sequence, then the operation is switched to the operation of the channel 1, and the operation is executed in a reciprocating way, so that the periodic sampling of each channel is realized; taking 12 acquisition channels with 8 voltages and 4 temperatures as an example, the time for completing sampling of all channels at one time is 12 × 2.5ms, namely 30ms.
Further considering sampling precision and signal interference, and combining with a communication time sequence, the method can perform multiple cache filtering on a sampling AD value for 1 time according to the sampling period of all channels, namely 30ms, for example, 10 times, namely, filtering the AD value for 2 times through a time sequence of 300ms, and obtain a sampling AD value for 2 times of filtering results of the channel, thereby further ensuring the smoothness and the anti-interference performance of the sampling results, and subsequently performing zero point compensation, conversion calculation and correction on the sampling AD value for 2 times of filtering results according to the sampling proportion of corresponding external resistors to obtain the actual information value of the final acquisition channel.
And further classifying the acquired actual information values of the channels according to the voltage, the temperature or the information types corresponding to the external sensors, and acquiring the specific pitch position of the battery pack where the actual information values are located according to the IIC address of the channel acquisition circuit block and the specific configured channel number of the general acquisition circuit block, so that the host can conveniently gather and process subsequent information and complete the report of the information. Based on the circuit topology structure of the application, unexpected effects can be realized by combining a conventional signal processing scheme, and the periodic sampling of each channel is realized in order.
The voltage-withstanding grade and the single voltage grade of the photoelectric solid-state relay determine the maximum number of sampled battery nodes, that is, in practical application, the total voltage of the battery pack is generally set to be smaller than the voltage-withstanding grade of the photoelectric solid-state relay.
And then the isolation and operational amplifier processing circuit performs isolation amplification on the switched-in battery voltage division signal, an ADV signal suitable for the voltage grade of the CPU is obtained through operational amplifier processing so as to be accessed to an AD interface of the CPU for sampling, the CPU judges the accessed battery serial number by combining with the control time sequence of the IO extended by the IIC, and accordingly voltage information of the battery is correspondingly obtained according to the voltage division proportion.
In an alternative embodiment, one end of each temperature sensor of the temperature acquisition circuit is connected to the Tn pin of the information acquisition circuit block, the other end is connected to VCC or GND, one end of the standard resistor is connected to the TnR pin of the information acquisition circuit block, and the other end is connected to GND or VCC.
The temperature acquisition circuit is combined with the IIC to expand the control time sequence of the IO port, so that the acquisition of the voltage division signals of the NTC thermistor temperature sensor and the standard resistor is realized, one end of the NTC thermistor is connected to Tn, the other end of the NTC thermistor is connected to VCC or GND, one end of the standard resistor is connected to TnR, and the other end of the standard resistor is connected to GND or VCC, specifically shown in FIG. 7;
combining the equivalent principle of temperature collection shown in fig. 7, T1& T1R-T4 & T4R of the information collection circuit block are battery temperature sampling connection points, in practical application, an NTC thermistor can be used as a temperature sensor, one end of the temperature sensor is connected to the Tn connection point, one end is connected to a VCC power supply, the resistance value of a divider resistor RT is selected according to the NTC resistance value, the zero power resistance value of NTC at 25 ℃ is generally selected, and is generally 10k Ω or 100k Ω, one end of the RT resistor is connected to the TnR connection point, and one end is connected to a GND power ground,
based on the above temperature sampling circuit structure, the temperature sampling voltage is:
Figure BDA0003816538240000081
in the formula, VRT is the voltage at two ends of the divider resistor RT, RT is the resistance of the divider resistor, and NTC is the resistance of the temperature sensor.
Furthermore, when a digital temperature sensor is adopted, the circuit block can change the design, and a temperature signal wire can be connected to a digital IO port of the CPU through an AD port; therefore, in practical applications, in an embodiment, when the temperature sensor is a thermistor temperature sensor, the temperature signal line is connected to the CPU through the AD interface, and when the temperature sensor is a digital temperature sensor, the temperature signal line is connected to the CPU through the digital IO interface.
The inside of a further temperature acquisition interface is connected with AD acquisition through the on-off of a switch, and the outside of the temperature acquisition interface can be directly connected with signals of an isolation sensor to be used as an extended acquisition interface for extended acquisition of information such as pressure, humidity and the like;
as a further improvement of the present application, in an embodiment, the general acquisition circuit further includes: and the power supply conversion circuit is connected with the isolation amplifier of the isolation and operational amplifier processing circuit, VA is obtained by VCC isolation conversion, the isolation of the low-voltage digital circuit and the high-voltage battery loop is realized, and the crosstalk of the high-voltage battery loop to the low-voltage digital circuit is avoided.
In practical application, the power conversion circuit mainly has the functions of obtaining VA through VCC isolation conversion, the control part is isolated through the photoelectric solid state relay, and the signal part is isolated through the isolation amplifier, so that the isolation of the low-voltage digital circuit and the high-voltage battery loop is realized.
Further, in a preferred embodiment, the general acquisition circuit further includes an IIC extension IO circuit, which is connected to the CPU through an IIC interface to implement extension of IO; when a plurality of universal acquisition circuits are adopted, the IIC expansion IO circuit is correspondingly connected to the IIC interface of the CPU in parallel through the SDA and the SCL.
The IIC extended IO circuit is connected with the CPU through the primary side of the photoelectric solid-state relay, the input end of the IIC extended IO circuit is connected with the address lines of different information acquisition circuit blocks, the output end of the IIC extended IO circuit is connected to the primary side of the photoelectric solid-state relay, on-off control of the photoelectric solid-state relay is achieved, and synchronous application of a plurality of universal acquisition circuits is achieved by combining a plurality of paths of address lines.
In practical application, a single universal acquisition circuit block needs 15-way control, when a plurality of universal acquisition circuit blocks are adopted, the IO port of a CPU cannot meet requirements, the IO parallel connection wiring of the IO port is complex, the control time sequence is complex, the IIC expansion IO port can be correspondingly connected to the IIC interface of the CPU in parallel through two lines of SDA and SCL, the output of the IIC expansion IO port is connected to the primary side of the photoelectric solid-state relay, the on-off control of the photoelectric solid-state relay is realized, the synchronous application of 8 universal acquisition circuit blocks is further realized by combining three address lines of A0, A1 and A2, and the acquisition of 64 single voltage and 32-way temperature information at most is realized.
Furthermore, the ADV signal can be connected to an external AD acquisition chip, and corresponding detection information is read by a CPU through a communication port; therefore, in an optional embodiment, the circuit device further includes an external AD collecting chip, one end of which is connected to the ADV signal interface of the information collecting circuit block, and the other end of which is connected to the communication port of the CPU, and the CPU reads the corresponding detection information.
In addition, in one embodiment, the circuit device further comprises an isolation sensor, the temperature acquisition interface is connected with the AD acquisition through the on-off switch, and signals of the isolation sensor connected to the outside are used as an extension acquisition interface and used for extension acquisition of pressure or humidity information of the battery.
By adopting the design principle in the embodiment of the application, the application topology of the universal acquisition circuit block can be flexibly configured based on the requirements of different application occasions such as the number of serial battery nodes, the spatial layout of batteries, the communication mode and the like; in practical application, a centralized and distributed structural design idea can be adopted.
Centralized type:
for a battery pack with compact battery layout, when the number of battery sections is not more than 64 sections, centralized acquisition management of a single CPU can be adopted, as shown in fig. 8, a plurality of general acquisition circuit blocks are selected according to the number of battery sections, the number is not more than 8 at most, the general acquisition circuit blocks are connected in parallel to one CPU through an IIC bus, IIC addresses (as shown in the following table) of each general acquisition circuit block are set through A0-A2 address lines, the address lines are connected with GND corresponding address bits to be 0, and the address lines are connected with VCC corresponding address bits to be 1, so that the CPU can be respectively configured with control logics of each general acquisition circuit block, and the switching-in of different input channels can be realized to respectively finish the acquisition of target object information.
Serial number A0 A1 A2 Corresponding address bit
1 0 0 0 000
2 0 0 1 001
3 0 1 0 010
4 0 1 1 011
5 1 0 0 100
6 1 0 1 101
7 1 1 0 110
8 1 1 1 111
Further, in order to increase the precision of the AD sampling, a precision reference circuit may also be provided for the CPU; the external circuit can be omitted when the CPU is provided with the reference circuit;
further according to the requirements of application occasions, an external communication interface is added, and the specific communication mode CAN be selected to be in the forms of CAN, wifi, network or serial ports and the like according to the requirements of communication distance, communication speed and communication occasions, so that data interaction with an upper computer is realized.
Distributed:
for some occasions with battery compartment division, layered arrangement or requirements on wiring harness routing, distributed application can be adopted, each CPU is correspondingly configured with a general acquisition circuit block, and the CPUs are networked in a communication bus mode to finish information gathering; further, the number of the general acquisition circuit blocks configured by a single CPU is not limited to 1, and as shown in fig. 9, the general acquisition circuit blocks are selected according to the number of battery nodes of a specific battery module, so as to realize modularization of battery assembly and simplify the overall wiring harness layout of the battery pack.
The distributed application host is used for being provided with a communication bus interface communicated with the distributed slave machines, collecting information of the slave machines and being provided with a communication interface communicated with the outside, so that 1-to-1 reporting of the collected information is realized, and the multi-machine reporting of the slave machines outside is not realized.
The distributed structure application has the advantages that the sampling wiring harness is controlled in a local area, and overlong wiring of the sampling wiring harness is avoided, so that the influence of overlong wiring on sampling and electromagnetic compatibility is reduced; further, modularization and standardization of battery assembly can be realized, and management is facilitated.
Based on the structure and the principle of the universal battery information acquisition circuit device designed in the embodiment of the utility model, aiming at the occasions such as lithium batteries and the like with application requirements on the uniformity of the monomers, an active or passive equalization circuit can be flexibly added according to the requirements, and the execution of equalization strategies is carried out on the basis of the acquired information, so as to ensure the uniformity of the monomers in the battery pack, ensure the effective release of the capacity of the battery pack and avoid the short plate effect caused by the difference of the monomers; thereby realizing the maximum effective utilization of the battery pack.
The embodiment of the utility model provides an among the general battery information acquisition circuit arrangement, each module or cell structure can be according to actual information acquisition demand or the independent operation of signal conversion demand or combination operation to realize corresponding technological effect.
It is to be understood that the disclosed embodiments are not limited to the particular structures, process steps, or materials disclosed herein but are to be extended to equivalents thereof as would be understood by those of ordinary skill in the relevant art. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting.
Reference in the specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. Thus, appearances of the phrase "an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment.
Although the present invention has been described with reference to the above embodiments, the description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. The present invention is not limited to the above embodiments, but may be modified in various forms and details without departing from the spirit and scope of the present invention.

Claims (9)

1. A universal battery information acquisition circuit arrangement, said circuit arrangement comprising:
CPU and one or more corresponding group of general acquisition circuit, general acquisition circuit includes: the system comprises an information acquisition circuit block, a single voltage isolation switching circuit, a voltage isolation and operational amplifier processing circuit and a temperature acquisition circuit;
the single voltage isolation switching circuit comprises an external series resistor and a sampling resistor, realizes voltage division sampling of the battery voltage, and is connected with the voltage isolation and operational amplifier processing circuit through a solid relay isolation control assembly;
the isolation and operational amplifier processing circuit is arranged on the information acquisition circuit block and comprises an isolation amplifier and an operational amplifier processing circuit which are connected in sequence, the isolation amplifier is used for carrying out isolation amplification on a switched-in battery voltage division signal, an ADV signal suitable for the voltage grade of the CPU is formed through operational amplifier processing, and the ADV signal is accessed to the CPU through an AD interface;
the temperature acquisition circuit comprises one or more groups of temperature sensors and standard resistors, temperature signals of the acquired battery and voltage division signals of the associated standard resistors are sampled by the temperature sensors, and the temperature signals and the voltage division signals are connected to the CPU in combination with the control time sequence of the IIC expansion IO port.
2. The circuit arrangement of claim 1, wherein the universal acquisition circuit further comprises: and the power supply conversion circuit is connected with the isolation amplifier of the isolation and operational amplifier processing circuit, and VA is obtained by VCC isolation conversion, so that the isolation of the low-voltage digital circuit and the high-voltage battery loop is realized, and the crosstalk of the high-voltage battery loop to the low-voltage digital circuit is avoided.
3. The circuit arrangement of claim 1, wherein the universal acquisition circuit further comprises an IIC extended IO circuit connected to the CPU through an IIC interface to implement IO extension; when a plurality of universal acquisition circuits are adopted, the IIC expansion IO circuit is correspondingly connected to the IIC interface of the CPU in parallel through the SDA and the SCL.
4. The circuit device of claim 3, wherein the IIC extended IO circuit is connected with the CPU through the primary side of the photoelectric solid-state relay, the input end of the IIC extended IO circuit is connected with the address lines of different information acquisition circuit blocks, and the output end of the IIC extended IO circuit is connected to the primary side of the photoelectric solid-state relay, so that the switch control of the photoelectric solid-state relay is realized, and the synchronous application of a plurality of universal acquisition circuits is realized by combining a plurality of address lines.
5. The circuit device according to claim 1, wherein one end of the external series resistor is connected to the positive or negative sampling point of the corresponding battery through a fuse, and the other end of the external series resistor is connected to a voltage acquisition interface pin of the information acquisition circuit block;
the sampling resistor is connected between voltage acquisition resistor interfaces RG1 and RG2 of the information acquisition circuit block.
6. The circuit arrangement as claimed in claim 1, wherein each temperature sensor of the temperature acquisition circuit is connected to the Tn pin of the information acquisition circuit block at one end and to VCC or GND at the other end, and the standard resistor is connected to the TnR pin of the information acquisition circuit block at one end and to GND or VCC at the other end.
7. The circuit device according to claim 1, wherein when the temperature sensor is a thermistor temperature sensor, the temperature signal line is connected to the CPU through an AD interface, and when the temperature sensor is a digital temperature sensor, the temperature signal line is connected to the CPU through a digital IO interface.
8. The circuit device according to claim 1, further comprising an external AD acquisition chip, one end of which is connected to the ADV signal interface of the information acquisition circuit block, and the other end of which is connected to the communication port of the CPU, and the CPU reads the corresponding detection information.
9. The circuit device according to claim 1, further comprising an isolation sensor, wherein the temperature acquisition interface is connected to the AD acquisition channel through a switch, and a signal of the isolation sensor is externally connected to the AD acquisition channel as an extended acquisition interface for extended acquisition of pressure or humidity information of the battery.
CN202222248921.2U 2022-08-25 2022-08-25 Universal battery information acquisition circuit device Active CN218158255U (en)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222248921.2U CN218158255U (en) 2022-08-25 2022-08-25 Universal battery information acquisition circuit device

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Denomination of utility model: A Universal Battery Information Collection Circuit Device

Effective date of registration: 20231030

Granted publication date: 20221227

Pledgee: Bank of China Limited Yantai South Street sub branch

Pledgor: YANTAI DONGFANG YOKELIN ELECTONIC CO.,LTD.

Registration number: Y2023980063416

PE01 Entry into force of the registration of the contract for pledge of patent right