CN218158222U - AiP chip test system - Google Patents

AiP chip test system Download PDF

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CN218158222U
CN218158222U CN202221852612.XU CN202221852612U CN218158222U CN 218158222 U CN218158222 U CN 218158222U CN 202221852612 U CN202221852612 U CN 202221852612U CN 218158222 U CN218158222 U CN 218158222U
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shielding cavity
aip
cavity
shielding
aip chip
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黄继康
周文婷
付玉增
何天琪
王铭辉
王奔
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Calterah Semiconductor Technology Shanghai Co Ltd
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Calterah Semiconductor Technology Shanghai Co Ltd
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Abstract

The utility model discloses an AiP chip test system, include: the heat preservation box that can heat and/or refrigerate, set up the first shielding cavity that is used for shielding electromagnetic wave signal in the heat preservation box, set up the second shielding cavity that is used for shielding electromagnetic wave signal outside the heat preservation box and be used for receiving and/or the testing arrangement who sends electromagnetic wave signal, wherein: the incubator is provided with a first opening, a closed window structure capable of transmitting electromagnetic waves is arranged at the first opening, the first shielding cavity is communicated with the second shielding cavity through the closed window structure, the testing device is arranged at the opening of the second shielding cavity far away from one side of the first shielding cavity, and the AiP chip to be tested is arranged in the first shielding cavity and close to the closed window structure. By adopting the system of the embodiment of the disclosure, the AiP chip test error can be reduced, and the test precision can be improved.

Description

AiP chip test system
Technical Field
The embodiment of the disclosure relates to but not limited to the technical field of chip detection, in particular to an AiP chip test system.
Background
The Package integrated Antenna (AiP) technology integrates an Antenna and other circuits in the same Package through a packaging material and a process to form an AiP chip, and is favored by a large number of chip and Package manufacturers in recent years due to good consideration of Antenna performance, cost and volume.
Before the AiP chip leaves a factory, a performance test in a high temperature environment is required, and generally, the AiP chip is placed in an incubator so that the AiP chip is in the high temperature environment to test the influence of high temperature on the performance of the chip.
However, the inner wall of the incubator is usually made of metal, and the reflection caused by the metal affects the radiation test result of the AiP chip, thereby increasing the test error and reducing the test precision.
SUMMERY OF THE UTILITY MODEL
The embodiment of the disclosure provides an AiP chip detection system, which reduces test errors and improves test precision.
The embodiment of the disclosure provides an AiP chip test system, the system includes a heat preservation box capable of heating and/or refrigerating, a first shielding cavity arranged in the heat preservation box and used for shielding electromagnetic wave signals, a second shielding cavity arranged outside the heat preservation box and used for shielding electromagnetic wave signals, and a test device used for receiving and/or sending electromagnetic wave signals, wherein:
the insulation can has first opening, first opening part sets up one and can penetrate the electromagnetic closed window structure, first shielding cavity passes through with second shielding cavity closed window structure intercommunication, testing arrangement set up in second shielding cavity is kept away from the opening part of first shielding cavity one side, the AiP chip that awaits measuring set up in the first shielding cavity.
In an exemplary embodiment, the first shielding cavity is provided with a second opening, the second opening is fixed at a closed window structure of the incubator, the first shielding cavity and the closed window structure form a closed space, and the AiP chip to be tested is disposed at a side of the closed window structure close to the inside of the first shielding cavity.
In an exemplary embodiment, the side of the AiP chip to be tested, on which the antenna is disposed, faces the closed window structure.
In an exemplary embodiment, the first shielding cavity comprises a first cavity body and a first channel structure located in the first cavity body, the first channel structure has a square, rectangular or circular cross section, and the first channel structure has a square, rectangular, trapezoidal or curved longitudinal section;
the second shielding cavity comprises a second cavity body and a second channel structure located in the second cavity body, the cross section of the second channel structure is square, rectangular or circular, and the longitudinal section of the second channel structure is rectangular or trapezoidal.
In an exemplary embodiment, the closed window structure material has a dielectric constant in the range of 1 to 1.5 Fahrenheit/meter and is resistant to temperatures in the range of-40 to 150.
In an exemplary embodiment, the closed window structure comprises a structure of PMI material.
In an exemplary embodiment, the first shielding cavity and/or the second shielding cavity are made of wave-absorbing materials; or the inner wall of the first shielding cavity and/or the second shielding cavity comprises a wave-absorbing material layer;
the wave-absorbing frequency range of the first shielding cavity and/or the second shielding cavity is larger than the frequency range of signals transmitted and/or received by the AiP chip to be tested.
In an exemplary embodiment, the frequency band absorbed by the first shielding cavity and/or the second shielding cavity is in a range of 1GHz to 300GHz.
In an exemplary embodiment, the test device includes a first antenna module and a first signal analysis device connected to the first antenna module;
electromagnetic wave signals sent by the AiP chip to be tested penetrate through the closed window structure and the second shielding cavity, are received by the first antenna module and are sent to the first signal analysis device.
In an exemplary embodiment, the test device includes a second antenna module, a signal generation device connected to the second antenna module, and a second signal analysis device configured to be connected to the AiP chip to be tested, an electromagnetic wave signal generated by the signal generation device is sent through the second antenna module, the electromagnetic wave signal passes through the second shielding cavity and the closed window structure and is transmitted to the AiP chip to be tested, and the second signal analysis device obtains the electromagnetic wave signal received by the AiP chip to be tested.
Compared with the prior art, the AiP chip test system provided by the embodiment of the disclosure can enable electromagnetic wave signals of the AiP chip to be tested to be transmitted to the test device through the closed window structure arranged at the first opening of the insulation box and the second shielding cavity for testing through arranging the first shielding cavity in the insulation box and setting the AiP chip to be tested in the first shielding cavity, thereby avoiding the influence of metal reflection in the insulation box and the external environment on the radiation test result of the AiP chip, reducing the test error and improving the test precision.
Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the disclosure. Other advantages of the disclosure may be realized and attained by the instrumentalities and combinations particularly pointed out in the specification and the drawings.
Drawings
The accompanying drawings are included to provide an understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the example serve to explain the principles of the disclosure and not to limit the disclosure.
FIG. 1 is a schematic diagram of an AiP chip testing system according to one embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a position relationship between an AiP chip to be tested and a closed window structure according to an embodiment of the present disclosure;
FIG. 3 is a schematic view of a first shielded cavity according to an embodiment of the disclosure;
FIG. 4a is a longitudinal cross-sectional view of a first shielded cavity according to an embodiment of the present disclosure;
FIG. 4b is another longitudinal cross-sectional cut-away view of a first shielded cavity according to an embodiment of the disclosure;
fig. 5 is a schematic diagram of a positional relationship between a first shielding cavity and a closed window structure according to an embodiment of the disclosure;
fig. 6a is a schematic diagram of a first shielded cavity, a closed window structure, and a second shielded cavity in accordance with an embodiment of the present disclosure;
fig. 6b is a schematic diagram illustrating a positional relationship among the first shielding cavity, the closed window structure, and the second shielding cavity in the embodiment of the present disclosure;
FIG. 7 is a longitudinal cross-sectional cut-away view of a second shielded cavity according to an embodiment of the present disclosure;
FIG. 8 is a schematic structural diagram of a testing apparatus according to an embodiment of the disclosure;
fig. 9 is a schematic structural diagram of another testing apparatus according to an embodiment of the disclosure.
Detailed Description
The present disclosure describes embodiments, but the description is illustrative rather than limiting and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described in the present disclosure. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or instead of any other feature or element in any other embodiment, unless expressly limited otherwise.
The present disclosure includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements of the present disclosure that have been disclosed may also be combined with any conventional features or elements to form unique aspects as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other aspects to form yet another unique aspect as defined by the claims. Thus, it should be understood that any features shown and/or discussed in this disclosure may be implemented alone or in any suitable combination. Accordingly, the embodiments are not to be restricted except in light of the attached claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.
Further, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other orders of steps are possible as will be understood by those of ordinary skill in the art. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Furthermore, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present disclosure.
The traditional radar sensor chip is insensitive to external environment interference, so that the traditional radar sensor chip is often used in the fields of automobiles, industries and the like with large environmental changes and is used for detecting physical quantities. Therefore, the radar sensor chip needs to be adapted to the environment after leaving the factory for corresponding testing. In the existing radar sensor chip, because the antenna is not integrated, when the radiation performance is tested, on one hand, the radiation performance is tested in a mode of electrically connecting and testing pins of a chip transceiver, and on the other hand, the radiation performance is tested in a radiation heating mode in a high-temperature environment. The new radar sensor chip is implemented using an AIP chip packaged with an antenna, and therefore, a new test system is required to complete the vehicle-scale radiation performance test.
To this end, an embodiment of the present disclosure provides an AiP chip testing system, as shown in fig. 1, the AiP chip testing system including:
the electromagnetic wave signal testing device comprises an insulation box 11 capable of heating and/or refrigerating, a first shielding cavity 12 arranged in the insulation box 11 and used for shielding electromagnetic wave signals, a second shielding cavity 13 arranged outside the insulation box 11 and used for shielding electromagnetic wave signals, and a testing device 14 used for receiving and/or sending electromagnetic wave signals.
The incubator 11 is provided with a first opening, the first opening is provided with a closed window structure 15 capable of transmitting electromagnetic waves, the first shielding cavity 12 is communicated with the second shielding cavity 13 through the closed window structure, the testing device 14 is arranged at the opening of one side of the first shielding cavity 12, which is far away from the second shielding cavity 13, and the AiP chip to be tested is arranged in the first shielding cavity 12.
The AiP chip test system that this disclosed embodiment provided, through set up first shielding cavity in the incubator to with the AiP chip that awaits measuring set up in the first shielding cavity, make the electromagnetic wave signal of the AiP chip that awaits measuring can see through the closed window structure that sets up at the first opening part of incubator and transmit to testing arrangement through second shielding cavity and test, avoided metallic reflection and external environment in the incubator to the influence of AiP chip radiation test result, thereby reduced test error, improved test accuracy, can realize the test under the high low temperature environment simultaneously.
The AiP technology is one of the most challenging and innovative technical fields in the millimeter wave field in the last 10 years internationally, and integrates an antenna and other circuits in the same package through a packaging material and a process to form an AiP chip, while an antenna of a conventional on-board chip is located outside the chip, and the AiP technology is highly favored by a great number of chip and packaging manufacturers in recent years due to good consideration of antenna performance, cost and volume. The AiP chip testing system provided by this embodiment can be used to test the radiation performance of the AiP chip, and the AiP chip can be tested regardless of whether the antenna of the chip is packaged outside or inside the chip, as long as the chip integrates the antenna.
In an exemplary embodiment, the AiP chip to be tested can be arranged on a prefabricated PCB for testing, the prefabricated PCB can be formed by arranging a clamping groove adaptive to the size of the AiP chip to be tested on the surface of the PCB, and arranging a lead and a pin for connecting an antenna integrated on the AiP chip on the PCB.
In an exemplary embodiment, the incubator can be used for heating and/or cooling the AiP chip to be tested and maintaining the test environment temperature of the AiP chip to be tested, and the incubation temperature of the incubator can range from-40 ° to 85 °. The heatable and/or refrigerable incubator can be used for testing the AiP chip to be tested in high-temperature and/or low-temperature environments. The glass on the existing heat preservation box can be replaced by a closed window structure capable of transmitting electromagnetic waves, the material of the closed window structure can be penetrated by the electromagnetic waves, the loss does not influence the requirement of normal performance test, meanwhile, the reflection performance is lower, in order to ensure the transmission quality of the electromagnetic waves, the material with the dielectric constant within the range of 1-1.5 method/meter can be selected as the material of the closed window structure, and in order to adapt to the performance test under the high-temperature and low-temperature environment, the temperature tolerance range of the material is preferably-40-150 degrees. For example, PMI (polymethacrylimide) foams can be used.
When the AiP chip to be tested is fixed on the closed window structure, in order to ensure the antenna signal transmission of the AiP chip to be tested, the vertical distance a and the horizontal distance b between the AiP chip to be tested and the closed window structure are both not less than 10cm, as shown in figure 2.
Fig. 3 is a schematic structural diagram of a first shielding cavity, wherein the first shielding cavity 12 is provided with a second opening 121, and the second opening 121 is used for being fixed with the closed window structure 15 of the incubator 11. Fig. 3 uses first shielding cavity structure to illustrate for the cuboid as an example, and it is visible, and first shielding cavity includes first cavity main part and is located first access structure in the cavity main part, but the shape of first cavity main part can be irrelevant with first access structure's shape, for example, first shielding cavity main part shape can be for any geometry shapes such as square or cuboid or cylinder or hemisphere, as long as can be formed with access structure in the first cavity main part, and can form the enclosure space with sealing the window body structure can. For example, the first channel structure may be square or rectangular parallelepiped or cylindrical or hemispherical in shape, i.e. the cross-section of the first channel structure may be square or rectangular or circular, and the longitudinal section of the first channel structure may be square or rectangular or trapezoidal (as shown in fig. 4 a) or curved (as shown in fig. 4 b).
In order to shield electromagnetic wave signals, the first shielding cavity 12 is made of a wave-absorbing material, or the first shielding cavity 12 includes a wave-absorbing material layer inside, that is, the inner wall of the channel structure has a wave-absorbing material layer (the wave-absorbing material layer may be made into a wave-absorbing structure such as a triangular structure). The wave-absorbing frequency range of the first shielding cavity and/or the second shielding cavity is larger than the frequency range of the electromagnetic wave signals transmitted and/or received by the AiP chip to be tested, for example, the range of the electromagnetic wave signals transmitted and/or received by the AiP chip to be tested is 70Ghz, and the wave-absorbing frequency spectrum range of the wave-absorbing material of the first shielding cavity and/or the second shielding cavity is 1 GHz-300 GHz. The wave-absorbing material may include, for example: ferrite wave-absorbing materials, dielectric ceramic wave-absorbing materials, polycrystalline iron fiber wave-absorbing materials, conductive polymer wave-absorbing materials or nano wave-absorbing materials and the like.
Fig. 5 is a schematic diagram of a first shielding cavity structure 12 and a closed window structure 15 forming a closed space, and the first shielding cavity 12 and the closed window structure 15 form a closed space by fixing a second opening of the first shielding cavity to the closed window structure 15 of the incubator 11 (for clarity, only the closed window structure is shown in the figure, and the incubator is not shown), so that an AiP chip to be tested can be disposed on one side of the closed window structure close to the inside of the first shielding cavity 12. The size of the closed window structure depends on the size of the first opening of the incubator, and the size of the second opening of the first shielding cavity can be set to be smaller than that of the closed window structure so as to facilitate sealing. In order to facilitate fixing and operation, the to-be-tested AiP chip is fixed on one side of the closed window structure 15 close to the inside of the first shielding cavity 12, and after the second opening 121 of the first shielding cavity 12 is fixed with the closed window structure 15, the to-be-tested AiP chip is located in a closed space formed by the first shielding cavity 12 and the closed window structure 15, so that the influence of metal reflection in the incubator on the radiation test result of the AiP chip is reduced to the minimum. The second opening 121 of the first shielding cavity 12 and the closed window structure 15 may be fixed by moving the position of the first shielding cavity 12 to make the side of the first shielding cavity 12 having the second opening 121 closely contact the closed window structure 15.
Fig. 6a is a schematic view of a first shielding cavity 12, a closed window structure 15 and a second shielding cavity 13;
fig. 6b is a schematic view of the first shielding cavity 12 and the second shielding cavity 13 communicating through the closed window structure 15. As shown in the figure, similar to the first shielding cavity 12, the second shielding cavity 13 includes a second cavity main body and a second channel structure located in the cavity main body, the shape of the second cavity main body may not be related to the shape of the second channel structure, the second cavity main body of the second shielding cavity 13 may be any geometric shape such as a cube, a cuboid, a cylinder, or a hemisphere, the cross section of the second channel structure in the second cavity main body may be a square, a rectangle, or a circle, and the longitudinal section of the second channel structure may be a rectangle or a trapezoid (as shown in fig. 7). Different from the first shielding cavity 12, the second channel structure of the second shielding cavity 13 includes two openings, wherein the opening close to the first shielding cavity may be fixed to the closed window structure 15, and the other opening far from the first shielding cavity is used for the testing apparatus to receive the electromagnetic wave signal sent by the AiP chip to be tested, or send the electromagnetic wave signal to the AiP chip to be tested. As known to those skilled in the art, the length of the second channel structure of the second shielding cavity 13 can be determined according to the electromagnetic wave frequency of the AiP chip to be tested. Therefore, after the first shielding cavity and the second shielding cavity are arranged, electromagnetic wave signals received and/or sent by the AiP chip to be tested are transmitted through the first shielding cavity and the second shielding cavity, the first shielding cavity can shield interference of metal in the heat insulation box on the electromagnetic wave signals, and the second shielding cavity can shield interference of external environment on the electromagnetic wave signals, so that test errors can be reduced, and test precision is improved.
In order to shield electromagnetic wave signals, the second shielding cavity 13 is made of a wave-absorbing material, or the first shielding cavity 13 includes a wave-absorbing material layer inside, that is, the inner wall of the channel structure has a wave-absorbing material layer (the wave-absorbing material layer may be made into a wave-absorbing structure such as a triangular structure). The wave-absorbing material has a wave-absorbing frequency range larger than that of the electromagnetic wave signals transmitted and/or received by the AiP chip to be tested. The wave-absorbing material may include, for example: ferrite wave-absorbing materials, dielectric ceramic wave-absorbing materials, polycrystalline iron fiber wave-absorbing materials, conductive polymer wave-absorbing materials or nano wave-absorbing materials and the like.
In the local structure of the test system shown in fig. 6a and 6b, the side of the AiP chip to be tested, which is provided with the antenna, faces the closed window structure, so that the test device located at the opening of the second shielding cavity 13, which is far away from the first shielding cavity 12, receives the electromagnetic wave signal sent by the antenna on the AiP chip to be tested, and/or sends the electromagnetic wave signal to the antenna on the AiP chip to be tested.
Fig. 8 is a schematic diagram of a test apparatus for testing the emission performance of an AiP chip, as shown in fig. 8, the test apparatus 14 includes a first antenna module 141 and a first signal analysis apparatus 142 connected to the first antenna module 141; electromagnetic wave signals sent by the AiP chip to be tested pass through the closed window structure 15 and the second shielding cavity 13, are received by the first antenna module 141, and are sent to the first signal analysis device 142 by the first antenna module 141. The first antenna module 141 may be, for example, a horn antenna, and the first antenna module 141 may be disposed inside an opening of the second shielding cavity 13 on a side away from the first shielding cavity 12. The first signal analyzing device 142 may be a spectrometer or a network analyzer capable of measuring antenna radiation power, and the first signal analyzing device 142 may measure radiation power of a signal received by the first antenna module 141, and may obtain the emission radiation performance of the AiP chip according to the radiation power value. For example, the first signal analysis device 142 may obtain the antenna radiation power of the AiP chip to be tested according to the received electromagnetic wave signal, and may calculate the noise coefficient according to the antenna radiation power.
Fig. 9 is a schematic diagram of a testing apparatus for testing the receiving performance of an AiP chip, and as shown in fig. 9, the testing apparatus 14 includes a second antenna module 143, a signal generating apparatus 144 connected to the second antenna module 143, and a second signal analyzing apparatus 145 configured to be connected to the AiP chip to be tested. The electromagnetic wave signal generated by the signal generating device 144 is transmitted through the second antenna module 143, the electromagnetic wave signal passes through the second shielding cavity 13 and the closed window structure 15 and is received by the AiP chip to be detected, and the second signal analyzing device 145 obtains the electromagnetic wave signal received by the AiP chip to be detected. The second antenna module 143 may be, for example, a horn antenna, and the second antenna module 143 may be disposed inside an opening on a side of the second shielding cavity 13 far from the first shielding cavity 12. In a test system that can test both the transmission and reception performance of an AiP chip, the second antenna module 143 can be used to multiplex the first antenna module 141, i.e., only one antenna module. The signal generating device 144 can be implemented by using an existing signal generating source, as long as it can transmit an electromagnetic wave signal that can be received by the AiP chip to be tested. The second signal analyzing device 145 may be a spectrometer or a network analyzer capable of measuring the radiation power of the antenna, and the second signal analyzing device 145 may measure the radiation power of the signal received by the AiP chip to be tested, and may obtain the antenna receiving performance of the AiP chip according to the radiation power value.
In the description of the present invention, it should be noted that the terms "upper", "lower", "one side", "the other side", "one end", "the other end", "side", "opposite", "four corners", "periphery", "mouth" word structure "and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for convenience of description and simplification of the description, but do not indicate or imply that the structure referred to has a specific orientation, is constructed and operated in a specific orientation, and thus, is not to be construed as limiting the present invention.
In the description of the embodiments of the present invention, unless otherwise explicitly specified or limited, the terms "connected," "directly connected," "indirectly connected," "fixedly connected," "mounted," and "assembled" are to be construed broadly and may, for example, be fixedly connected, detachably connected, or integrally connected; the terms "mounted," "connected," and "fixedly connected" may be directly connected or indirectly connected through intervening media, or may be connected through two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Although the embodiments of the present invention have been described above, the description is only for the convenience of understanding the present invention, and the present invention is not limited thereto. Any modifications and variations in form and detail of the present invention may be made by those skilled in the art without departing from the spirit and scope of the present invention, but it is still intended to cover in the appended claims all such modifications and variations as fall within the true spirit and scope of the invention.

Claims (10)

1. The AiP chip testing system for the packaged integrated antenna is characterized by comprising an incubator, a first shielding cavity, a second shielding cavity and a testing device, wherein the incubator can be heated and/or refrigerated, the first shielding cavity is arranged in the incubator and used for shielding electromagnetic wave signals, the second shielding cavity is arranged outside the incubator and used for shielding electromagnetic wave signals, and the testing device is used for receiving and/or sending electromagnetic wave signals, wherein:
the insulation can has first opening, first opening part sets up one and can penetrate the electromagnetic closed window structure, first shielding cavity passes through with second shielding cavity closed window structure intercommunication, testing arrangement set up in second shielding cavity is kept away from the opening part of first shielding cavity one side, the AiP chip that awaits measuring set up in the first shielding cavity.
2. The AiP chip test system of claim 1,
the first shielding cavity is provided with a second opening, the second opening is fixed at the position of a closed window structure of the incubator, the first shielding cavity and the closed window structure form a closed space, and the AiP chip to be tested is arranged on one side, close to the first shielding cavity, of the closed window structure.
3. An AiP chip test system according to claim 1 or 2,
the side, provided with the antenna, of the AiP chip to be tested faces the closed window structure.
4. The AiP chip test system of claim 1,
the first shielding cavity comprises a first cavity body and a first channel structure positioned in the first cavity body, the cross section of the first channel structure is square, rectangular or circular, and the longitudinal section of the first channel structure is square, rectangular, trapezoidal or curved;
the second shielding cavity comprises a second cavity body and a second channel structure located in the second cavity body, the cross section of the second channel structure is square, rectangular or circular, and the longitudinal section of the second channel structure is rectangular or trapezoidal.
5. The AiP chip test system of claim 1,
the dielectric constant of the material of the closed window structure is in the range of 1-1.5 Farad/m, and the temperature tolerance range is-40-150 degrees.
6. The AiP chip test system of claim 5,
the closed window structure comprises a structure of PMI material.
7. The AiP chip test system of claim 1,
the first shielding cavity and/or the second shielding cavity are/is made of wave-absorbing materials; or,
the inner wall of the first shielding cavity and/or the second shielding cavity comprises a wave-absorbing material layer;
the wave-absorbing frequency range of the first shielding cavity and/or the second shielding cavity is larger than the frequency range of signals transmitted and/or received by the AiP chip to be tested.
8. The AiP chip test system of claim 1 or 7,
the frequency range absorbed by the first shielding cavity and/or the second shielding cavity is 1 GHz-300 GHz.
9. The AiP chip test system of claim 1,
the testing device comprises a first antenna module and a first signal analysis device connected with the first antenna module;
electromagnetic wave signals sent by the AiP chip to be tested penetrate through the closed window structure and the second shielding cavity, are received by the first antenna module and are sent to the first signal analysis device.
10. The AiP chip test system of claim 1,
the testing device comprises a second antenna module, a signal generating device connected with the second antenna module and a second signal analyzing device configured to be connected with the AiP chip to be tested, electromagnetic wave signals generated by the signal generating device are sent through the second antenna module, the electromagnetic wave signals penetrate through the second shielding cavity and the closed window structure and are transmitted to the AiP chip to be tested, and the second signal analyzing device obtains the electromagnetic wave signals received by the AiP chip to be tested.
CN202221852612.XU 2022-07-18 2022-07-18 AiP chip test system Active CN218158222U (en)

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