CN218124314U - Anti-backflow circuit, serial communication line, device, electronic equipment and detection device - Google Patents
Anti-backflow circuit, serial communication line, device, electronic equipment and detection device Download PDFInfo
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- CN218124314U CN218124314U CN202222078017.1U CN202222078017U CN218124314U CN 218124314 U CN218124314 U CN 218124314U CN 202222078017 U CN202222078017 U CN 202222078017U CN 218124314 U CN218124314 U CN 218124314U
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Abstract
The utility model discloses a serial communication interface prevents flowing backward circuit, serial communication device, electronic equipment and electronic equipment detection device, prevent flowing backward the circuit and include first branch road and second branch road: the first branch and the second branch are connected between a signal sending end and a signal receiving end of the serial communication interface; the first branch comprises a first MOS tube; the second branch comprises a second MOS tube; the first MOS tube and the second MOS tube are both P-type MOS tubes. Therefore, the embodiment of the utility model provides a set up two way branch roads including P type MOS pipe through the signal sending end and the signal receiving end at serial communication interface and prevent that voltage from flowing backward, effectively avoided utilizing the schottky diode to carry out the voltage and prevented that the serial communication interface's that leads to that flowing backward signal distortion appears to lead to serial communication interface error rate to increase the problem that the data acquisition made mistakes.
Description
Technical Field
The utility model relates to an electronic circuit technical field especially relates to a serial communication interface prevents flowing backward circuit and serial communication line.
Background
The serial communication interface comprises a signal transmitting end UART _ TX and a signal receiving end UART _ RX, wherein the signal transmitting end UART _ TX and the signal receiving end UART _ RX are respectively connected with corresponding devices. The reverse flow of the voltage signal is easily generated between the signal transmitting terminal UART _ TX and the signal receiving terminal UART _ RX, and if the reverse flow is generated, the power supply time sequence of the electronic equipment connected with the signal transmitting terminal UART _ TX and the signal receiving terminal UART _ RX is abnormal, and the abnormal time sequence causes the abnormal power-on start of the whole equipment, so that the equipment cannot work normally.
To prevent voltage back-flow in the serial communication interface, referring to fig. 1, a reverse schottky diode D is usually connected in series between UART _ TX and UART _ RX of the serial communication interface. However, a large parasitic capacitance exists between the positive electrode and the negative electrode of the schottky diode D, the parasitic capacitance may cause distortion of signals of the serial interface, and may not have much influence during low-speed communication, but during high-speed communication with a large data volume, the signal distortion problem may increase the bit error rate of serial interface communication, and the problem of error of acquired data occurs.
SUMMERY OF THE UTILITY MODEL
The utility model provides a serial communication interface prevents flowing backward circuit and serial communication circuit to solve the above technical problem who exists among the prior art at least.
According to the utility model discloses an aspect provides a serial communication interface prevents flowing backward circuit, prevent flowing backward the circuit including first branch road and second branch road: the first branch and the second branch are connected between a signal sending end and a signal receiving end of the serial communication interface; the first branch comprises a first MOS tube; the second branch comprises a second MOS tube; the first MOS tube and the second MOS tube are both P-type MOS tubes.
In an implementation manner, the first branch further includes a third MOS transistor and a first voltage dividing resistor, where the third MOS transistor is an N-type MOS transistor; correspondingly, the source electrode of the first MOS transistor is connected with the signal sending end of the serial communication interface, the gate electrode of the first MOS transistor is connected with the drain electrode of the third MOS transistor, and the drain electrode of the first MOS transistor is connected with the gate electrode of the second MOS transistor; one end of the first voltage-dividing resistor is connected with a signal sending end of the serial communication interface, the other end of the first voltage-dividing resistor is connected with a drain electrode of the third MOS tube, and a source electrode of the third MOS tube is grounded.
In an embodiment, the backflow prevention circuit further includes a slow start branch, and the slow start branch includes: one end of the second voltage-dividing resistor is connected with a power supply end, and the other end of the second voltage-dividing resistor is connected with the grid electrode of the third MOS tube, the third voltage-dividing resistor and the first capacitor; one end of the third voltage-dividing resistor is connected with the grid of the third MOS transistor and the second voltage-dividing resistor, and the other end of the third voltage-dividing resistor is grounded; one polar plate of the first capacitor is connected with the grid electrode of the third MOS tube, and the other polar plate of the first capacitor is grounded.
In an embodiment, the second branch further includes a fourth voltage-dividing resistor and a fifth voltage-dividing resistor; correspondingly, the source electrode of the second MOS transistor is connected to the signal receiving end of the serial communication interface and the fourth voltage dividing resistor, the gate electrode of the second MOS transistor is connected to the drain electrode of the first MOS transistor, and the drain electrode of the second MOS transistor is grounded; one end of the fourth voltage dividing resistor is connected with a power supply end, and the other end of the fourth voltage dividing resistor is connected with the source electrode of the second MOS tube and the signal receiving end; one end of the fifth voltage-dividing resistor is connected with the drain electrode of the first MOS tube, and the other end of the fifth voltage-dividing resistor is grounded.
In an implementation manner, a source of the first MOS transistor is connected to a power supply terminal, a gate of the first MOS transistor is connected to a signal sending terminal of the serial communication interface, and a drain of the first MOS transistor is connected to a gate of the second MOS transistor.
In an implementation manner, the second branch further includes a sixth voltage-dividing resistor and a seventh voltage-dividing resistor; correspondingly, the source electrode of the second MOS transistor is connected with a power supply end, the gate electrode of the second MOS transistor is connected with the drain electrode of the first MOS transistor, and the drain electrode of the second MOS transistor is connected with the signal receiving end of the serial communication interface and the sixth voltage dividing resistor; one end of the sixth divider resistor is connected with the drain electrode of the second MOS tube and the signal receiving end of the serial communication interface, and the other end of the sixth divider resistor is grounded; and one end of the seventh divider resistor is connected with the drain electrode of the first MOS tube, and the other end of the seventh divider resistor is grounded.
According to the utility model discloses a second aspect provides a serial communication line, serial communication line includes above-mentioned anti-flowing backward circuit.
According to a third aspect of the present invention, there is provided a serial communication apparatus including the above-described serial communication line.
According to the utility model discloses a fourth aspect provides an electronic equipment again, electronic equipment includes above-mentioned serial communication device.
According to the utility model discloses a fifth aspect provides an electronic equipment detection device again, electronic equipment detection device includes above-mentioned serial communication device.
The utility model discloses serial communication interface prevents flowing backward circuit and serial communication line, set up two way branch roads including P type MOS pipe through signal sending end and the signal receiving terminal at serial communication interface and prevent that voltage from flowing backward, effectively avoided utilizing schottky diode to carry out the voltage and prevented flowing backward the signal of the serial communication interface that leads to and appear distorting to lead to serial communication interface error rate increase to appear gathering data problem of makeing mistakes.
Drawings
FIG. 1 shows a circuit schematic of a prior art anti-back flow circuit of a serial communication interface;
fig. 2 shows a schematic structural diagram of a backflow prevention circuit of a serial communication interface according to an embodiment of the present invention;
fig. 3 shows a first circuit schematic diagram of a backflow prevention circuit of a serial communication interface according to an embodiment of the present invention;
fig. 4 shows a second circuit schematic diagram of the backflow prevention circuit of the serial communication interface according to the embodiment of the present invention.
Detailed Description
To make the objects, features and advantages of the present invention more obvious and understandable, the embodiments of the present invention are described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts all belong to the protection scope of the present invention.
Fig. 2 shows a schematic structural diagram of a backflow prevention circuit of a serial communication interface according to an embodiment of the present invention.
Referring to fig. 2, an embodiment of the present invention provides a serial communication interface anti-backflow circuit, which includes a first branch and a second branch. The first branch and the second branch are connected between a signal transmitting terminal UART _ TX and a signal receiving terminal UART _ RX of the serial communication interface. The first branch circuit comprises a first MOS (metal oxide semiconductor) tube, and the second branch circuit comprises a second MOS tube. The first MOS tube and the second MOS tube are both P-type MOS tubes.
Specifically, electronic equipment is connected respectively to serial communication interface's signal sending end and signal receiving terminal, for prevent that voltage from flowing backward and lead to electronic equipment's harm or go up the electricity unusual, the utility model discloses this embodiment disposes first MOS pipe and second MOS pipe between serial communication interface, can effectively prevent the condition that voltage signal flows backward to appear between serial communication interface's signal sending end and the signal receiving terminal through the combined action of first MOS pipe and second MOS pipe.
In an implementation manner, a signal sending end of the serial communication interface is connected with a camera, and a signal receiving end of the serial communication interface is connected with a computer.
Specifically, when the camera connected to the signal transmitting terminal UART _ TX is not powered on, the signal transmitting terminal UART _ TX of the serial communication interface is at a low level, and when the computer connected to the signal receiving terminal UART _ RX is always powered on, the signal receiving terminal UART _ RX is at a high level, at this time, the high level of the signal receiving terminal UART _ RX may flow back into the camera through the serial communication interface, so that some modules inside the CPU of the camera also have a continuous power supply when the camera is not powered on. When the CPU is started, the requirement on the power supply time sequence of the power supply is very high, once the time sequence is disordered, the power-on starting of the whole camera is abnormal, and the whole camera cannot work normally. In order to overcome this problem, the embodiment of the utility model provides an introduce first MOS pipe and second MOS pipe between the signal sending end at serial communication interface and signal receiving end to the cooperation that utilizes first MOS pipe and second MOS pipe has prevented that serial communication interface from taking place voltage signal and has prevented to flow backward that is not influenced on the inside module of CPU of effectively having guaranteed the camera.
Fig. 3 shows a first circuit schematic diagram of a backflow prevention circuit of a serial communication interface according to an embodiment of the present invention.
Referring to fig. 3, in an implementation, the first branch further includes a third MOS transistor Q3 and a first voltage dividing resistor R1. The third MOS transistor Q3 is an N-type MOS transistor, a source S of the first MOS transistor is connected to a signal transmitting terminal UART _ TX of the serial communication interface, a gate G is connected to a drain D of the third MOS transistor Q3, and the drain D is connected to a gate G of the second MOS transistor Q2. One end of the first voltage-dividing resistor R1 is connected to a signal sending end UART _ TX of the serial communication interface, the other end is connected to a drain D of the third MOS transistor Q3, and a source S of the third MOS transistor Q3 is grounded.
In an implementation manner, the backflow prevention circuit further comprises a slow starting branch. The slow starting branch comprises a second voltage-dividing resistor R2, a third voltage-dividing resistor R3 and a first capacitor C1. One end of the second voltage-dividing resistor R2 is connected to the power supply terminal VCC, and the other end is connected to the gate G of the third MOS transistor Q3, the third voltage-dividing resistor R3, and the first capacitor C1. One end of the third voltage dividing resistor R3 is connected to the gate G of the third MOS transistor Q3 and the second voltage dividing resistor R2, and the other end is grounded. One of the plates of the first capacitor C1 is connected to the gate G of the third MOS transistor Q3, and the other plate is grounded.
In an embodiment, the second branch further includes a fourth voltage-dividing resistor R4 and a fifth voltage-dividing resistor R5. The source S of the second MOS transistor Q2 is connected to the signal receiving terminal UART _ RX of the serial communication interface and the fourth voltage dividing resistor R4, the gate G is connected to the drain D of the first MOS transistor Q1, and the drain D is grounded. One end of the fourth voltage-dividing resistor R4 is connected to the power supply terminal VCC, and the other end is connected to the source S of the second MOS transistor Q2 and the signal receiving terminal UART _ RX of the serial communication interface. One end of the fifth voltage-dividing resistor R5 is connected to the drain D of the first MOS transistor Q1, and the other end is grounded.
Specifically, the power supply terminal VCC represents a system supply voltage of an electronic device, which may be a video camera or the like, connected to the signal transmitting terminal UART _ TX of the serial communication interface.
When the power supply terminal VCC is at a low level and the signal transmitting terminal UART _ TX of the serial communication interface is at a high level, the gate G voltage of the third MOS transistor Q3 is 0, and the drain-source electrode S is not connected, so the gate G of the first MOS transistor Q1 is not grounded, and under the action of the resistor R2, the source S and gate G voltages Vgs of the first MOS transistor Q1 are 0, the first MOS transistor Q1 is turned off, and the drain D has no voltage output. Under the action of the fifth voltage-dividing resistor R5, the voltage of the gate G of the second MOS transistor Q2 is 0, the second MOS transistor Q2 is turned off, and the voltage of the signal receiving terminal UART _ RX of the serial communication interface, that is, the voltage of the power supply terminal VCC, is equal to 0, so that it is ensured that the voltage of the signal transmitting terminal UART _ TX of the serial communication interface does not flow back to the signal receiving terminal UART _ RX of the serial communication interface.
When the power supply end VCC is high level and the signal sending end UART _ TX of the serial communication interface is high level, the gate G of the third MOS transistor Q3 is under the voltage action of the power supply end VCC, vgs is greater than 0, the third MOS transistor Q3 is turned on, the gate G of the first MOS transistor Q1 is directly grounded, the voltage is 0, vgs of the first MOS transistor Q1 is less than 0, and at this time, the first MOS transistor Q1 is turned on. The voltage of the gate G of the second MOS transistor Q2 is the voltage of the signal sending terminal UART _ TX of the serial communication interface, and meanwhile, since the source S of the second MOS transistor Q2 has the voltage VCC, vgs =0, the second MOS transistor Q2 is turned off, and the signal receiving terminal UART _ RX of the serial communication interface maintains a high voltage under the action of the fourth voltage-dividing resistor R4.
When the power supply terminal VCC is at a high level and the signal transmitting terminal UART _ TX of the serial communication interface is at a low level, the gate G of the third MOS transistor Q3 is under the voltage action of the power supply terminal VCC, vgs is >0, the third MOS transistor Q3 is turned on, the gate G of the first MOS transistor Q1 is directly grounded, and the voltage is 0, but since the source S of the first MOS transistor Q1 is also under the voltage action of the signal transmitting terminal UART _ TX of the serial communication interface at this time, vgs =0 of the first MOS transistor Q1 is also turned off, and the first MOS transistor Q1 is turned off. The voltage of the gate G of the second MOS transistor Q2 is 0 under the action of the fifth voltage-dividing resistor R5, and meanwhile, since the voltage VCC exists at the source S of the second MOS transistor Q2, vgs is less than 0, the second MOS transistor Q2 is turned on, the signal receiving terminal UART _ RX of the serial communication interface is connected to GND, and the voltage is 0, which is consistent with the signal sending terminal UART _ TX of the serial communication interface.
Therefore, the N-type third MOS tube Q3 is used for controlling the conduction and the disconnection of the P-type first MOS tube Q1, and the P-type first MOS tube Q1 is used for controlling the conduction and the disconnection of the P-type second MOS tube Q2, so that the condition that the voltage signal flows backwards in the serial communication interface can be effectively prevented. And under the action of the slow branch circuit comprising the second voltage-dividing resistor R2, the third voltage-dividing resistor R3 and the first capacitor C1, the turn-on time of the grid G of the third MOS transistor Q3 can be effectively slowed down, the third MOS transistor Q3 is turned on after the power supply end VCC is completely electrified, and the problem of backward flow of voltage signals in the electrifying process of the electronic equipment is effectively avoided.
Fig. 4 shows a second circuit schematic diagram of the anti-backflow circuit of the serial communication interface according to an embodiment of the present invention.
Referring to fig. 4, in an embodiment, the source S of the first MOS transistor Q1 is connected to a power supply terminal VCC, the gate G is connected to a signal transmitting terminal UART _ TX of a serial communication interface of a signal transmitting terminal of a serial communication interface, and the drain is connected to the gate G of the second MOS transistor Q2.
In an implementation manner, the second branch further includes a sixth voltage-dividing resistor R6 and a seventh voltage-dividing resistor R7. The source S of the second MOS transistor Q2 is connected to the power supply terminal VCC, the gate G is connected to the drain D of the first MOS transistor Q1, and the drain D is connected to the signal receiving terminal UART _ RX of the serial communication interface and the sixth voltage-dividing resistor R6. One end of the sixth voltage-dividing resistor R6 is connected to the drain D of the second MOS transistor Q2 and the signal receiving end UART _ RX of the serial communication interface, and the other end is grounded. One end of the seventh voltage-dividing resistor R7 is connected to the drain D of the first MOS transistor Q1, and the other end is grounded.
Specifically, when the power supply terminal VCC is at a low level and the signal transmitting terminal UART _ TX of the serial communication interface is at a high level, the source of the first MOS transistor Q1 is connected to the power supply terminal VCC, and the gate is connected to the signal transmitting terminal UART _ TX of the serial communication interface, so that Vgs >0 at this time, the first MOS transistor Q1 is turned off, the gate of the second MOS transistor Q2 is kept at a low state under the action of the seventh voltage dividing resistor R7, and the source of the second MOS transistor Q2 is also connected to the power supply terminal VCC, so that Vgs =0 of the second MOS transistor Q2 is turned off at this time, the second MOS transistor Q2 is turned off, and the signal receiving terminal UART _ RX of the serial communication interface is kept at a low level under the action of the sixth voltage dividing resistor R6.
When the power supply terminal VCC is at a high level and the signal transmitting terminal UART _ TX of the serial communication interface is at a low level, the source S of the first MOS transistor Q1 is connected to the power supply terminal VCC, and at this time, is high, and the gate G is connected to the signal transmitting terminal UART _ TX of the serial communication interface, and at this time, is also high, so that Vgs =0 of the first MOS transistor Q1 at this time, the first MOS transistor Q1 is turned off. The gate G of the second MOS transistor Q2 is kept in a low state under the action of the resistor R1, and the source S is kept in a high state under the action of the power supply terminal VCC, so that Vgs <0 of the second MOS transistor Q2 at this time, the second MOS transistor Q2 is turned on, and the signal receiving terminal UART _ RX of the serial communication interface is kept in a high state under the action of the power supply terminal VCC, and the voltage of the signal receiving terminal UART _ TX of the serial communication interface is kept consistent with the voltage of the signal transmitting terminal UART _ TX of the serial communication interface.
When the power supply terminal VCC is at a high level and the signal transmitting terminal UART _ TX of the serial communication interface is at a low level, the source S of the first MOS transistor Q1 is connected to the power supply terminal VCC, which is high at this time, and the gate G is connected to the signal transmitting terminal UART _ TX of the serial communication interface, which is low at this time, so that Vgs of the first MOS transistor Q1 is less than 0, and the first MOS transistor Q1 is turned on. The gate G of the second MOS transistor Q2 is directly connected to the power supply terminal VCC to maintain a high state, and the source S also maintains a high state under the action of the power supply terminal VCC, so that Vgs =0 of the second MOS transistor Q2 at this time, the second MOS transistor Q2 is turned off, and the signal receiving terminal UART _ RX of the serial communication interface maintains a low state under the action of the sixth voltage dividing resistor R6, and maintains the same voltage as that of the signal transmitting terminal UART _ TX of the serial communication interface.
Therefore, the embodiment of the utility model provides a prevent flowing backward the function through the voltage signal who uses the MOS pipe of 2P types to realize serial communication interface, electron device still less, with low costs to can effectively avoid utilizing the schottky diode to carry out the voltage and prevent flowing backward the signal appearance distortion of the serial communication interface that leads to, thereby lead to the serial communication interface bit error rate to increase the problem that the data acquisition made mistakes.
Prevent flowing backward circuit based on above serial communication interface, the embodiment of the utility model provides a still provides a serial communication line, prevent flowing backward the circuit including the aforesaid.
Prevent flowing backward circuit based on above-mentioned serial communication interface, the embodiment of the utility model provides a serial communication device, including above-mentioned serial communication line.
Prevent flowing backward circuit based on above serial communication interface, the embodiment of the utility model provides an electronic equipment, including above-mentioned serial communication device.
Prevent flowing backward circuit based on above serial communication interface, the embodiment of the utility model provides an electronic equipment detection device, including above-mentioned serial communication device.
In the description of the present specification, reference to the description of "one embodiment," "some embodiments," "an example," "a specific example," or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means two or more unless specifically limited otherwise.
The above description is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the change or replacement within the technical scope of the present invention, and all the cases should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. The utility model provides a serial communication interface prevents flowing backward circuit which characterized in that, prevent flowing backward the circuit and include first branch road and second branch road:
the first branch and the second branch are connected between a signal sending end and a signal receiving end of the serial communication interface;
the first branch comprises a first MOS tube;
the second branch comprises a second MOS tube;
the first MOS tube and the second MOS tube are both P-type MOS tubes.
2. The backflow prevention circuit of claim 1, wherein the first branch further comprises a third MOS transistor and a first voltage dividing resistor, the third MOS transistor being an N-type MOS transistor; accordingly, the method can be used for solving the problems that,
the source electrode of the first MOS tube is connected with the signal sending end of the serial communication interface, the grid electrode of the first MOS tube is connected with the drain electrode of the third MOS tube, and the drain electrode of the first MOS tube is connected with the grid electrode of the second MOS tube;
one end of the first voltage dividing resistor is connected with a signal sending end of the serial communication interface, the other end of the first voltage dividing resistor is connected with a drain electrode of the third MOS tube, and a source electrode of the third MOS tube is grounded.
3. The anti-backflow circuit of claim 2, further comprising a slow start branch, the slow start branch comprising:
one end of the second voltage-dividing resistor is connected with a power supply end, and the other end of the second voltage-dividing resistor is connected with the grid electrode of the third MOS tube, the third voltage-dividing resistor and the first capacitor;
one end of the third voltage-dividing resistor is connected with the grid of the third MOS transistor and the second voltage-dividing resistor, and the other end of the third voltage-dividing resistor is grounded;
one polar plate of the first capacitor is connected with the grid electrode of the third MOS tube, and the other polar plate of the first capacitor is grounded.
4. The anti-backflow circuit of claim 1, wherein the second branch further comprises a fourth voltage-dividing resistor and a fifth voltage-dividing resistor; accordingly, the method can be used for solving the problems that,
the source electrode of the second MOS tube is connected with the signal receiving end of the serial communication interface and the fourth divider resistor, the grid electrode of the second MOS tube is connected with the drain electrode of the first MOS tube, and the drain electrode of the second MOS tube is grounded;
one end of the fourth voltage dividing resistor is connected with a power supply end, and the other end of the fourth voltage dividing resistor is connected with the source electrode of the second MOS tube and the signal receiving end;
one end of the fifth voltage-dividing resistor is connected with the drain electrode of the first MOS tube, and the other end of the fifth voltage-dividing resistor is grounded.
5. The backflow prevention circuit of claim 1,
and the source electrode of the first MOS tube is connected with a power supply end, the grid electrode of the first MOS tube is connected with the signal sending end of the serial communication interface, and the drain electrode of the first MOS tube is connected with the grid electrode of the second MOS tube.
6. The anti-backflow circuit according to claim 1, wherein the second branch further comprises a sixth voltage-dividing resistor and a seventh voltage-dividing resistor; accordingly, the method has the advantages that,
the source electrode of the second MOS tube is connected with a power supply end, the grid electrode of the second MOS tube is connected with the drain electrode of the first MOS tube, and the drain electrode of the second MOS tube is connected with the signal receiving end of the serial communication interface and the sixth divider resistor;
one end of the sixth divider resistor is connected with the drain electrode of the second MOS transistor and the signal receiving end of the serial communication interface, and the other end of the sixth divider resistor is grounded;
and one end of the seventh divider resistor is connected with the drain electrode of the first MOS tube, and the other end of the seventh divider resistor is grounded.
7. A serial communication line, wherein said serial communication line comprises any of said backflow prevention circuits of 1-6.
8. A serial communication apparatus, characterized in that the serial communication apparatus comprises the serial communication line according to claim 7.
9. An electronic device characterized in that it comprises the serial communication apparatus of claim 8.
10. An electronic device detection apparatus, characterized in that the electronic device detection apparatus comprises the serial communication apparatus according to claim 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222078017.1U CN218124314U (en) | 2022-08-05 | 2022-08-05 | Anti-backflow circuit, serial communication line, device, electronic equipment and detection device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222078017.1U CN218124314U (en) | 2022-08-05 | 2022-08-05 | Anti-backflow circuit, serial communication line, device, electronic equipment and detection device |
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| Publication Number | Publication Date |
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| CN218124314U true CN218124314U (en) | 2022-12-23 |
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| CN202222078017.1U Active CN218124314U (en) | 2022-08-05 | 2022-08-05 | Anti-backflow circuit, serial communication line, device, electronic equipment and detection device |
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| CN (1) | CN218124314U (en) |
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