CN218122293U - Flat-top wavelength division multiplexer - Google Patents

Flat-top wavelength division multiplexer Download PDF

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CN218122293U
CN218122293U CN202222745570.6U CN202222745570U CN218122293U CN 218122293 U CN218122293 U CN 218122293U CN 202222745570 U CN202222745570 U CN 202222745570U CN 218122293 U CN218122293 U CN 218122293U
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cell states
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wavelength division
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杨俊波
马汉斯
陈宇泰
杜特
翁俊杰
农洁
韦雪玲
张伊祎
方粮
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National University of Defense Technology
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Abstract

The utility model belongs to the technical field of receive the photoelectron components and parts a little, specifically relate to a flat-top wavelength division multiplexer, including the input waveguide that connects gradually, optimize district and 2 at least output waveguide, optimize the district and be divided into a plurality of units, every unit has 2 states, and the state of every unit is controlled through punching and not punching, the utility model discloses can realize the flat-top filtering of broadband, effectively solve current wavelength division multiplexer design complicacy, the size is big and because the problem of the target wavelength drift that machining error and temperature variation lead to.

Description

Flat-top wavelength division multiplexer
Technical Field
The utility model belongs to the technical field of receive photoelectron components and parts a little, specifically relate to a flat-top wavelength division multiplexer.
Background
Wavelength division multiplexers are used to separate different wavelength channels and are key optoelectronic devices that determine the capacity and quality of data communication systems. In particular, the wavelength division multiplexer with the flat-top passband bandwidth plays an important role in guaranteeing signal fidelity and signal wavelength drift tolerance. At present, a wavelength division multiplexer with a flat top passband bandwidth is generally designed by a mach-zehnder interferometer, a bragg grating, a micro-ring and other structures. However, the wavelength division multiplexer with flat-top passband bandwidth realized by such a structure cannot simultaneously satisfy the requirements of simple design, small size and low cost.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is to provide a flat-top wavelength division multiplexer, it is complicated to solve the design, and the size is big and because the problem of the target wavelength drift that machining error and temperature variation lead to.
The embodiment of the utility model provides a content is a flat-top wavelength division multiplexer, including the input waveguide that connects gradually, optimize district and 2 at least output waveguide, optimize the district and be divided into a plurality of units, every unit has 2 states, and the state of every unit is respectively:
the row 01 cell states are: 1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,1,1;
the row 02 cell states are: 1,1,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,0,1,1,1,0,1,1,0,0,1;
row 03 cell states are: 1,1,0,0,1,0,0,0,0,1,1,0,0,1,1,1,1,1,0,0,1,0,0,0,1,0,0,0,0,1;
the row 04 cell states are: 0,1,0,1,0,1,0,1,1,1,1,0,1,0,0,0,0,1,0,1,1,1,1,1,0,0,0,1,1,0;
row 05 cell states are: 1,1,1,1,0,1,1,1,1,1,1,0,0,0,1,1,1,1,1,0,1,0,0,1,1,1,1,0,1,0;
the cell states in row 06 are: 1,0,0,1,0,0,0,1,1,1,1,0,0,1,1,1,0,0,1,0,0,1,0,1,0,1,1,1,1,0;
row 07 unit states are: 1,1,1,1,1,1,1,1,1,0,0,0,1,1,0,1,1,0,1,0,0,1,0,0,1,0,0,0,0,1;
row 08 cell states are: 0,1,1,0,0,0,1,1,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1,0,1,0;
the cell states on row 09 are: 0,0,0,0,1,1,0,0,1,1,1,1,1,0,0,1,1,0,0,1,0,0,1,0,1,1,1,1,1,1;
row 10 cell states are: 0,1,1,1,1,0,0,1,1,0,1,1,0,1,0,0,0,1,0,1,1,0,1,1,0,1,1,0,1,0;
the row 11 cell states are: 0,0,0,0,0,0,0,1,1,0,1,0,0,1,0,0,1,1,1,0,1,1,1,1,0,0,1,0,0,1;
row 12 cell states are: 1,1,0,1,1,1,0,1,1,1,1,0,0,0,0,1,1,0,0,0,1,1,1,1,1,1,0,1,0,1;
row 13 cell states are: 1,0,1,1,0,1,1,1,0,0,1,0,0,1,1,0,0,0,1,0,1,0,0,1,1,1,1,0,0,1;
row 14 cell states are: 1,1,1,1,1,1,0,1,0,0,1,0,1,0,1,0,1,0,1,1,0,1,0,0,0,0,1,1,1,1;
row 15 cell states are: 1,1,1,0,0,1,1,1,1,1,0,0,1,1,0,0,1,0,0,0,0,1,0,1,1,0,0,0,1,0;
row 16 cell states are: 0,1,0,0,1,1,0,0,0,0,1,0,0,1,1,1,0,0,0,1,0,0,1,1,0,1,0,0,0,0;
row 17 cell states are: 0,1,1,0,0,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1,0,1,1,1,1,1,0,0,1,1;
row 18 cell states are: 1,1,0,0,1,1,1,1,0,0,1,1,0,1,0,0,0,1,0,1,1,1,1,0,1,0,1,0,0,1;
row 19 cell states are: 1,0,1,1,1,1,0,0,1,0,1,0,0,0,1,0,1,0,0,0,1,1,0,0,1,0,1,0,1,1;
the row 20 cell states are: 0,0,0,0,1,0,0,1,1,0,0,1,1,1,0,0,0,1,0,0,1,1,1,1,1,0,1,0,0,1;
row 21 cell states are: 1,0,1,0,0,0,0,0,1,1,0,1,1,0,1,0,1,1,0,0,1,0,0,1,0,0,1,0,0,1;
row 22 cell states are: 0,0,0,0,1,0,1,0,0,1,0,0,1,0,1,0,1,1,1,1,0,1,1,0,0,0,1,0,0,1;
row 23 cell states are: 1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,0,1,0,1,0,0,0,1,0,0,1,0,1,1;
the row 24 cell states are: 1,1,0,1,0,0,1,0,1,0,1,1,0,1,1,0,1,1,1,0,1,1,0,1,1,0,1,0,0,1;
row 25 cell states are: 1,0,0,0,0,1,1,1,1,0,1,0,1,0,0,1,0,0,0,0,0,0,1,1,0,0,0,0,1,1;
the row 26 cell states are: 1,1,1,1,0,0,1,1,0,0,1,1,1,0,0,1,1,0,1,1,0,0,0,0,0,1,1,0,1,0;
row 27 cell states are: 1,0,0,1,0,0,1,1,0,1,1,0,1,0,1,1,1,1,0,1,0,0,1,0,1,1,0,1,0,0;
row 28 cell states are: 1,1,0,0,1,1,1,1,1,0,1,0,1,1,0,0,0,1,0,1,0,1,0,1,0,0,1,1,0,1;
the row 29 cell states are: 1,1,1,1,0,0,0,1,1,1,1,1,0,1,1,0,0,1,1,1,0,1,1,1,0,0,0,0,0,1;
the row 30 cell states are: 1,0,0,0,0,0,1,0,0,1,0,0,1,1,0,0,0,1,0,1,1,0,1,1,0,1,1,0,1,1;
the row 31 cell states are: 1,1,0,1,1,1,0,0,0,0,0,1,1,0,1,1,0,1,1,1,0,0,0,0,0,0,0,0,0,0;
the row 32 cell states are: 1,1,0,1,0,0,0,0,1,1,0,0,0,0,1,0,0,1,0,0,1,1,1,0,1,1,1,1,1,0;
the row 33 cell states are: 1,0,0,1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0,1,1,1,0,1,1,0,0,0,0,1;
row 34 cell states are: 1,0,1,0,1,1,1,1,1,0,1,0,1,1,0,1,1,0,0,0,0,0,1,1,0,0,0,1,0,1;
row 35 cell states are: 0,1,0,0,0,1,0,1,0,0,1,0,0,0,0,1,1,0,0,1,0,0,1,0,0,1,0,0,1,1;
row 36 cell states are: 0,0,0,1,1,0,0,1,0,1,0,1,0,0,0,0,1,1,0,1,0,0,0,1,1,0,0,1,0,1;
row 37 cell states are: 0,0,0,1,0,1,1,1,1,1,1,1,1,0,1,0,1,0,0,0,1,1,0,0,1,1,1,0,0,1;
row 38 cell states are: 0,0,0,0,0,0,0,0,0,0,0,1,0,1,1,1,1,0,0,1,0,0,1,0,0,1,0,0,0,1;
row 39 cell states are: 0,0,0,0,0,0,0,0,1,1,1,0,1,0,1,1,1,1,1,0,1,0,1,0,1,1,1,0,0,1;
the row 40 cell states are: 0,0,0,0,1,1,1,0,0,0,0,0,0,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0;
wherein "0" represents puncturing and "1" represents no puncturing.
Optionally, an embodiment of the present invention may have only 2 output waveguides, the input waveband and the 2 output waveguides are respectively located at two ends of the optimized region, and the 2 output waveguides are located at the same side of the optimized region.
In one embodiment, the processing material is a Silicon On Insulator (SOI) substrate on an insulating substrate, and includes a substrate, a top Silicon layer is disposed on the substrate, the cladding layer is air, and the top Silicon layer includes an input waveguide, an optimization region, and an output waveguide, which are connected in sequence.
In one embodiment, the substrate thickness is 3 μm, the top silicon thickness is 220nm, and the width W of the input waveguide 1 2 width W of output waveguide 4 And W 5 Are all 480nm, ensure lossless support of TE 0 A mode; the 2 output waveguides are divided into a first output waveguide and a second output waveguide, and the distance W between the first output waveguide and the second output waveguide 6 2220nm; w of the optimization zone 2 ×W 3 The size is 3600nm multiplied by 4800nm.
The utility model discloses an embodiment, the output target can be for indicating within 1260nm ~ 1640nm work bandwidth scope, and 1320nm ~ 1380nm and 1520nm ~ 1580 nm's bandwidth are separated respectively to first output waveguide and second output waveguide high-efficiently.
In one embodiment, the difference is calculated by weighting the pass band and stop band transmittances, which is the minimum transmittance within a certain bandwidth. For example, in the operating bandwidth range of 1260nm to 1640nm, if wavelengths of 1320nm to 1380nm and 1520nm to 1580nm are to be separated efficiently, the difference can be expressed as a quality factor function:
Figure BDA0003896243930000031
in the formula (I), the compound is shown in the specification,
Figure BDA0003896243930000032
and
Figure BDA0003896243930000033
a minimum transmittance of 1320nm to 1380nm wavelength band of the first output waveguide, 1520nm to 1580nm wavelength band of the first output waveguide, 1320nm to 1380nm wavelength band of the second output waveguide, and 1520nm to 1580nm wavelength band of the second output waveguide, respectively; alpha, beta and gamma are corresponding weighting factors respectively, and can be used for regulating and controlling the passband transmittance of the first output waveguide and the second output waveguide, the stopband transmittance of the first output waveguide and the second output waveguide and the deviation of the passband transmittance of the first output waveguide and the second output waveguide.
In one embodiment of the present invention, the cells are square cells with the same size, and the side length a is 120nm.
The states of the cells are divided into an etched state and a non-etched state. The etching mode is to punch a hole in the center of the unit. The shape of the hole can be cylindrical, the shape of the unit is square, the size of each unit is the same, and the area of the hole is set according to the minimum machining characteristic value. For example, an optimized area of 3600nm multiplied by 4800nm is divided into square units with the side length of 30 multiplied by 40 a multiplied by a, namely 120nm multiplied by 120 nm; the center of each square cell has 2 states, namely a punched state and a non-punched state, namely an etched state and a non-etched state. The etching state refers to that the square central silicon material is changed into an air cylinder with the diameter d of 90nm and the depth of 220nm, and the non-etching state refers to that the square central silicon material is kept unchanged.
An embodiment of the utility model discloses a flat-top wavelength division multiplexer's design method, mainly for optimizing the district, the optimization step does, the state of every unit in the random initialization optimization district, then selects a unit, switches the state of this unit, utilizes the finite time domain difference method to calculate the performance after switching, and performance after switching is greater than the performance before switching, then keeps the state of current unit, otherwise, then changes the state before switching, the performance is in the working bandwidth, the transmissivity difference value of passband and stop band is the biggest. And sequentially carrying out the iteration for multiple times until convergence, and obtaining an optimized optimization area.
In one embodiment, the convergence condition is that the difference in performance after two iterations is less than 0.1%.
The beneficial effects of the utility model are that, the utility model discloses to optimize the district setting between input waveguide and 2 at least output waveguide, carry out the sculpture to optimizing the different regions in district, what region carry out the sculpture and obtain through following certain optimization method, obtained final optimization district, adopt this kind of structure, the size can be very little, and can realize efficient flat top filtering in wide wavelength, and optimization method is comparatively simple.
Drawings
Fig. 1 is a schematic perspective view of an embodiment of the present invention.
Fig. 2 is a diagram showing the etching and non-etching states of the unit according to the embodiment of the present invention, wherein the left diagram shows the etching state and the right diagram shows the non-etching state.
Fig. 3 is a schematic diagram of an optimized initial structure according to an embodiment of the present invention.
Fig. 4 is a schematic top view of the embodiment of the present invention.
Fig. 5 is a simulation result of a random initial structure according to an embodiment of the present invention.
Fig. 6 is a simulation result of the flat-top wavelength division multiplexer according to the embodiment of the present invention.
In the figure, 10 substrates, 20 top layers of silicon, 1 input waveguide, 2 optimized regions, 21 square cells, 3 first output waveguides, 4 second output waveguides.
Detailed Description
The technical scheme of the utility model is further described in detail with reference to the accompanying drawings and specific embodiments:
example 1
A flat-top wavelength division multiplexer comprises a substrate 10, wherein a top layer silicon 20 is arranged on the substrate 10, the top layer silicon 20 comprises an optimized area 2, an input waveguide 1 is arranged at one end of the optimized area 2, a first output waveguide 3 and a second output waveguide 4 are arranged at the other end of the optimized area, the first output waveguide 3 and the second output waveguide 4 output different broadband wavelengths, the optimized area 2 is divided into N × M square units 21 with the same size, and an aperiodic perforation array meeting a preset output target is formed by adjusting the state of the center of each square unit 21. The output target of the embodiment means that the first output waveguide 3 and the second output waveguide 4 respectively and efficiently separate wavelengths of 1320nm to 1380nm and 1520nm to 1580nm within the operating bandwidth range of 1260nm to 1640 nm.
In this embodiment, the processing material is a common Silicon On Insulator (SOI) substrate, the top Silicon 20 has a thickness of 220nm, the substrate 10 has a thickness of 3 μm of silica, and the upper cladding is air; width W of input waveguide 1 1 Width W of the first output waveguide 3 4 And a second output waveguide 4 width W 5 Are all 480nm, ensure lossless support of TE 0 A mode; the spacing W between the first output waveguide 3 and the second output waveguide 4 6 2220nm; w of optimization region 2 2 ×W 3 The size is 3600nm multiplied by 4800nm.
The utility model discloses the regional structure of device optimization comes through direct binary system intelligent algorithm design, and it includes following step: step 1: the function of the device is determined. Setting a quality factor function representing device function:
Figure BDA0003896243930000041
in the formula (I), the compound is shown in the specification,
Figure BDA0003896243930000042
and
Figure BDA0003896243930000043
1320nm to 1380nm wave band of the output waveguide 3, 1520nm to 1580nm wave band of the output waveguide 3, 1320nm to 1380nm wave band of the output waveguide 4 and the output waveguide respectively4 minimum transmittance in the 1520nm to 1580nm wavelength band; alpha, beta and gamma are corresponding weight factors respectively, and can be used for regulating and controlling the pass-band transmittance of the output waveguide 3 and the output waveguide 4, the stopband transmittance of the output waveguide 3 and the output waveguide 4 and the deviation of the pass-band transmittance of the output waveguide 3 and the output waveguide 4. Where α, β, and γ are set to 0.8,0.1 and 0.1, respectively.
Step 2: discretizing the optimized region of the device. The 3600nm × 4800nm optimized region 2 is divided into 30 × 40 square units 21 with side length a × a of 120nm × 120 nm; the center of each square cell has 2 states, namely a punched state and a non-punched state, namely an etched state and a non-etched state. As shown in fig. 2, the etched state means that the square central silicon material is changed into an air cylinder with a diameter d of 90nm and a depth of 220nm, while the non-etched state means that the square central silicon material is kept unchanged.
And step 3: and (5) searching optimization. The initial calculation structure is a circular hole array which is randomly distributed as shown in fig. 3, then a square unit is randomly selected, the central state of the square unit is switched, and the value of the prime factor function FOM, namely the performance of the device, is calculated by using a finite time domain difference method. When the performance of the device is greater than the performance before switching, the state of the current square unit is kept; otherwise, this square cell becomes the pre-switching state. Then, the next square cell is calculated according to a search formula in a certain direction.
And 4, step 4: the final structure is obtained. All square cells within optimization area 2 are searched for, referred to as an iteration. After repeated iterative calculation, when the FOM difference after two iterations is less than 0.1%, it indicates that the algorithm is converged and the device performance is stable, and the final device structure shown in fig. 4 is obtained. For the purpose of describing a specific device structure, the "0" is used to represent the perforation, i.e. the center of the square cell is filled with an air cylinder with a diameter d of 90nm and a depth of 220nm, the "1" is used to represent the non-perforation, i.e. the center of the square cell remains as silicon material, and the structure of the optimized region of the device is:
the row 01 cell states are: 1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,1,1;
the row 02 cell states are: 1,1,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,0,1,1,1,0,1,1,0,0,1;
row 03 cell states are: 1,1,0,0,1,0,0,0,0,1,1,0,0,1,1,1,1,1,0,0,1,0,0,0,1,0,0,0,0,1;
the row 04 cell states are: 0,1,0,1,0,1,0,1,1,1,1,0,1,0,0,0,0,1,0,1,1,1,1,1,0,0,0,1,1,0;
row 05 cell states are: 1,1,1,1,0,1,1,1,1,1,1,0,0,0,1,1,1,1,1,0,1,0,0,1,1,1,1,0,1,0;
the cell states in row 06 are: 1,0,0,1,0,0,0,1,1,1,1,0,0,1,1,1,0,0,1,0,0,1,0,1,0,1,1,1,1,0;
row 07 unit states are: 1,1,1,1,1,1,1,1,1,0,0,0,1,1,0,1,1,0,1,0,0,1,0,0,1,0,0,0,0,1;
row 08 cell states are: 0,1,1,0,0,0,1,1,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1,0,1,0;
the cell states on row 09 are: 0,0,0,0,1,1,0,0,1,1,1,1,1,0,0,1,1,0,0,1,0,0,1,0,1,1,1,1,1,1;
the row 10 cell states are: 0,1,1,1,1,0,0,1,1,0,1,1,0,1,0,0,0,1,0,1,1,0,1,1,0,1,1,0,1,0;
the row 11 cell states are: 0,0,0,0,0,0,0,1,1,0,1,0,0,1,0,0,1,1,1,0,1,1,1,1,0,0,1,0,0,1;
row 12 cell states are: 1,1,0,1,1,1,0,1,1,1,1,0,0,0,0,1,1,0,0,0,1,1,1,1,1,1,0,1,0,1;
row 13 cell states are: 1,0,1,1,0,1,1,1,0,0,1,0,0,1,1,0,0,0,1,0,1,0,0,1,1,1,1,0,0,1;
row 14 cell states are: 1,1,1,1,1,1,0,1,0,0,1,0,1,0,1,0,1,0,1,1,0,1,0,0,0,0,1,1,1,1;
row 15 cell states are: 1,1,1,0,0,1,1,1,1,1,0,0,1,1,0,0,1,0,0,0,0,1,0,1,1,0,0,0,1,0;
row 16 cell states are: 0,1,0,0,1,1,0,0,0,0,1,0,0,1,1,1,0,0,0,1,0,0,1,1,0,1,0,0,0,0;
row 17 cell states are: 0,1,1,0,0,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1,0,1,1,1,1,1,0,0,1,1;
row 18 cell states are: 1,1,0,0,1,1,1,1,0,0,1,1,0,1,0,0,0,1,0,1,1,1,1,0,1,0,1,0,0,1;
row 19 cell states are: 1,0,1,1,1,1,0,0,1,0,1,0,0,0,1,0,1,0,0,0,1,1,0,0,1,0,1,0,1,1;
the row 20 cell states are: 0,0,0,0,1,0,0,1,1,0,0,1,1,1,0,0,0,1,0,0,1,1,1,1,1,0,1,0,0,1;
row 21 cell states are: 1,0,1,0,0,0,0,0,1,1,0,1,1,0,1,0,1,1,0,0,1,0,0,1,0,0,1,0,0,1;
row 22 cell states are: 0,0,0,0,1,0,1,0,0,1,0,0,1,0,1,0,1,1,1,1,0,1,1,0,0,0,1,0,0,1;
row 23 cell states are: 1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,0,1,0,1,0,0,0,1,0,0,1,0,1,1;
row 24 cell states are: 1,1,0,1,0,0,1,0,1,0,1,1,0,1,1,0,1,1,1,0,1,1,0,1,1,0,1,0,0,1;
row 25 cell states are: 1,0,0,0,0,1,1,1,1,0,1,0,1,0,0,1,0,0,0,0,0,0,1,1,0,0,0,0,1,1;
the row 26 cell states are: 1,1,1,1,0,0,1,1,0,0,1,1,1,0,0,1,1,0,1,1,0,0,0,0,0,1,1,0,1,0;
row 27 cell states are: 1,0,0,1,0,0,1,1,0,1,1,0,1,0,1,1,1,1,0,1,0,0,1,0,1,1,0,1,0,0;
row 28 cell states are: 1,1,0,0,1,1,1,1,1,0,1,0,1,1,0,0,0,1,0,1,0,1,0,1,0,0,1,1,0,1;
the row 29 cell states are: 1,1,1,1,0,0,0,1,1,1,1,1,0,1,1,0,0,1,1,1,0,1,1,1,0,0,0,0,0,1;
row 30 cell states are: 1,0,0,0,0,0,1,0,0,1,0,0,1,1,0,0,0,1,0,1,1,0,1,1,0,1,1,0,1,1;
the row 31 cell states are: 1,1,0,1,1,1,0,0,0,0,0,1,1,0,1,1,0,1,1,1,0,0,0,0,0,0,0,0,0,0;
row 32 cell states are: 1,1,0,1,0,0,0,0,1,1,0,0,0,0,1,0,0,1,0,0,1,1,1,0,1,1,1,1,1,0;
the row 33 cell states are: 1,0,0,1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0,1,1,1,0,1,1,0,0,0,0,1;
row 34 cell states are: 1,0,1,0,1,1,1,1,1,0,1,0,1,1,0,1,1,0,0,0,0,0,1,1,0,0,0,1,0,1;
row 35 cell states are: 0,1,0,0,0,1,0,1,0,0,1,0,0,0,0,1,1,0,0,1,0,0,1,0,0,1,0,0,1,1;
row 36 cell states are: 0,0,0,1,1,0,0,1,0,1,0,1,0,0,0,0,1,1,0,1,0,0,0,1,1,0,0,1,0,1;
row 37 cell states are: 0,0,0,1,0,1,1,1,1,1,1,1,1,0,1,0,1,0,0,0,1,1,0,0,1,1,1,0,0,1;
row 38 cell states are: 0,0,0,0,0,0,0,0,0,0,0,1,0,1,1,1,1,0,0,1,0,0,1,0,0,1,0,0,0,1;
row 39 cell states are: 0,0,0,0,0,0,0,0,1,1,1,0,1,0,1,1,1,1,1,0,1,0,1,0,1,1,1,0,0,1;
the row 40 cell states are: 0,0,0,0,1,1,1,0,0,0,0,0,0,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0;
compared with the device performance of the random initial structure of fig. 5, the performance of the device is greatly improved after algorithm optimization. Fig. 6 is a simulation result of the flat-top passband bandwidth wavelength division multiplexer of the present invention, in which the insertion loss of the bandwidth from 1320nm to 1380nm in the first output waveguide 3 and the bandwidth from 1520nm to 1580nm in the second output waveguide 4 are both less than 1.5dB, and the corresponding crosstalk is less than 19.7dB. The flat-top broadband wavelength division multiplexer designed based on the intelligent algorithm in the embodiment has the size of 3600nm multiplied by 4800nm, can realize high-efficiency flat-top filtering on the wavelengths of 1320nm to 1380nm and 1520nm to 1580nm within the working bandwidth of 1260nm to 1640nm, effectively solves the problems of complex design and large size of the existing wavelength division multiplexer, and can effectively make up the defect of target wavelength drift of the narrow-bandwidth wavelength division multiplexer caused by processing errors and temperature changes because the device can realize filtering of a large broadband. Has very important significance.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to imply that the scope of the application is limited to these examples; within the context of the present application, features from the above embodiments or from different embodiments may also be combined, steps may be implemented in any order, and there are many other variations of different aspects of one or more embodiments in the present application as described above, which are not provided in detail for the sake of brevity.
It is intended that the one or more embodiments of the present application cover all such alternatives, modifications, and variations as fall within the broad scope of the present application. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of one or more embodiments of the present application are intended to be included within the scope of the present application.

Claims (10)

1. The utility model provides a flat-top wavelength division multiplexer, characterized by, including input waveguide (1), optimization district (2) and the at least 2 output waveguides that connect gradually, optimization district (2) are divided into a plurality of units, and every unit has 2 states, and the state of every unit is respectively:
the row 01 cell states are: 1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,1,1;
the row 02 cell states are: 1,1,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,0,1,1,1,0,1,1,0,0,1;
the row 03 cell states are: 1,1,0,0,1,0,0,0,0,1,1,0,0,1,1,1,1,1,0,0,1,0,0,0,1,0,0,0,0,1;
the row 04 cell states are: 0,1,0,1,0,1,0,1,1,1,1,0,1,0,0,0,0,1,0,1,1,1,1,1,0,0,0,1,1,0;
row 05 cell states are: 1,1,1,1,0,1,1,1,1,1,1,0,0,0,1,1,1,1,1,0,1,0,0,1,1,1,1,0,1,0;
the cell states in row 06 are: 1,0,0,1,0,0,0,1,1,1,1,0,0,1,1,1,0,0,1,0,0,1,0,1,0,1,1,1,1,0;
row 07 unit states are: 1,1,1,1,1,1,1,1,1,0,0,0,1,1,0,1,1,0,1,0,0,1,0,0,1,0,0,0,0,1;
row 08 cell states are: 0,1,1,0,0,0,1,1,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1,0,1,0;
the cell states on row 09 are: 0,0,0,0,1,1,0,0,1,1,1,1,1,0,0,1,1,0,0,1,0,0,1,0,1,1,1,1,1,1;
the row 10 cell states are: 0,1,1,1,1,0,0,1,1,0,1,1,0,1,0,0,0,1,0,1,1,0,1,1,0,1,1,0,1,0;
the row 11 cell states are: 0,0,0,0,0,0,0,1,1,0,1,0,0,1,0,0,1,1,1,0,1,1,1,1,0,0,1,0,0,1;
row 12 cell states are: 1,1,0,1,1,1,0,1,1,1,1,0,0,0,0,1,1,0,0,0,1,1,1,1,1,1,0,1,0,1;
row 13 cell states are: 1,0,1,1,0,1,1,1,0,0,1,0,0,1,1,0,0,0,1,0,1,0,0,1,1,1,1,0,0,1;
row 14 cell states are: 1,1,1,1,1,1,0,1,0,0,1,0,1,0,1,0,1,0,1,1,0,1,0,0,0,0,1,1,1,1;
row 15 cell states are: 1,1,1,0,0,1,1,1,1,1,0,0,1,1,0,0,1,0,0,0,0,1,0,1,1,0,0,0,1,0;
row 16 cell states are: 0,1,0,0,1,1,0,0,0,0,1,0,0,1,1,1,0,0,0,1,0,0,1,1,0,1,0,0,0,0;
row 17 cell states are: 0,1,1,0,0,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1,0,1,1,1,1,1,0,0,1,1;
row 18 cell states are: 1,1,0,0,1,1,1,1,0,0,1,1,0,1,0,0,0,1,0,1,1,1,1,0,1,0,1,0,0,1;
row 19 cell states are: 1,0,1,1,1,1,0,0,1,0,1,0,0,0,1,0,1,0,0,0,1,1,0,0,1,0,1,0,1,1;
the row 20 cell states are: 0,0,0,0,1,0,0,1,1,0,0,1,1,1,0,0,0,1,0,0,1,1,1,1,1,0,1,0,0,1;
row 21 cell states are: 1,0,1,0,0,0,0,0,1,1,0,1,1,0,1,0,1,1,0,0,1,0,0,1,0,0,1,0,0,1;
row 22 cell states are: 0,0,0,0,1,0,1,0,0,1,0,0,1,0,1,0,1,1,1,1,0,1,1,0,0,0,1,0,0,1;
row 23 cell states are: 1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,0,1,0,1,0,0,0,1,0,0,1,0,1,1;
the row 24 cell states are: 1,1,0,1,0,0,1,0,1,0,1,1,0,1,1,0,1,1,1,0,1,1,0,1,1,0,1,0,0,1;
row 25 cell states are: 1,0,0,0,0,1,1,1,1,0,1,0,1,0,0,1,0,0,0,0,0,0,1,1,0,0,0,0,1,1;
the row 26 cell states are: 1,1,1,1,0,0,1,1,0,0,1,1,1,0,0,1,1,0,1,1,0,0,0,0,0,1,1,0,1,0;
row 27 cell states are: 1,0,0,1,0,0,1,1,0,1,1,0,1,0,1,1,1,1,0,1,0,0,1,0,1,1,0,1,0,0;
row 28 cell states are: 1,1,0,0,1,1,1,1,1,0,1,0,1,1,0,0,0,1,0,1,0,1,0,1,0,0,1,1,0,1;
the row 29 cell states are: 1,1,1,1,0,0,0,1,1,1,1,1,0,1,1,0,0,1,1,1,0,1,1,1,0,0,0,0,0,1;
the row 30 cell states are: 1,0,0,0,0,0,1,0,0,1,0,0,1,1,0,0,0,1,0,1,1,0,1,1,0,1,1,0,1,1;
the row 31 cell states are: 1,1,0,1,1,1,0,0,0,0,0,1,1,0,1,1,0,1,1,1,0,0,0,0,0,0,0,0,0,0;
the row 32 cell states are: 1,1,0,1,0,0,0,0,1,1,0,0,0,0,1,0,0,1,0,0,1,1,1,0,1,1,1,1,1,0;
row 33 cell states are: 1,0,0,1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0,1,1,1,0,1,1,0,0,0,0,1;
row 34 cell states are: 1,0,1,0,1,1,1,1,1,0,1,0,1,1,0,1,1,0,0,0,0,0,1,1,0,0,0,1,0,1;
row 35 cell states are: 0,1,0,0,0,1,0,1,0,0,1,0,0,0,0,1,1,0,0,1,0,0,1,0,0,1,0,0,1,1;
row 36 cell states are: 0,0,0,1,1,0,0,1,0,1,0,1,0,0,0,0,1,1,0,1,0,0,0,1,1,0,0,1,0,1;
row 37 cell states are: 0,0,0,1,0,1,1,1,1,1,1,1,1,0,1,0,1,0,0,0,1,1,0,0,1,1,1,0,0,1;
row 38 cell states are: 0,0,0,0,0,0,0,0,0,0,0,1,0,1,1,1,1,0,0,1,0,0,1,0,0,1,0,0,0,1;
row 39 cell states are: 0,0,0,0,0,0,0,0,1,1,1,0,1,0,1,1,1,1,1,0,1,0,1,0,1,1,1,0,0,1;
the row 40 cell states are: 0,0,0,0,1,1,1,0,0,0,0,0,0,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0;
wherein "0" represents puncturing and "1" represents no puncturing.
2. The wavelength division multiplexer according to claim 1, wherein the puncturing is performed by puncturing a center of the cell.
3. The wavelength division multiplexer according to claim 2, wherein the perforations are 90nm in diameter and 220nm in depth.
4. The flat top wavelength division multiplexer according to claim 1, wherein said cells are square cells.
5. The flat top wavelength division multiplexer according to claim 4, wherein each cell is the same size.
6. The flat-top wavelength division multiplexer according to claim 4, wherein the cells have a side length of 120nm.
7. The wavelength division multiplexer according to any of claims 1-6, further comprising a substrate (10) at the bottom of the input waveguide (1), the optimized region (2) and the output waveguide.
8. The wavelength division multiplexer according to any of the claims 7, characterized in that the substrate (10) has a thickness of 3 μm.
9. The wavelength division multiplexer according to any one of claims 1 to 6, wherein the width of the input waveguides and the width of the 2 output waveguides are each 480nm.
10. The wavelength division multiplexer according to any one of claims 1 to 6, wherein the spacing between the 2 output waveguides is 2220nm.
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