CN218099424U - Battery cell simulation board and BMS testing device - Google Patents
Battery cell simulation board and BMS testing device Download PDFInfo
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- CN218099424U CN218099424U CN202222436503.6U CN202222436503U CN218099424U CN 218099424 U CN218099424 U CN 218099424U CN 202222436503 U CN202222436503 U CN 202222436503U CN 218099424 U CN218099424 U CN 218099424U
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Abstract
The utility model provides a battery cell simulation board and a BMS testing device, which relate to the technical field of BMS testing and comprise a board body, a processing module, a battery cell sampling line interface, an isolation module and a trigger channel; the plate body is provided with a processing module, a plurality of isolation modules, a plurality of trigger channels and a plurality of cell sampling line interfaces; the number of the isolation modules, the number of the trigger channels and the number of the battery core sampling line interfaces are the same; the processing module is used for receiving the control instruction and sending the control instruction to the trigger channel; the trigger channel is used for triggering each battery core sampling line interface and the isolation module corresponding to the battery core sampling line interface to be switched on or off, and triggering each battery core sampling line interface to be switched on or off; the battery core sampling line interface is used for outputting the simulation voltage of each battery core in the current trigger state, so that the technical problem of poor reliability of BMS test in the prior art is solved.
Description
Technical Field
The utility model belongs to the technical field of the BMS test technique and specifically relates to a battery cell emulation board and BMS testing arrangement are related to.
Background
BMS tests are an important ring in the field of new energy automobile tests, wherein the simulation function of the battery core is particularly important for the system test of BMS products. In order to test the performance of the BMS product with low cost and high efficiency, the battery cell simulation board is produced. The battery core simulation board is used for simulating the overall performance and the structure of an actual battery pack in the system test, and the environment of the BMS carried by the actual vehicle battery pack can be simulated. Through using electric core emulation board test BMS, can reduce production and test cost by a wide margin, promote efficiency of software testing, improve the reliability of BMS product.
The existing battery cell simulation board has the defects that the voltage has small pressure difference and the temperature also has certain temperature drift due to the fact that the channels are not independent and the single battery cells are not isolated, so that the test acquisition precision is influenced, and the test reliability of the BMS is influenced.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide an electricity core emulation board and BMS testing arrangement to the relatively poor technical problem of BMS test reliability who exists among the prior art has been alleviated.
In a first aspect, an embodiment of the present invention provides an electric core simulation board, include: the device comprises a plate body, a processing module, a cell sampling line interface, an isolation module and a trigger channel; the plate body is provided with the processing module, a plurality of isolation modules, a plurality of trigger channels and a plurality of cell sampling line interfaces; the number of the isolation modules, the number of the trigger channels and the number of the battery core sampling line interfaces are the same;
the processing module is used for receiving a control instruction and sending the control instruction to the trigger channel;
the trigger channel is used for triggering, connecting and disconnecting each electric core sampling line interface and the isolation module corresponding to the electric core sampling line interface, and triggering, connecting and disconnecting each electric core sampling line interface;
and the battery cell sampling line interface is used for outputting the simulation voltage of each battery cell in the current trigger state.
With reference to the first aspect, embodiments of the present invention provide a first possible implementation manner of the first aspect, wherein the trigger channel includes a first relay and a second relay; wherein the first relay or the second relay is turned on at the same time;
the first relay is used for switching on or switching off the connection between the battery core sampling line interface and the isolation module corresponding to the battery core sampling line interface;
and the second relay is used for switching on or switching off the connection between the current electric core sampling line interface and the other electric core sampling line interfaces.
In combination with the first aspect, an embodiment of the present invention provides a second possible implementation manner of the first aspect, wherein the processing module is further configured to control the target to trigger the first relay of the channel to switch on the electrical core sampling line interface and the connection of the isolation module corresponding to the electrical core sampling line interface, and control the second relay of the target to trigger the channel to be used for disconnecting the connection between the current electrical core sampling line interface and the remaining electrical core sampling line interfaces.
In combination with the first aspect, an embodiment of the present invention provides a third possible implementation manner of the first aspect, wherein the processing module is further configured to control disconnection of the first relay of the target trigger channel between the interface of the electrical core sampling line and the connection of the isolation module corresponding to the interface of the electrical core sampling line, and control connection of the current interface of the electrical core sampling line and the interface of the target electrical core sampling line by the second relay of the target trigger channel.
In combination with the first aspect, an embodiment of the present invention provides a fourth possible implementation manner of the first aspect, wherein a first fault port and a second fault port are further provided on the plate body, the first fault port is grounded, and the second fault port is connected to a power supply of the power domain controller.
In combination with the first aspect, an embodiment of the present invention provides a fifth possible implementation manner of the first aspect, wherein the processing module is further configured to control the disconnection of the first relay of the target trigger channel, the interface of the electrical core sampling line is connected to the isolation module corresponding to the interface of the electrical core sampling line, and control the second relay of the target trigger channel to be used for switching on the interface of the current electrical core sampling line and the connection of the first fault port.
In combination with the first aspect, an embodiment of the present invention provides a sixth possible implementation manner of the first aspect, wherein the processing module is further configured to control disconnection of the first relay of the target trigger channel between the interface of the electrical core sampling line and the connection of the isolation module corresponding to the interface of the electrical core sampling line, and control connection of the second relay of the target trigger channel between the interface of the current electrical core sampling line and the second fault port.
In combination with the first aspect, an embodiment of the present invention provides a seventh possible implementation manner of the first aspect, wherein a USB port is further provided on the plate body, and is configured to receive the control command and send the control command to the processing module.
In a second aspect, an embodiment of the utility model provides a BMS testing arrangement is still provided, include as above electric core emulation board and host computer, the host computer with electric core emulation board is connected.
In combination with the second aspect, an embodiment of the present invention provides a first possible implementation manner of the second aspect, wherein the upper computer is configured to send a control instruction to the electrical core simulation board, receive the simulation voltage sent by the electrical core simulation board, and feed back the fault state corresponding to the simulation voltage.
The embodiment of the utility model provides an electric core emulation board and BMS testing arrangement have been brought, through setting up isolation module to every electric core sampling line interface correspondence, guarantee the isolation reliability of each electric core sampling line interface output result, mutual noninterference, meanwhile, still be provided with trigger module between every electric core sampling line interface and isolation module, this trigger module can the analog simulation goes out electric core normal operating condition, control switch on and the disconnection of every electric core sampling line interface and isolation module promptly, still can the analog simulation goes out electric core short circuit abnormal operating condition, control switch on and the disconnection between each electric core sampling line interface promptly, with the electric core output result under the various trouble operating condition of realization, be convenient for the BMS system carries out more comprehensive accurate test.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following descriptions are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic view of a conventional electrical core simulation board provided in an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a cell simulation board provided in an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another electrical core simulation board provided in an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a BMS testing device provided by the embodiment of the present invention.
Icon: 1-USB port; 2-a power supply module; 3-a processing module; 4-an isolation module; 5-electric core sampling line interface; 6-triggering a channel; 7-a failed port; 8-an upper computer.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and obviously, the described embodiments are some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
As shown in fig. 1, although the conventional cell simulation board can realize the unified power supply of the battery sampling chip (AFE), the channels between each single cell (V0-V14) are not independent, single-channel independent control cannot be performed on each cell, short-circuit and open-circuit tests of the cell sampling line cannot be automatically realized, and for voltage regulation, only the voltage of the whole cell (V0-V14) corresponding to the AFE can be regulated, and the voltage regulation of each cell in the AFE cannot be realized, which is not favorable for performing fault tests.
In the practical application process, because 14 channels of each AFE of the current cell simulation board are not independent, the independent adjustment of the cell voltage of each channel cannot be realized, the voltage and the current between the channels can influence each other, namely, the voltage can be adjusted to generate fluctuation and interference, so that the voltage has small-amplitude differential pressure, the temperature also has certain temperature drift, the test acquisition precision is influenced, and the test reliability of the BMS is influenced.
And because the current-stage simulation board has a small regulation range and unstable output, the current-stage simulation board jumps occasionally, and cannot realize 0V output, and each AFE V in each AFE power And AFE V gnd Not independent, AFE V power Will have an influence on the last power saving core, AFE V gnd The first electricity-saving core is affected, so that a large voltage difference exists in partial cell voltages, and the range and the precision of the cell cannot be accurately tested in the testing process. Therefore, when the existing simulation board is used for fault testing, manual triggering and recovery are still needed, program control of an upper computer cannot be realized, the workload is huge, the operation is very complicated, errors are easy to occur, and certain risks are provided.
Based on this, the embodiment of the utility model provides a pair of electric core emulation board and BMS testing arrangement, through set up isolation module and trigger the passageway in each emulation monomer electric core department, guarantee the independence and mutual noninterference between each passageway, and then can improve the reliability to the BMS test.
The following is a detailed description by way of example.
Fig. 2 is a schematic structural diagram of an electrical core simulation board provided by an embodiment of the present invention.
Referring to fig. 2, the cell simulation plate includes: the device comprises a plate body, a processing module 3, a cell sampling line interface 5, an isolation module 4 and a trigger channel 6; the processing module 3, the plurality of isolation modules 4, the plurality of trigger channels 6 and the plurality of battery cell sampling line interfaces 5 are arranged on the plate body; the number of the isolation modules 4, the number of the trigger channels 6 and the number of the cell sampling line interfaces 5 are consistent;
as an optional embodiment, 14 cells, 14 corresponding isolation modules 4 and trigger channels 6 may be configured; through the DAC digital analog signals of the 14-path single-channel battery cell, the isolation module 4 realizes the isolation among the channels, namely the isolation module 4 can isolate each output channel and distribute one path of signals to multiple paths at the same time, and the isolation transmission precision is high; the power supply, the input and the output are completely isolated, and the fluctuation and the interference of voltage and current among channels are avoided.
The processing module 3 may be a CPU processing module 3, and is configured to receive a control instruction and send the control instruction to the trigger channel 6;
the trigger channel 6 triggers, according to a control instruction, each of the cell sampling line interfaces 5 and the isolation module 4 corresponding to the cell sampling line interface 5 to be switched on or off, and triggers, to be switched on or off, each of the cell sampling line interfaces 5;
the cell sampling line interface 5 is used for outputting the simulation voltage of each cell in the current trigger state.
In the preferred embodiment of practical application, the isolation module is correspondingly arranged on each electrical core sampling line interface, so that the isolation reliability of the output result of each electrical core sampling line interface is ensured, and the isolation reliability is not interfered with each other, meanwhile, the trigger module is also arranged between each electrical core sampling line interface 5 and the isolation module, and can simulate the normal working state of an electrical core, namely, the connection and disconnection between each electrical core sampling line interface and the isolation module are controlled, and the abnormal working state of an electrical core short circuit can also be simulated, namely, the connection and disconnection between each electrical core sampling line interface are controlled, so that the electrical core output result under various fault working states is realized, and the BMS system can be conveniently tested more comprehensively and accurately.
It should be noted that the analog sampling front-end battery sampling chip AFE, referred to as AFE for short, in each BMS system has a plurality (for example, 14) of independent channels, and the cell sampling line interface 5 of each channel can output a cell voltage; the cell voltage can be adjusted by switching on or off the trigger channel 6, when fault testing or precision testing is carried out, the voltage can be adjusted to exceed the requirement range, cell protection is triggered, verification of BMS fault testing and cell protection functions is achieved, single-cell voltage can be adjusted within a normal range, a BMS system is tested aiming at the collection precision, the output range and the like of cells based on the output result of the cell sampling line interface 5, the output range of general single-cell voltage is required to be 0-5V, and the specific adjustment range is determined according to the requirements of a host factory on BMS and cell voltage.
On the basis of the foregoing embodiment, a USB port 1 and a power supply module 2 are further disposed on the board body, the power supply module 2 is configured to supply electric energy to the cell simulation board, the AFE Vpower is independent, so as to avoid an influence of an AFE power supply current on the cell sampling line interface V14, and the AFE Vgnd is independent, so as to avoid an influence of the AFE power supply current on the cell sampling line interface V1; the USB port is used for communication, and may also be referred to as a USB communication interface, and is configured to receive and control an instruction, and send the control instruction to the processing module 3, so that the processing module 3 controls the on/off of the trigger channel 6. The upper computer can be used for program control of the battery cell simulation board, and the voltage and the on-off control of each channel can be set through instructions of the upper computer.
The control command can be understood as a program control action command, i.e. a program control action command.
In some embodiments, referring to fig. 3, the trigger channel 6 includes a first relay Sn1 and a second relay Sn2; wherein the first relay or the second relay is turned on at the same time;
the first relay is used for switching on or off the connection between the battery cell sampling line interface and the isolation module 4 corresponding to the battery cell sampling line interface;
and the second relay is used for switching on or switching off the connection between the current electric core sampling line interface and the other electric core sampling line interfaces.
When the short circuit fault needs to be triggered, the S12 and the S22.. S142 are conducted and attracted, the specific attraction path can be started according to the fault requirement, the second relay attraction Sn2 is controlled when the short circuit path needs to be short-circuited, and the first relay is controlled to be open to disconnect the Sn1 when the short circuit path needs to be open. As an alternative embodiment, the fault requirement may be recorded in a fault protection table, and the processing module 3 controls the trigger channel 6 to perform corresponding on/off control according to the fault protection table.
In some embodiments, when the target electrical core is triggered to normally operate according to the fault protection table, the processing module 3 is further configured to control a first relay of the target trigger channel to turn on the connection between the electrical core sampling line interface and the isolation module 4 corresponding to the electrical core sampling line interface, and control a second relay of the target trigger channel to turn off the connection between the current electrical core sampling line interface and the other electrical core sampling line interfaces.
In some embodiments, when a target electrical core is triggered to simulate a short-circuit fault according to a fault protection table, the processing module 3 is further configured to control a first relay of a target trigger channel to disconnect the electrical core sampling line interface from the isolation module 4 corresponding to the electrical core sampling line interface, and control a second relay of the target trigger channel to connect the current electrical core sampling line interface and the target electrical core sampling line interface.
As can be seen from the foregoing embodiment, each trigger channel 6 can control the output result of the corresponding cell sampling line interface through a switching-on or switching-off operation; in practical application, a specific target battery cell sampling line interface or a plurality of target battery cell sampling line interfaces can be controlled according to the fault protection meter, so that the simulation of the fault state and/or the working state of a specific single battery cell is realized, and the reliability of BMS test is ensured.
It can be understood that, in some embodiments, by performing on or off operation on the trigger channel 6, the connection between the cell sampling line interface and the isolation module 4 corresponding to the cell sampling line interface may be disconnected by controlling a first relay of a target trigger channel, and a second relay of the target trigger channel is controlled to disconnect the connection between the current cell sampling line interface and the other cell sampling line interfaces, so as to implement an open circuit of the cell sampling line; in other embodiments, the connection between the battery cell sampling line interface and the isolation module 4 corresponding to the battery cell sampling line interface may be disconnected by controlling the first relay of the target trigger channel, and the second relay of the target trigger channel is controlled to be used to switch on the connection between the current battery cell sampling line interface and the target battery cell sampling line interface adjacent to the current battery cell sampling line interface, so as to implement program-controlled triggering and recovery of a short-circuit fault between two adjacent battery cells.
In some embodiments, a failure port 7 is further disposed on the board body, and the failure port 7 includes a first failure port (Fault 1 port) and a second failure port (Fault 2 port); the first fault port is grounded, and the second fault port is connected with a 12V power supply of a VBU (power domain controller).
When the battery core works normally, sn1 is in an attraction state, and Sn2 is in a disconnection state.
In some embodiments, when a sampling line short-circuit fault required in the fault protection table needs to be triggered, the processing module 3 is further configured to control a first relay of a target trigger channel to disconnect the connection between the cell sampling line interface and the isolation module 4 corresponding to the cell sampling line interface, and control a second relay of the target trigger channel to connect the current cell sampling line interface and the first fault port.
The needed path, namely Sn2 of the target trigger channel is attracted with the Fault1, so that the sampling line of the path is short-circuited with the sampling ground, and the short-ground Fault is triggered.
In some embodiments, when a short power failure of the fault list needs to be triggered, the processing module 3 is further configured to control a first relay of a target trigger channel to disconnect the connection between the cell sampling line interface and the isolation module 4 corresponding to the cell sampling line interface, and control a second relay of the target trigger channel to turn on the connection between the current cell sampling line interface and the second fault port.
The needed path, namely Sn2 of the target trigger channel is attracted with the Fault2, so that short circuit between the sampling line of the path and a power supply can be realized to trigger short power supply faults.
The battery core simulation board greatly improves the functions of the battery core simulation board, and can replace a real battery pack and a whole vehicle environment to test the BMS in a simulation environment, wherein the channels are mutually isolated, the channels are independent, the single channel voltage is controllable, the adjusting range is 0-5V, the multiple channels are not interfered with each other, each channel is independent and adjustable, and the voltage output range is increased; the triggering and recovery of the fault can be programmed, when the battery cell is regulated, the voltage fluctuation of each channel is less than or equal to 1mV, the driving capability of each channel is not less than 200mA, and the battery cell has more stable output voltage; each path of power supply, input and output forms an independent loop, so that the voltage drop is greatly reduced, the test risk is reduced, the working efficiency is greatly improved, the complicated operation is simplified, and the accuracy of the BMS system level test is improved.
In other embodiments, the embodiment of the present invention further provides a BMS testing device, as shown in fig. 4, including the above-mentioned battery cell simulation board and the upper computer 8, the upper computer 8 is connected to the battery cell simulation board.
The upper computer 8 may include program system software written by VeriStand.
In some embodiments, the upper computer 8 is configured to send a control instruction to the electrical core simulation board, receive a simulation voltage sent by the electrical core simulation board, and feed back a fault state corresponding to the simulation voltage.
Wherein, can trigger control according to the fault protection table of storage in the host computer 8, BMS can gather electric core sampling line interface 5 output result to reflect on VeriStation host computer 8, the tester can learn the trigger fault that this output result corresponds through host computer 8, observes its fault grade and what trouble that reports simultaneously. In short, the upper computer 8 controls the trigger channel 6 in the cell simulation board to control the target cell sampling line of the fault protection meter requiring open circuit or short circuit.
In the practical application process, after each fault is triggered, the BMS reports and feeds back the fault grade and the error code corresponding to the output result, and observation can be carried out through an observation interface of the VeriStation upper computer. The programmable relay in the trigger channel can be connected and disconnected, and the matched fault port can be respectively connected with a sampling ground and a power supply, so that ground and short power supply faults can be manufactured, and a target trigger channel for specific testing comes from a fault protection list and upstream requirements. All fault triggering and recovery of this application all can carry out programme-controlled through the host computer, can realize automatic test, have promoted work efficiency and accuracy greatly.
The embodiment of the utility model provides a BMS testing arrangement has the same technical characteristic with the electric core emulation board that above-mentioned embodiment provided, so also can solve the same technical problem, reaches the same technological effect.
In the description of the embodiments of the present invention, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as being fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood as a specific case by those skilled in the art.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present invention, and are not intended to limit the technical solutions of the present invention, and the protection scope of the present invention is not limited thereto, although the present invention is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: those skilled in the art can still modify or easily conceive of changes in the technical solutions described in the foregoing embodiments or make equivalent substitutions for some technical features within the technical scope of the present disclosure; such modifications, changes or substitutions do not depart from the spirit and scope of the embodiments of the present invention, and they should be construed as being included therein.
Claims (10)
1. A cell simulation board, comprising: the device comprises a plate body, a processing module, a cell sampling line interface, an isolation module and a trigger channel; the plate body is provided with the processing module, a plurality of isolation modules, a plurality of trigger channels and a plurality of cell sampling line interfaces; the number of the isolation modules, the number of the trigger channels and the number of the battery core sampling line interfaces are the same;
the processing module is used for receiving a control instruction and sending the control instruction to the trigger channel;
the trigger channel is used for triggering, connecting and disconnecting each electric core sampling line interface and the isolation module corresponding to the electric core sampling line interface, and triggering, connecting and disconnecting each electric core sampling line interface;
and the battery cell sampling line interface is used for outputting the simulation voltage of each battery cell in the current trigger state.
2. The cell simulation board according to claim 1, wherein the trigger channel comprises a first relay and a second relay; wherein the first relay or the second relay is turned on at the same time;
the first relay is used for switching on or switching off the connection between the battery cell sampling line interface and the isolation module corresponding to the battery cell sampling line interface;
and the second relay is used for switching on or switching off the connection between the current electric core sampling line interface and the other electric core sampling line interfaces.
3. The cell simulation board according to claim 2, wherein the processing module is further configured to control a first relay of a target trigger channel to switch on the connection between the cell sampling line interface and the isolation module corresponding to the cell sampling line interface, and control a second relay of the target trigger channel to switch off the connection between the current cell sampling line interface and the other cell sampling line interfaces.
4. The cell simulation board according to claim 2, wherein the processing module is further configured to control a first relay of a target trigger channel to disconnect the connection between the cell sampling line interface and the isolation module corresponding to the cell sampling line interface, and control a second relay of the target trigger channel to switch on the connection between the current cell sampling line interface and the target cell sampling line interface.
5. The cell simulation board according to any one of claims 1 to 4, wherein a first fault port and a second fault port are further provided on the board body, the first fault port is grounded, and the second fault port is connected to a power supply of the power domain controller.
6. The cell simulation board according to claim 5, wherein the processing module is further configured to control a first relay of a target trigger channel to disconnect the connection between the cell sampling line interface and the isolation module corresponding to the cell sampling line interface, and control a second relay of the target trigger channel to connect the current cell sampling line interface to the first fault port.
7. The cell simulation board according to claim 5, wherein the processing module is further configured to control a first relay of a target trigger channel to disconnect the connection between the cell sampling line interface and the isolation module corresponding to the cell sampling line interface, and control a second relay of the target trigger channel to connect the current cell sampling line interface to the second fault port.
8. The battery cell simulation board according to claim 1, wherein the board body is further provided with a USB port for receiving the control command and sending the control command to the processing module.
9. A BMS testing device comprising the cell simulation board of any one of claims 1 to 8 and an upper computer connected to the cell simulation board.
10. The BMS testing device according to claim 9, wherein the upper computer is configured to send a control command to the cell simulation board, receive the simulation voltage sent by the cell simulation board, and feed back a fault state corresponding to the simulation voltage.
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| CN202222436503.6U CN218099424U (en) | 2022-09-14 | 2022-09-14 | Battery cell simulation board and BMS testing device |
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| CN202222436503.6U CN218099424U (en) | 2022-09-14 | 2022-09-14 | Battery cell simulation board and BMS testing device |
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