CN218069315U - Control circuit of display device and display device - Google Patents
Control circuit of display device and display device Download PDFInfo
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- CN218069315U CN218069315U CN202222224717.7U CN202222224717U CN218069315U CN 218069315 U CN218069315 U CN 218069315U CN 202222224717 U CN202222224717 U CN 202222224717U CN 218069315 U CN218069315 U CN 218069315U
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Abstract
The utility model discloses a display device's control circuit and display device, display device include display array and backlight unit, and control circuit includes: a graphics processing circuit configured to provide first display data and to provide second display data upon receiving a first feedback signal of an active state; the time sequence control circuit is coupled with the graphic processing circuit, generates a backlight control signal and the first feedback signal according to the received first display data, and generates a source control signal according to the received second display data; and the driving circuit is coupled with the time sequence control circuit, generates a corresponding backlight driving signal according to the received backlight control signal, and generates a corresponding gray scale display voltage according to the received source control signal. The source control signal and the backlight control signal are output simultaneously, the display array and the backlight unit can act synchronously, and the problem of smear of the regional backlight technology is solved.
Description
Technical Field
The utility model relates to a show technical field, in particular to display device's control circuit and display device.
Background
With the development of display technologies and the improvement of image quality requirements of users, electronic devices such as computers, televisions, mobile phones, etc. begin to display images using Local Dimming (Local Dimming) technology. Specifically, the area backlight technology does not adopt a conventional full-area backlight, such as a CCFL (Cold Cathode Fluorescent Lamp) backlight, as a backlight, but uses a backlight composed of a plurality of LEDs (Light Emitting diodes). The backlight source is divided into a plurality of areas, the LEDs in each area can be adjusted according to the brightness of a display picture to perform adjustment display of different brightness, the backlight source calculates the brightness information of a certain area according to the brightness information of a display picture to control the brightness of the area, and therefore the backlight brightness of different areas of the same frame picture is adjusted according to the brightness of different areas.
However, a general area backlight implementation at present is to calculate the luminance of the area backlight according to the current display screen, and then adjust the area backlight according to the calculated luminance of the area backlight. Therefore, because the time is required for calculating and adjusting the brightness of the area backlight, the currently displayed picture and the area backlight are not displayed simultaneously, the adjustment of the area backlight has a certain delay relative to the display content, and when the picture is switched fast, the fast-changing backlight can cause the bad effects of inconsistent brightness and darkness, even opposite brightness and darkness, flicker, smear and the like on part of the picture. Therefore, an improved control circuit for a display device and a display device are desired to solve the above problems.
SUMMERY OF THE UTILITY MODEL
In view of the above problems, an object of the present invention is to provide a control circuit for a display device and a display device, which can simultaneously output a source control signal and a backlight control signal to solve the problem of smear in the local backlight technique.
According to an aspect of the present invention, there is provided a control circuit for a display device, including: a graphics processing circuit configured to provide first display data and to provide second display data upon receiving a first feedback signal of an active state; the time sequence control circuit is coupled with the graphic processing circuit, generates a backlight control signal and the first feedback signal according to the received first display data, and generates a source electrode control signal according to the received second display data; and the driving circuit is coupled with the time sequence control circuit, generates a corresponding backlight driving signal according to the received backlight control signal, and generates a corresponding gray scale display voltage according to the received source control signal.
Optionally, the graphics processing circuitry comprises: a display data transmitting unit configured to provide the first display data and store the first display data as the second display data in a storage unit when transmitting the first display data; a storage unit disposed in the display data transmitting unit, configured to store the second display data, and provide the second display data to the timing control circuit when the graphics processing circuit receives the first feedback signal of an active state.
Optionally, the memory location is selected from a register.
Optionally, the timing control circuit includes: the control unit is used for receiving the first display data and the second display data, providing the first display data to an area backlight processing unit and providing the second display data to an image data processing unit; the image data processing unit is coupled to the control unit and generates a corresponding second intermediate signal according to the received second display data; the data conversion unit is coupled to the image data processing unit and generates a corresponding source control signal according to the second intermediate signal; the regional backlight processing unit is coupled with the control unit and generates a corresponding backlight control signal according to the received first display data; the control unit receives a second feedback signal provided by the area backlight processing unit, and generates the first feedback signal according to the effective state of the second feedback signal.
Optionally, the second feedback signal is selected from a chip select signal in the backlight control signal.
Optionally, the driving circuit comprises: the source electrode driving circuit is coupled with the data conversion unit and generates corresponding gray scale display voltage according to the received source electrode control signal; and the backlight driving circuit is coupled with the regional backlight processing unit and generates a corresponding backlight driving signal according to the received backlight control signal.
Optionally, the control circuit further comprises: a connector coupled between the graphics processing circuit and the timing control circuit configured to communicate the first display data, the second display data, and the first feedback signal.
Optionally, the first feedback signal is provided to the graphics processing circuit through an auxiliary channel.
According to another aspect of the utility model, a display device is provided, include: the control circuit of any of the above; the display array is coupled with the source electrode driving circuit in the control circuit through a plurality of data lines; the backlight unit is divided into a plurality of areas, is coupled with a backlight control circuit in the control circuit and receives the backlight driving signal to enable each area to display corresponding brightness.
Optionally, the display device is selected from any one of a Mini LED display device or a Micro LED display device.
The control circuit and the display device of the display device provided by the application provide first display data to the time sequence control circuit, when the time sequence control circuit generates a backlight control signal according to the first display data, a first feedback signal is provided to the graphic processing circuit, the graphic processing circuit provides second display data to the time sequence control circuit according to the first feedback signal in an effective state so as to generate a corresponding source electrode control signal, and the backlight control signal and the source electrode control signal are ensured to be output simultaneously, so that a display array and a backlight unit act synchronously.
Optionally, the second feedback signal of the present application is selected from a chip select signal in the backlight control signal generated by the area backlight processing unit, and no additional signal is required to be added, so that the structure is simpler.
Optionally, in this application, the first feedback signal provided by the timing control circuit is provided to the graphics processing circuit through the auxiliary channel, and it is not necessary to occupy the transmission bandwidth of the display data.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 illustrates a prior art display device;
FIG. 2 shows a signal timing diagram of a prior art embodiment;
FIG. 3 illustrates a display device of an embodiment of the present application;
fig. 4 shows a signal timing diagram of an embodiment of the present application.
In the figure:
100-a display device;
101-a display array;
102-a backlight unit;
110-a graphics processing circuit;
111-display data transmission unit;
112-a storage unit;
120-a timing control circuit;
121-a control unit;
122-a display data receiving unit;
123-an image data processing unit;
125-area backlight processing unit;
130-a drive circuit;
131-a source driver circuit;
132-backlight driving circuit;
140-a connector;
200-a display device;
220-a timing control circuit;
222-a control unit;
223-an image data processing unit;
224-a data conversion unit;
225-area backlight processing unit.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In the various figures, the same elements or modules are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.
It should be understood that in the following description, "circuitry" may comprise singly or in combination hardware circuitry, programmable circuitry, state machine circuitry, and/or elements capable of storing instructions executed by programmable circuitry. When an element or circuit is referred to as being "connected to" another element or circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that the two be absent intermediate elements.
Also, certain terms are used throughout the description and claims to refer to particular components. As one of ordinary skill in the art will appreciate, manufacturers may refer to a component by different names. This patent specification and the appended claims do not intend to distinguish between components that differ in name but not function.
Moreover, it is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.
Fig. 1 shows a related art display device, fig. 2 shows a signal timing diagram of a related art embodiment, and as shown in fig. 1 and fig. 2, a display device 100 includes a display array 101, a backlight unit 102, and a control circuit. The control circuit includes a timing control circuit 120 and a driving circuit 130.
The display array 101 is formed by, for example, a plurality of pixel units defined by a plurality of scanning lines and a plurality of data lines crossing each other and arranged in an array. Generally, a pixel unit mainly includes a transistor, a capacitor and a diode.
The backlight unit 102 is composed of, for example, a plurality of LEDs, and is divided into a plurality of regions.
The driving circuit 130 includes a source driving circuit 131 and a backlight driving circuit 132. The source driving circuit 131 is coupled to the data lines, and provides gray-scale display voltages to the corresponding pixel units when the pixel units of the display array 101 are turned on, so that each pixel unit stores an image signal to display an image.
The backlight driving circuit 132 is coupled to the backlight unit 102 and provides a backlight driving signal to the backlight unit 102 to control the brightness of each region of the backlight unit 102.
The timing control circuit 120 receives display data from the front end and generates a source control signal and a backlight control signal according to the display data, and the timing control circuit 120 is coupled to the source driving circuit 131 and the backlight driving circuit 132 respectively, so as to provide the source control signal to the source driving circuit 131 and provide the backlight control signal to the backlight driving circuit 132.
Specifically, the timing control circuit 120 includes a control unit 121, a display data receiving unit 122, an image data processing unit 123, a data conversion unit 124, and an area backlight processing unit 125. The control unit 121 supplies the display data received from the display data receiving unit 122 to the image data processing unit 123, and the image data processing unit 123 processes the display data to generate the source control signal and the first intermediate signal. Thereafter, the data conversion unit 124 converts the received first intermediate signal into a P2P (Peer-to-Peer) format and provides the converted first intermediate signal to the source driving circuit 131, and the area backlight processing unit 125 receives the first intermediate signal and calculates a backlight control signal according to the first intermediate signal, and provides the backlight control signal to the backlight driving circuit 132.
It can be seen that after the image data processing unit 123 generates the source control signal, the source control signal can be provided to the source driving circuit 131 only by converting the signal transmission format, and the first intermediate signal generated by the image data processing unit 123 also needs to be calculated by the regional backlight processing unit 125 to generate the backlight control signal, so that the backlight control signal has a certain delay with respect to the source control signal, which results in the mismatch between the backlight generated by the backlight unit 102 and the display effect of the display array 101.
Further, in general, the timing control circuit 120 needs to receive a complete frame of display data, needs a frame time for processing the display data, and provides the generated backlight control signal to the backlight driving circuit 132, so that there is a difference between two frames between the image displayed by the display array 101 and the backlight provided by the backlight unit 102, which causes the human eyes to see the phenomenon of smear.
Referring to fig. 2, the display data, the source control signal, the backlight control signal, the gray scale display voltage, and the backlight driving signal are respectively shown from top to bottom. From left to right are the (N-1) th frame, the (N) th frame, the (N + 1) th frame and the (N + 2) th frame, respectively. Suppose that the display data displays a black picture in the (N-1) th frame and the (N + 1) th frame, and displays a white picture in the (N) th frame and the (N + 2) th frame, the source control signal and the gray scale display voltage both display the black picture following the display data in the (N-1) th frame and the (N + 1) th frame, and display the white picture in the (N) th frame and the (N + 2) th frame, and the backlight control signal and the backlight driving signal always display the black picture due to the above delay, so that the phenomena of smear and flicker are more serious.
It will be understood by those skilled in the art that the above-mentioned "black picture" and "white picture" may refer to "a control signal for displaying a black/white picture" when used for a control signal, "a gray scale display voltage for displaying a black/white picture" when used for a gray scale display voltage, "a backlight driving signal for displaying a black/white picture" when used for a backlight driving signal, "a black/white picture" when used for the display array 101, and "a backlight providing lower/high luminance" when used for the backlight unit 102.
In view of the above, the present application provides an improved display device 200, fig. 3 shows the display device 200 of the embodiment of the present application, and fig. 4 shows a signal timing diagram of the embodiment of the present application, as shown in fig. 3 and 4, for example, the display device of the present application is selected from any one of a Mini LED display device or a Micro LED display device. The display device 200 includes a display array 101, a backlight unit 102, a graphic processing circuit 110, a timing control circuit 220, a driving circuit 130, and a connector 140.
The display array 101 is formed by, for example, a plurality of pixel units defined by a plurality of scanning lines and a plurality of data lines crossing each other and arranged in an array. Generally, a pixel unit mainly includes a transistor, a capacitor and a diode.
The backlight unit 102 is composed of, for example, a plurality of LEDs, and is divided into a plurality of regions.
The graphic processing circuit 110 is configured to provide the first display Data1 and provide the second display Data2 upon receiving the second feedback signal Fb in an active state.
The timing control circuit 220 receives the first display Data1 to generate the backlight control signal BLc, and receives the second display Data2 to generate the source control signal Sc. While the timing control circuit 220 also generates a second feedback signal Fb according to the active state of the backlight control signal BLc.
The driving circuit 130 includes, for example, a gate driving circuit (not shown), a source driving circuit 131, and a backlight driving circuit 132. The gate driving circuit is coupled to the plurality of scan lines, and generates a plurality of gate driving signals according to the gate control signal provided by the timing control circuit 220, for turning on or off the plurality of pixel units coupled to the corresponding scan lines.
The source driving circuit 131 is coupled to the timing control circuit 220 and the data lines, receives the source control signal Sc, and provides gray scale display voltages to corresponding pixel units when the pixel units are turned on, so that each pixel unit stores an image signal to display an image.
The backlight driving circuit 132 is coupled to the timing control circuit 220 and the backlight unit 102, and generates a corresponding backlight driving signal according to the received backlight control signal BLc to control the brightness of each region of the backlight unit 102.
The connector 140 is coupled between the graphic processing circuit 110 and the timing control circuit 220, and is used for transceiving data and/or signals between the graphic processing circuit 110 and the timing control circuit 220. In one possible embodiment, the connector 140 receives the first display Data1 and the second display Data2 provided by the graphic processing circuit 110, and provides the first display Data1 and the second display Data2 to the timing control circuit 220. The connector 140 also receives the first feedback signal AUX provided by the timing control circuit 220 and provides the first feedback signal AUX to the graphics processing circuit 110.
Specifically, the graphic processing circuit 110 includes a display data transmitting unit 111 and a storage unit 112. The display Data transmitting unit 111 provides the first display Data1 to the connector 140, and simultaneously stores the first display Data1 as the second display Data2 in the storage unit 112, until the graphics processing circuit 110 receives the first feedback signal AUX in the active state, the graphics processing circuit 110 provides the second display Data2 stored in the storage unit 112 to the connector 140. The first feedback signal AUX is transmitted through the auxiliary channel without occupying the bandwidth of the first display Data1 and the second display Data2. In the embodiment, the Graphics data Processing circuit is selected from a GPU (Graphics Processing Unit), and the storage Unit 112 is selected from a register.
The timing control circuit 220 includes a control unit 221, an image data processing unit 223, a data conversion unit 224, and an area backlight processing unit 225.
After receiving the first display Data1, the control unit 221 provides the first display Data1 to the area backlight processing unit 225, and the area backlight processing unit 225 processes the first display Data1 to generate a backlight control signal BLc, where the backlight control signal BLc is selected from a Serial Peripheral Interface (SPI) format, for example.
Meanwhile, the area backlight processing unit 225 provides some signal of the generated backlight control signals BLc to the control unit 221 as a second feedback signal Fb, and the control unit 221 generates the first feedback signal AUX according to the active state of the second feedback signal Fb.
When the control unit 221 receives the second display Data2, the second display Data2 is supplied to the image Data processing unit 223, processed by the image Data processing unit 223 to obtain a second intermediate, and the Data conversion unit 224 converts the second intermediate signal into the source control signal Sc in the P2P format and supplies it to the source driving circuit 131. In the present embodiment, a Chip Select (CS) signal is selected as the second feedback signal Fb.
The working flow of the display device 200 and the control circuit thereof provided by the embodiment is as follows: the display Data transmitting unit 111 supplies the first display Data1 to the connector 140 while storing the first display Data1 as the second display Data2 in the storage unit 112. The control unit 221 receives the first display Data1 provided by the connector 140, provides the first display Data1 to the area backlight processing unit 225, and the area backlight processing unit 225 processes the first display Data1 to obtain a backlight control signal BLc, provides the backlight control signal BLc to the backlight driving circuit 132, and provides a chip selection signal in the backlight control signal BLc to the control unit 221 as a second feedback signal Fb. The control unit 221 receives the second feedback signal Fb in the active state, generates a first feedback signal AUX, and supplies the first feedback signal AUX to the connector 140, and the graphic processing circuit 110 receives the first feedback signal AUX in the active state supplied from the connector 140, and supplies the second display Data2 stored in the storage unit 112 to the connector 140. The control unit 221 receives the second display Data2 provided by the connector 140, provides the second display Data2 to the image Data processing unit 223, processes the second display Data2 by the image Data processing unit 223, and provides the source control signal Sc to the source driving circuit 131 through the Data conversion unit 224.
Since the image Data processing unit 223 has a fast processing speed and requires a short time to generate the source control signal Sc according to the second display Data2, it can be considered that the source driving circuit 131 and the backlight driving circuit 132 receive the corresponding control signals synchronously and output the gray scale display voltage or the backlight driving signal simultaneously, so as to achieve the synchronous operation of the display array 101 and the backlight unit 102. Referring to fig. 4, the first display Data1, the source control signal Sc, the backlight control signal BLc, the gray scale display voltage, and the backlight driving signal are respectively shown from top to bottom. From left to right are the (N-1) th frame, the (N) th frame, the (N + 1) th frame and the (N + 2) th frame, respectively. Suppose that the first display Data1 and the second display Data2 display black pictures in the N-1 th frame and the N +1 th frame, white pictures in the N-1 th frame and the N +2 th frame, the source control signal Sc and the gray scale display voltage follow the second display Data2, the backlight control signal BLc and the backlight driving signal follow the first display Data1, black pictures in the N-1 th frame and the N +1 th frame, and white pictures in the N-N frame and the N +2 th frame, thus, the timing control circuit 220 simultaneously outputs the backlight control signal BLc and the source control signal Sc, the display array 101 and the backlight unit 102 synchronously operate, and the problems of smear, flicker and the like caused by the asynchronization of the two are effectively solved.
Specifically, taking the refresh rate of the display device as 120hz as an example, the backlight control signal in the prior art is delayed by two frame times, i.e. 16.7ms, compared to the source control signal, the source control signal in the present application is only delayed by the scanning time of several rows of the display array 101, which is in the order of microseconds and can be almost ignored, and the display array 101 and the backlight unit 102 can be considered to be synchronously operated.
To sum up, the control circuit of the display device 200 and the display device 200 provided in the present application provide the first display Data1 to the timing control circuit 220, when the timing control circuit 220 generates the backlight control signal BLc according to the first display Data1, provide the first feedback signal AUX to the graphics processing circuit 110, and the graphics processing circuit 110 provides the second display Data2 to the timing control circuit 220 according to the first feedback signal AUX in the valid state to generate the corresponding source control signal Sc, so as to ensure that the backlight control signal BLc and the source control signal Sc are output at the same time, thereby enabling the display array 101 and the backlight unit 102 to operate synchronously.
Optionally, the second feedback signal Fb is selected from a chip selection signal in the backlight control signal BLc generated by the regional backlight processing unit 225, and no additional signal is required to be added, so that the structure is simple.
Optionally, in this application, the first feedback signal AUX provided by the timing control circuit 220 is provided to the graphics processing circuit 110 through the auxiliary channel, and it is not necessary to occupy the transmission bandwidth of the display Data, and when the graphics processing circuit 110 receives the first feedback signal AUX in an active state, the second display Data2 may be immediately provided to the timing control circuit 220, which has a faster response speed.
It should be noted that the words "during", "when" and "when … …" as used herein in relation to circuit operation are not strict terms referring to actions that occur immediately at the start of a start action, but rather there may be some small but reasonable delay or delays, such as various transmission delays, between them and the reaction action (action) initiated by the start action, as will be appreciated by those of ordinary skill in the art. The words "about" or "substantially" are used herein to mean that the element value (element) has a parameter that is expected to be close to the stated value or position. However, as is well known in the art, there is always a slight deviation that makes it difficult for the value or position to be exactly the stated value. It has been well established in the art that a deviation of at least ten percent (10%) for a semiconductor doping concentration of at least twenty percent (20%) is a reasonable deviation from the exact ideal target described. When used in conjunction with a signal state, the actual voltage value or logic state (e.g., "1" or "0") of the signal depends on whether positive or negative logic is used.
In accordance with the present invention, as set forth above, these embodiments do not set forth all of the details nor limit the invention to the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, to thereby enable others skilled in the art to best utilize the invention and its various embodiments with various modifications as are suited to the particular use contemplated. The scope of the present invention should be determined by the appended claims and their equivalents.
Claims (10)
1. A control circuit for a display device, comprising:
graphics processing circuitry configured to provide first display data and to provide second display data upon receipt of a first feedback signal of an active state;
the time sequence control circuit is coupled with the graphic processing circuit, generates a backlight control signal and the first feedback signal according to the received first display data, and generates a source control signal according to the received second display data;
and the driving circuit is coupled with the time sequence control circuit, generates a corresponding backlight driving signal according to the received backlight control signal, and generates a corresponding gray scale display voltage according to the received source control signal.
2. The control circuit of claim 1, wherein the graphics processing circuit comprises:
a display data transmitting unit configured to provide the first display data and store the first display data as the second display data in a storage unit when transmitting the first display data;
a storage unit disposed in the display data transmitting unit, configured to store the second display data, and provide the second display data to the timing control circuit when the graphics processing circuit receives the first feedback signal of an active state.
3. The control circuit of claim 2, wherein the storage unit is selected from a register.
4. The control circuit of claim 2, wherein the timing control circuit comprises:
a control unit receiving the first display data and the second display data, and providing the first display data to an area backlight processing unit and the second display data to an image data processing unit;
the image data processing unit is coupled to the control unit and generates a corresponding second intermediate signal according to the received second display data;
the data conversion unit is coupled to the image data processing unit and generates the corresponding source control signal according to the second intermediate signal;
the regional backlight processing unit is coupled with the control unit and generates a corresponding backlight control signal according to the received first display data; wherein the content of the first and second substances,
the control unit receives a second feedback signal provided by the regional backlight processing unit and generates the first feedback signal according to the effective state of the second feedback signal.
5. The control circuit of claim 4, wherein the second feedback signal is selected from a chip select signal of the backlight control signal.
6. The control circuit of claim 4, wherein the drive circuit comprises:
the source electrode driving circuit is coupled with the data conversion unit and generates corresponding gray scale display voltage according to the received source electrode control signal;
and the backlight driving circuit is coupled with the regional backlight processing unit and generates a corresponding backlight driving signal according to the received backlight control signal.
7. The control circuit of claim 1, further comprising:
a connector coupled between the graphics processing circuit and the timing control circuit configured to communicate the first display data, the second display data, and the first feedback signal.
8. The control circuit of claim 7, wherein the first feedback signal is provided to the graphics processing circuit through an auxiliary channel.
9. A display device, comprising:
a control circuit according to any one of claims 1 to 8;
the display array is coupled with the source electrode driving circuit in the control circuit through a plurality of data lines and is coupled with the grid electrode driving circuit in the control circuit through a plurality of scanning lines;
the backlight unit is divided into a plurality of areas, is coupled with the backlight control circuit in the control circuit and receives the backlight driving signal to enable each area to display corresponding brightness.
10. The display device according to claim 9, wherein the display device is selected from any one of a Mini LED display device or a Micro LED display device.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222224717.7U CN218069315U (en) | 2022-08-23 | 2022-08-23 | Control circuit of display device and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222224717.7U CN218069315U (en) | 2022-08-23 | 2022-08-23 | Control circuit of display device and display device |
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| CN218069315U true CN218069315U (en) | 2022-12-16 |
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