CN218041898U - Anti-static printed circuit board and battery charging equipment - Google Patents

Anti-static printed circuit board and battery charging equipment Download PDF

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Publication number
CN218041898U
CN218041898U CN202221848003.7U CN202221848003U CN218041898U CN 218041898 U CN218041898 U CN 218041898U CN 202221848003 U CN202221848003 U CN 202221848003U CN 218041898 U CN218041898 U CN 218041898U
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circuit board
dielectric layer
layer
printed circuit
capacitor dielectric
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CN202221848003.7U
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黄天定
吕品风
刘仕臻
李斌
林娟妙
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Zhejiang Sunwoda Electronics Co Ltd
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Zhejiang Sunwoda Electronics Co Ltd
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Abstract

An anti-static printed circuit board and a battery charging apparatus, wherein the anti-static printed circuit board includes: a first circuit board layer having signal traces therein; a second circuit board layer having a ground trace therein; an electrical isolation layer located between the first circuit board layer and the second circuit board layer; a capacitor dielectric layer penetrating the electrical isolation layer, the capacitor dielectric layer having a voltage breakdown strength less than a voltage breakdown strength of the electrical isolation layer; the capacitor dielectric layer is suitable for being electrically connected with the signal routing and the grounding routing when the voltage applied to the capacitor dielectric layer is larger than the voltage breakdown strength of the capacitor dielectric layer. To sum up, the utility model provides an antistatic printed circuit board cost is lower.

Description

Anti-static printed circuit board and battery charging equipment
Technical Field
The utility model relates to an use printed circuit board technical field, concretely relates to prevent static printed circuit board and battery charging equipment.
Background
Printed Circuit Boards (PCBs) have at least one conductive pattern attached thereon and holes and slots formed therein to interconnect electronic components, which is the basis of almost all electronic products. Generally, if electronic components are present in a device, they are also integrated on printed circuit boards of various sizes.
The printed circuit board can generate static electricity in the using process, the static electricity can influence the reliability of signal transmission, when the static electricity is accumulated to a certain degree, a discharging phenomenon can occur, and the static electricity discharging can cause circuit elements to be punctured, so that the circuit elements are out of work, and the integral performance of the printed circuit board is influenced.
The existing printed circuit board is usually added with an anti-static discharge element to realize the anti-static effect, but the method needs to additionally increase the anti-static discharge circuit element, and also needs to increase the length and the design area of the printed circuit board to increase the cost.
In summary, the anti-esd cost of the current pcb is high.
SUMMERY OF THE UTILITY MODEL
Therefore, the technical problem to be solved by the present invention is to overcome the defect of high cost of the anti-static discharge of the printed circuit board in the prior art, so as to provide an anti-static printed circuit board and a battery charging device.
The utility model provides a prevent static printed circuit board, include: a first circuit board layer having signal traces therein; a second circuit board layer having a ground trace therein; an electrical isolation layer located between the first circuit board layer and the second circuit board layer; a capacitor dielectric layer penetrating the electrical isolation layer, the capacitor dielectric layer having a voltage breakdown strength less than a voltage breakdown strength of the electrical isolation layer; the capacitor dielectric layer is suitable for being electrically connected with the signal wire and the grounding wire when the voltage applied to the capacitor dielectric layer is larger than the voltage breakdown strength of the capacitor dielectric layer.
Optionally, the voltage breakdown strength of the electrical isolation layer is greater than or equal to 3.6 times the voltage breakdown strength of the capacitor dielectric layer.
Optionally, the voltage breakdown strength of the capacitor dielectric layer is 5kV/mm-600kV/mm.
Optionally, the capacitor dielectric layer includes a barium titanate dielectric layer, a calcium titanate dielectric layer, or a strontium titanate dielectric layer.
Optionally, the thickness of the electrical isolation layer is 20 μm to 1000 μm; the thickness of the capacitance dielectric layer is 20-1000 μm.
Optionally, the capacitor dielectric layer has a lateral dimension of 50 μm to 3000 μm.
Optionally, the method further includes: a first electrically conductive member extending through the electrically insulating layer; a second electrically conductive member extending through the electrically insulating layer, the second electrically conductive member being spaced apart from the first electrically conductive member; the capacitor dielectric layer is positioned between the first conductive piece and the second conductive piece, and the first conductive piece and the second conductive piece are both connected with the side wall of the capacitor dielectric layer; one end of the first conductive piece is connected with the signal wire, and the other end of the first conductive piece is spaced from the grounding wire; one end of the second conductive piece is connected with the grounding wire, and the other end of the second conductive piece is spaced from the signal wire.
Optionally, the first conductive piece is a copper conductive piece, a graphene conductive piece or a silver conductive piece; the second conductive piece is a copper conductive piece, a graphene conductive piece or a silver conductive piece.
The utility model also provides a battery charging equipment, including the aforesaid prevent static printed circuit board.
The utility model discloses technical scheme has following advantage:
the utility model provides a prevent static printed circuit board, include: a first circuit board layer having signal traces therein; a second circuit board layer having a ground trace therein; an electrical isolation layer located between the first circuit board layer and the second circuit board layer; a capacitor dielectric layer penetrating the electrical isolation layer, the capacitor dielectric layer having a voltage breakdown strength less than a voltage breakdown strength of the electrical isolation layer; the capacitor dielectric layer is suitable for being electrically connected with the signal routing and the grounding routing when the voltage applied to the capacitor dielectric layer is larger than the voltage breakdown strength of the capacitor dielectric layer. Because the voltage breakdown strength of the capacitance dielectric layer is smaller than that of the electric isolation layer, when the signal wiring is subjected to larger electrostatic voltage, the capacitance dielectric layer is broken down, so that the current of electrostatic discharge is led out and discharged through the grounding wiring through the capacitance dielectric layer, and the damage to other elements of the anti-static printed circuit board is avoided. When the signal wiring is subjected to low electrostatic voltage, the capacitance dielectric layer cannot be broken down, and the capacitance dielectric layer can isolate the grounding wiring and the signal wiring. The capacitor dielectric layer penetrates through the electric isolation layer, the anti-static discharge effect is achieved on the basis that the anti-static discharge element is not added, the length and the design area of the printed circuit board do not need to be additionally increased, and the cost is effectively reduced. To sum up, the utility model provides an antistatic printed circuit board cost is lower.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following descriptions are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a sectional view of a front view of an antistatic printed circuit board according to an embodiment of example 1 of the present invention;
fig. 2 is a sectional view of a front view of an antistatic printed circuit board according to another embodiment of example 1 of the present invention;
fig. 3 is a sectional view of a front view of an antistatic printed circuit board according to an embodiment of example 2 of the present invention;
fig. 4 is a sectional view of a front view of an antistatic printed circuit board according to another embodiment of example 2 of the present invention.
Detailed Description
The technical solutions of the present invention will be described more clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts all belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood as a specific case by those skilled in the art.
Furthermore, the technical features mentioned in the different embodiments of the invention described below can be combined with each other as long as they do not conflict with each other.
Example 1
One embodiment of the electrostatic discharge prevention printed circuit board shown in fig. 1 includes: a first circuit board layer 200, wherein the first circuit board layer 200 has signal traces 201 therein; a second circuit board layer 300, the second circuit board layer 300 having a ground trace 301 therein; an electrically isolating layer 100 located between said first circuit board layer 200 and said second circuit board layer 300; a capacitor dielectric layer 101 penetrating the electrically isolated layer 100, a voltage breakdown strength of the capacitor dielectric layer 101 being less than a voltage breakdown strength of the electrically isolated layer 100; the capacitance dielectric layer 101 is suitable for being electrically connected with the signal trace 201 and the grounding trace 301 when the voltage applied to the capacitance dielectric layer 101 is greater than the voltage breakdown strength of the capacitance dielectric layer 101.
Because the voltage breakdown strength of the capacitance dielectric layer 101 is smaller than that of the electrical isolation layer 100, when the signal trace 201 is subjected to a larger electrostatic voltage, the capacitance dielectric layer 101 is broken down, so that the current of electrostatic discharge is led out and discharged through the capacitance dielectric layer 101 via the grounding trace 301, thereby avoiding damage to other elements of the anti-static printed circuit board. When the signal trace 201 is subjected to a small electrostatic voltage, the capacitance dielectric layer 101 is not broken down, and the capacitance dielectric layer 101 can isolate the grounding trace 301 from the signal trace 201. The capacitor dielectric layer 101 penetrates through the electric isolation layer 100, so that the anti-static discharge effect is realized on the basis of not increasing an anti-static discharge element, the length and the design area of the printed circuit board do not need to be additionally increased, and the cost is effectively reduced. To sum up, the utility model provides an antistatic printed circuit board cost is lower.
In one embodiment, the voltage breakdown strength of the electrically isolating layer is greater than or equal to 3.6 times the voltage breakdown strength of the capacitor dielectric layer. If the voltage breakdown strength of the electrical isolation layer is less than 3.6 times of the voltage breakdown strength of the capacitance dielectric layer, the signal trace 201 and the grounding trace 301 of the anti-static printed circuit board are easily conducted to form a short circuit state, which affects the working state of the signal trace 201.
In one embodiment, the dielectric layer 101 has a breakdown voltage of 5kV/mm-600kV/mm, such as 10kV/mm, 50kV/mm, 200kV/mm, or 400kV/mm. When the voltage breakdown strength of the capacitor dielectric layer 101 is less than 5kV/mm, the signal trace 201 and the ground trace 301 of the anti-static printed circuit board are easily conducted to form a short circuit state, which affects the working state of the signal trace 201; when the voltage breakdown strength of the capacitor dielectric layer 101 is greater than 600kV/mm, the capacitor dielectric layer 101 cannot be effectively broken down after the signal trace 201 bears a large electrostatic voltage, and the electrostatic current cannot be led out of the anti-static printed circuit board through the grounding trace 301, so that the electrostatic voltage may damage the anti-static printed circuit board.
In one embodiment, the capacitor dielectric layer 101 includes a barium titanate dielectric layer, a calcium titanate dielectric layer, or a strontium titanate dielectric layer. In other embodiments, the capacitor dielectric layer 101 may be another capacitor dielectric layer.
In one embodiment, if the thickness of the electrical isolation layer 100 is 20 μm to 1000 μm, for example: 100 μm, 200 μm, 300 μm or 500 μm; the thickness of the capacitance dielectric layer 101 is 20 μm to 1000 μm, for example: 100 μm, 200 μm, 300 μm or 500 μm. In this embodiment, the thicknesses of the electrical isolation layer 100 and the capacitor dielectric layer 101 are the same. If the thickness of the capacitor dielectric layer 101 is less than 20 μm, the signal trace 201 and the ground trace 301 of the anti-static printed circuit board are easily conducted to form a short circuit state, which affects the working state of the signal trace 201; if the thickness of the capacitor dielectric layer 101 is greater than 1000 μm, the capacitor dielectric layer 101 cannot be effectively broken down after the signal trace 201 bears a large static voltage, and the static current cannot be led out of the anti-static printed circuit board through the grounding trace 301, so that the static voltage may damage the anti-static printed circuit board, and in addition, if the thickness of the capacitor dielectric layer 101 is greater than 1000 μm, parasitic capacitance is more easily generated on two sides of the capacitor dielectric layer 101, which affects the performance of the anti-static printed circuit board.
In one embodiment, the capacitor dielectric layer 101 has a lateral dimension of 50 μm to 3000 μm, for example: 500 μm, 1500 μm, 2000 μm or 2500 μm. If the transverse dimension of the capacitance dielectric layer 101 is less than 50 μm, the signal trace 201 and the grounding trace 301 of the anti-static printed circuit board are easily conducted to form a short circuit state, which affects the working state of the signal trace 201; if the lateral dimension of the capacitor dielectric layer 101 is larger than 3000 μm, parasitic capacitance is easily generated on both sides of the capacitor dielectric layer 101, which affects the performance of the anti-static printed circuit board.
In one embodiment, the conduction path of the esd current is directly led out of the esd protection pcb from the ground trace 301 from the signal trace 201 directly to the capacitor dielectric layer 101.
In another embodiment, the structure of the anti-static pcb is shown in fig. 2, wherein the electrical isolation layer 100 is composed of an insulation layer 1001 and an insulation layer 1003 which are stacked, a functional layer 1002 is disposed between the insulation layer 1001 and the insulation layer 1003, and the capacitor dielectric layer 101 penetrates through the insulation layer 1001, the functional layer 1002 and the insulation layer 1003; the material of the capacitor dielectric layer 101 may be selected based on the voltage breakdown strength and the thickness of the capacitor dielectric layer 101. In other embodiments, the electrical isolation layer 100 may be formed by stacking more insulation layers, and a functional layer is disposed between adjacent insulation layers.
Example 2
One embodiment of the electrostatic discharge prevention printed circuit board shown in fig. 3 includes: a first circuit board layer 200, wherein the first circuit board layer 200 has signal traces 201 therein; a second circuit board layer 300, the second circuit board layer 300 having a ground trace 301 therein; an electrically isolating layer 100 located between said first circuit board layer 200 and said second circuit board layer 300; the voltage breakdown strength of the electric isolation layer is greater than or equal to 3.6 times of the voltage breakdown strength of the capacitance dielectric layer 101 penetrating through the electric isolation layer 100; one end of the capacitor dielectric layer 101 is in contact with the signal trace 201, and the other end of the capacitor dielectric layer 101 is in contact with the grounding trace 301; a first electrically conductive member 102 extending through the electrically isolating layer 100; a second conductive member 103 penetrating the electrical isolation layer 100. The second conductive member 103 is spaced apart from the first conductive member 102; the capacitor dielectric layer 101 is located between the first conductive piece 102 and the second conductive piece 103, and both the first conductive piece 102 and the second conductive piece 103 are connected with the side wall of the capacitor dielectric layer 101; one end of the first conductive member 102 is connected to the signal trace 201, and the other end of the first conductive member 102 is spaced from the ground trace 301; one end of the second conductive member 103 is connected to the ground trace 301, and the other end of the second conductive member 103 is spaced from the signal trace 201.
When the signal trace 201 is subjected to the electrostatic voltage, the capacitance dielectric layer 101 is broken down, and the electrostatic discharge current is conducted out for discharge from the signal trace 201 to the first conductive member 102, through the capacitance dielectric layer 101 to the second conductive member 103, and then through the grounding trace 301, so as to avoid damaging other elements of the anti-electrostatic printed circuit board. The capacitor dielectric layer 101 penetrates through the electric isolation layer 100, so that the anti-static discharge effect is realized on the basis of not increasing an anti-static discharge element, the length and the design area of the printed circuit board do not need to be additionally increased, and the cost is effectively reduced. To sum up, the utility model provides an antistatic printed circuit board cost is lower.
In one embodiment, the capacitor dielectric layer 101 penetrating through the electrical isolation layer 100 is formed by first forming the capacitor dielectric layer 101 after the electrical isolation layer 100 passes through the mechanical via. In other embodiments, the vias may be made by other methods.
In one embodiment, the first conductive member 102 is a copper conductive member, a graphene conductive member, or a silver conductive member; the second conductive member 103 is a copper conductive member, a graphene conductive member, or a silver conductive member. In other embodiments, the first conductive member 102 may be another conductive member and the second conductive member 103 may be another conductive member.
In one embodiment, the dielectric layer 101 has a breakdown voltage of 5kV/mm-600kV/mm, such as 10kV/mm, 50kV/mm, 200kV/mm, or 400kV/mm.
In one embodiment, the capacitor dielectric layer 101 includes a barium titanate dielectric layer, a calcium titanate dielectric layer, or a strontium titanate dielectric layer. In other embodiments, the capacitor dielectric layer 101 may be another capacitor dielectric layer.
In one embodiment, if the thickness of the electrical isolation layer 100 is 20 μm to 1000 μm, for example: 100 μm, 200 μm, 300 μm or 500 μm.
In one embodiment, the capacitor dielectric layer 101 has a lateral dimension of 50 μm to 3000 μm, for example: 500 μm, 1500 μm, 2000 μm or 2500 μm.
In another embodiment, as shown in fig. 4, the structure of the anti-static pcb is that the electrical isolation layer 100 is composed of an insulation layer 1001 and an insulation layer 1003, a functional layer 1002 is disposed between the insulation layer 1001 and the insulation layer 1003, the first conductive component 102 penetrates through the insulation layer 1001, the functional layer 1002 and the insulation layer 1003, and the second conductive component 103 penetrates through the insulation layer 1001, the functional layer 1002 and the insulation layer 1003. In other embodiments, the electrical isolation layer 100 may be formed by stacking more insulation layers, and a functional layer is disposed between adjacent insulation layers.
Example 3
The present embodiment provides a battery charging apparatus including the antistatic printed circuit board provided in embodiment 1 or embodiment 2.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications can be made without departing from the scope of the invention.

Claims (9)

1. An antistatic printed circuit board, comprising:
a first circuit board layer having signal traces therein;
a second circuit board layer having a ground trace therein;
an electrical isolation layer located between the first circuit board layer and the second circuit board layer;
a capacitor dielectric layer penetrating the electrical isolation layer, the capacitor dielectric layer having a voltage breakdown strength less than a voltage breakdown strength of the electrical isolation layer;
the capacitor dielectric layer is suitable for being electrically connected with the signal wire and the grounding wire when the voltage applied to the capacitor dielectric layer is larger than the voltage breakdown strength of the capacitor dielectric layer.
2. The antistatic printed circuit board of claim 1, wherein the voltage breakdown strength of the electrical isolation layer is greater than or equal to 3.6 times the voltage breakdown strength of the capacitive dielectric layer.
3. The antistatic printed circuit board of claim 1, wherein the voltage breakdown strength of the capacitive dielectric layer is 5kV/mm to 600kV/mm.
4. The antistatic printed circuit board of claim 1, wherein the capacitor dielectric layer comprises a barium titanate dielectric layer, a calcium titanate dielectric layer, or a strontium titanate dielectric layer.
5. The antistatic printed circuit board of claim 1, wherein the thickness of the electrical isolation layer is 20 μ ι η -1000 μ ι η; the thickness of the capacitance dielectric layer is 20-1000 μm.
6. The antistatic printed circuit board of claim 1, wherein the capacitor dielectric layer has a lateral dimension of 50 μm to 3000 μm.
7. The antistatic printed circuit board of claim 1, further comprising: a first electrically conductive member extending through the electrically insulating layer; a second conductive member penetrating the electrical isolation layer, the second conductive member being spaced apart from the first conductive member;
the capacitor dielectric layer is positioned between the first conductive piece and the second conductive piece, and the first conductive piece and the second conductive piece are both connected with the side wall of the capacitor dielectric layer;
one end of the first conductive piece is connected with the signal wire, and the other end of the first conductive piece is spaced from the grounding wire; one end of the second conductive piece is connected with the grounding wire, and the other end of the second conductive piece is spaced from the signal wire.
8. The antistatic printed circuit board of claim 7, wherein the first conductive member is a copper conductive member, a graphene conductive member or a silver conductive member; the second conductive piece is a copper conductive piece, a graphene conductive piece or a silver conductive piece.
9. A battery charging apparatus comprising the antistatic printed circuit board according to any one of claims 1 to 8.
CN202221848003.7U 2022-07-15 2022-07-15 Anti-static printed circuit board and battery charging equipment Active CN218041898U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221848003.7U CN218041898U (en) 2022-07-15 2022-07-15 Anti-static printed circuit board and battery charging equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221848003.7U CN218041898U (en) 2022-07-15 2022-07-15 Anti-static printed circuit board and battery charging equipment

Publications (1)

Publication Number Publication Date
CN218041898U true CN218041898U (en) 2022-12-13

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202221848003.7U Active CN218041898U (en) 2022-07-15 2022-07-15 Anti-static printed circuit board and battery charging equipment

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