CN217934203U - FP (Fabry-Perot) covering layer structure for improving antenna performance of chip - Google Patents
FP (Fabry-Perot) covering layer structure for improving antenna performance of chip Download PDFInfo
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- CN217934203U CN217934203U CN202222014614.8U CN202222014614U CN217934203U CN 217934203 U CN217934203 U CN 217934203U CN 202222014614 U CN202222014614 U CN 202222014614U CN 217934203 U CN217934203 U CN 217934203U
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Abstract
The utility model discloses an improve FP overburden structure of chip antenna performance, parallel and do not have the top of sheltering from the cover at the chip antenna, and there is clearance between the chip antenna, FP overburden structure divides the FSS unit that a plurality of horizontal arrays were arranged, and every FSS unit includes from bottom to top sets gradually and closely laminating FSS layer and ABS casing layer, the FSS layer includes the medium base plate and sets up in the copper-clad surface of medium base plate top, and the copper-clad of every FSS unit all is provided with 1 axisymmetric structure's fretwork "cross" word hole region on the surface, and "cross" word hole region that all FSS units set up is the same. The utility model discloses when improving chip antenna gain, can further reduce the product section height, reduce the degree of difficulty of mounting process and installation accuracy, be favorable to reducing product cost.
Description
Technical Field
The utility model belongs to the technical field of the antenna, concretely relates to improve FP overburden structure of chip antenna performance.
Background
In the prior art, for part of commercial radar chips, antennas are integrated on the surface of a chip on a PCB board, which is called a chip antenna, but due to the limitations of size and materials, such chip antennas generally have the defects of low gain and efficiency. Under the trend of circuit miniaturization, the utilization rate of the chip antenna is higher and higher, but the performance of the commercial chip antenna cannot be applicable to all scenes, and in some application scenes, the gain and beam coverage of the chip antenna cannot meet the use requirements, but the structure of the chip antenna cannot be changed, so that some structural designs need to be made on the periphery of the chip in order to improve the relevant gain of the chip antenna, and the main structure is as follows:
1. the size of the PCB is increased, the PCB is used as an external reflector of the chip antenna, backward radiation of the chip antenna is reflected to the forward direction and is superposed with the forward radiation, and therefore the directionality of the chip antenna is improved, and the larger the area of the reflector is, the higher the gain is;
2. a dielectric lens is added above the chip antenna, the phase of incident waves is changed by changing the thickness of media at different positions of the dielectric lens, so that energy convergence is realized, and the gain is improved;
3. the metal horn is loaded, and uniform phase wavefront is generated on a larger caliber by changing the flaring and the height of the metal horn, so that higher directionality is obtained, and the gain is improved;
however, the above structure has the following disadvantages while improving the gain:
1. when the gain of the chip antenna is improved by using the PCB, the gain is in direct proportion to the area of the PCB, the larger the area is, the higher the gain is, but the larger the area is, the larger the overall dimension of a product is caused by the increase of the area, and under the condition that the appearance of the product is limited, the more limited the PCB improves the gain of the chip antenna weakly;
2. when the medium lens is used for improving the gain, the thicknesses of media at different positions are required to be adjusted to adjust the phase to achieve equal-phase wavefront radiation, and the defect that the thickness of the medium lens is thick generally, so that the section height and the weight of a product are increased;
3. when the metal horn is used for improving the gain, the caliber of the chip antenna is gradually changed to a larger caliber of the horn, uniform caliber distribution is obtained on the horn mouth, the longer the horn is, the more uniform the caliber distribution is under the condition of the same caliber, and the gain of the chip antenna is in direct proportion to the caliber, so that a larger metal horn is needed for improving the gain, and the defects that the size of a product is increased and the weight of the product is increased are overcome.
Aiming at the defects of the structure, the metamaterial planar lens can be loaded, a certain number of metamaterial units are distributed above the chip antenna at a certain distance by utilizing the low transmission loss and the phase delay function of the metamaterial structure to electromagnetic waves, and the phase is compensated by each unit, so that the phase above the planar lens is uniformly distributed, a planar wave is formed, and the gain is improved. However, when the gain is increased by using a metamaterial planar lens, in order to achieve a wider phase adjustment range, the planar lens is generally composed of three or more layers, a low-dielectric-constant and low-loss material is suspended or filled between the layers, and each layer needs to be aligned precisely, so that great difficulty is brought to the mounting process and the mounting precision of a product, and the control of the product cost is not facilitated.
SUMMERY OF THE UTILITY MODEL
The technical purpose is as follows: to the problem that exists among the prior art, the utility model discloses an improve FP overburden structure of chip antenna performance when improving chip antenna gain, can further reduce the product section height, reduces the degree of difficulty of installation technology and installation accuracy, is favorable to reducing product cost.
The technical scheme is as follows: in order to achieve the technical purpose, the utility model adopts the following technical scheme:
the utility model provides an improve FP overburden structure of chip antenna performance which characterized in that: the FP covering layer structure is parallel to and covers the chip antenna without shielding, and a clearance exists between the FP covering layer structure and the chip antenna;
the FP covering layer structure is divided into a plurality of FSS units which are horizontally arrayed, each FSS unit comprises an FSS layer and an ABS shell layer which are sequentially arranged from bottom to top and are tightly attached, each FSS layer comprises a dielectric substrate and a copper-coated surface arranged above the dielectric substrate, the copper-coated surface of each FSS unit is provided with 1 hollow cross-shaped hole area with an axisymmetric structure, and the cross-shaped hole areas arranged on all the FSS units are the same.
Preferably: the clearance H between the FP cover structure and the chip antenna is determined by the following equation:
wherein the content of the first and second substances,
the phase is reflected by the PCB board where the chip antenna is located,
reflecting phase for FP covering layer structure, N is random design parameter, N is integer, and its value ensures H>And 0 and lambda is the wavelength of the central working frequency of the chip antenna.
Preferably: the random design parameter N takes 0.
Preferably: the width a of each side of the cross in the cross hole area, the length b of each side of the cross in the cross hole area and the side length p of the horizontal cross section of each FSS unit meet the condition that the reflection amplitude of each FSS unit is more than 0.9.
Preferably: the width a of each side of the cross in the cross hole area, the length b of each side of the cross in the cross hole area and the side length p of the horizontal cross section of each FSS unit satisfy that: b is less than or equal to p-0.12mm, and a is less than or equal to 0.12mm and less than b.
Preferably, the side length of the horizontal cross section of the FSS unit is 1/2 of the wavelength of the central operating frequency of the chip antenna.
Has the beneficial effects that: compared with the prior art, the utility model discloses following beneficial effect has:
compared with the gain improvement by increasing the PCB, the FP covering layer structure of the utility model can improve the gain of the chip antenna without changing the size of the PCB, and the gain improvement efficiency is higher; compared with the method of additionally arranging a dielectric lens and a metal loudspeaker, the gain is improved, the section height and the weight of the product can be greatly reduced, and the miniaturization of the product is facilitated; compared with a loaded metamaterial planar lens, the chip antenna gain is improved, the product section height can be further reduced, the difficulty of the mounting process and the mounting precision can be reduced, and the product cost can be reduced.
Drawings
FIG. 1 is a schematic diagram of the FP cover layer structure and its position relationship with the chip antenna according to the present invention;
FIG. 2 is a schematic diagram of an FSS layer in the FP cladding structure of the present invention;
FIG. 3 is a schematic diagram of FSS cells in the FP blanket structure of the present invention;
FIG. 4 is a comparison graph of the gain direction of the E-plane of the chip antenna at 60.5GHz before and after loading the FP cover layer structure of the present invention;
FIG. 5 is a comparison graph of the gain direction of the H-plane of the chip antenna at 60.5GHz before and after loading the FP cover layer structure of the present invention;
wherein, FSS layer 1, ABS casing layer 2, chip antenna 3, copper-clad surface 11, "cross" hole region 12.
Detailed Description
The present invention will be described and explained in detail with reference to the drawings and examples.
The utility model discloses an improve FP overburden structure of chip antenna performance, as shown in FIG. 1, FP overburden structure parallel cover is in chip antenna 3's top, and chip antenna 3 between have certain clearance, there is not sheltering from between FP overburden structure and the chip antenna 3. The clearance between the FP cover structure and the chip antenna 3 is phase reflected by the PCB
And FP cladding structure reflection phase
Determined by the following formula:
wherein, the PCB board reflects the phase
Fixed at 180 deg., and random design parameter N is integer and its value guarantees H>0, typically the random design parameter N takes 0.
The embodiment of the utility model provides an in the embodiment set up FP overburden structure reflection phase place
At 168 deg., the clearance H is about lambda/2, lambda being the wavelength of the central operating frequency of the chip antenna 3.
The FP cover layer structure and the PCB plate where the chip antenna 3 is located form a Fabry-Perot resonant cavity, and the chip antenna 3 is used as a feed source. The Fabry-Perot resonant cavity generally utilizes the interaction of an upper reflecting plate and a lower reflecting plate (namely a PCB (printed circuit board) and an FP (Fabry-Perot) covering layer structure), so that electromagnetic waves radiated by a feed source (namely the chip antenna 3) are reflected for multiple times in the resonant cavity formed by the two reflecting plates, and then the electromagnetic waves are transmitted from the center to the periphery (the reflection and transmission routes of the electromagnetic waves are shown by dotted arrows in figure 1), and the radiation caliber of the chip antenna 3 is effectively increased; and after the electromagnetic waves are reflected by the PCB and part of the FP covering layer structure and are transmitted in the resonant cavity body by a certain transmission path, the electromagnetic waves transmitted from the resonant cavity body can realize in-phase superposition, so that the gain of the chip antenna 3 is improved.
As shown in fig. 1, FP overburden structure includes FSS (Frequency Selective Surface) periodic structure single face copper-clad plate (FSS layer for short hereinafter) 1 and the general engineering plastics ABS (acrylonitrile-butadiene-styrene copolymer) casing layer 2 that is located FSS layer 1 top, closely laminates between FSS layer 1 and the ABS casing layer 2, in an embodiment of the utility model, adopt non-setting adhesive water to bond FSS layer 1 and ABS casing layer 2, or adopt relevant mechanical structure spare to fix FSS layer 1 and ABS casing layer 2. Wherein:
to reduce dielectric loss, the thickness of the FSS layer 1 is as thin as possible;
the thickness of the ABS housing layer 2 is selected to be as small as possible while ensuring strength, which reduces transmission losses.
As shown in fig. 2, the FSS layer 1 includes a dielectric substrate and a copper-clad surface 11 disposed above the dielectric substrate, wherein a plurality of identical hollow cross-hole regions 12 are disposed in the copper-clad surface 11, and the cross-hole regions 12 are of an axisymmetric structure. As shown in fig. 3, a is the width of each side of the cross in the cross area 12, and b is the length of each side of the cross in the cross area 12.
The FP covering layer structure can be divided into a plurality of FSS units which are arrayed in a horizontal plane, as shown in FIG. 3, p is the side length of the horizontal cross section of each FSS unit, so each FSS unit also comprises an FSS layer 1 and an ABS shell layer 2 positioned above the FSS layer 1, the FSS layer 1 of each FSS unit also comprises a dielectric substrate and a copper-coated surface 11 arranged above the dielectric substrate, 1 cross-shaped hole area 12 is arranged on the copper-coated surface 11 of each FSS unit, and the cross-shaped hole areas 12 arranged on the copper-coated surfaces 11 of all the FSS units are the same.
The width a of each side of the cross in the cross hole region 12, the length b of each side of the cross in the cross hole region 12 and the side length p of the horizontal cross section of each FSS unit determine the reflection amplitude of each FSS unit, the reflection amplitude refers to the ratio of electromagnetic waves reflected by the FSS units to incident electromagnetic waves, and when the reflection amplitude is more than 0.9, the high gain characteristic of the chip antenna 3 can be ensured. In general, the wavelength of the central operating frequency of the chip antenna 3 with the side length of the horizontal cross section of the FSS unit being 1/2 is designed, and for the sake of processing precision, the width a of each side of the cross in the cross hole region 12 and the length b of each side of the cross in the cross hole region 12 also satisfy:
b≤p-0.12mm
0.12mm≤a<b
examples
The embodiment provides an FP covering layer structure for improving the antenna performance of a chip, the FP covering layer structure is used in a millimeter wave frequency band, an FR4 board is selected as a dielectric substrate of an FSS layer 1, and the size of the FR4 board is 27mm multiplied by 0.07mm; the general engineering plastic ABS shell layer 2 on the top of the FSS layer 1 is 27mm multiplied by 1mm in size; and the FSS layer 1 and the ABS shell layer 2 are bonded by using a proper amount of self-adhesive water. The FP cover structure is 2.4mm in height from the chip antenna 3. The FP cladding layer structure in this embodiment comprises 19 × 19 FSS cells, each FSS cell having a square horizontal cross section with a side length of p =1.4mm, and the "cross" of the "cross hole region 12 in each FSS cell has a length b =1mm and a width a =0.5mm.
Fig. 4 is a comparison diagram of gain directions of the E surface of the chip antenna at 60.5GHz before and after loading the FP capping layer structure in this embodiment, where a solid line represents loading the FP capping layer structure in this embodiment, and a dotted line represents loading the FP capping layer structure in this embodiment; fig. 5 is a comparison diagram of gain directions of the H-plane of the chip antenna at 60.5GHz before and after loading the FP capping layer structure in this embodiment, where a solid line represents loading the FP capping layer structure in this embodiment, and a dotted line represents loading the FP capping layer structure in this embodiment. As can be seen from fig. 4 and 5, after the FP cladding layer structure of the present embodiment is loaded, the gain of the chip antenna at 60.5GHz is increased from 7dB to 18.7dB, the beam width of the e plane is narrowed from 134 ° to 18.4 °, and the beam width of the H plane is narrowed from 57 ° to 14.3 °, so as to verify the effectiveness of the FP cladding layer structure of the present embodiment.
The above description is only a preferred embodiment of the present invention, and it should be noted that: for those skilled in the art, without departing from the principle of the present invention, a plurality of modifications and decorations can be made, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (6)
1. The utility model provides an improve FP overburden structure of chip antenna performance which characterized in that: the FP covering layer structure is parallel to and covers the chip antenna (3) without shielding, and a clearance exists between the FP covering layer structure and the chip antenna (3);
the FP covering layer structure is divided into a plurality of FSS units which are horizontally arrayed, each FSS unit comprises an FSS layer (1) and an ABS shell layer (2), the FSS layer (1) and the ABS shell layer are sequentially arranged from bottom to top and are tightly attached to each other, each FSS layer (1) comprises a medium substrate and a copper-coated surface (11) arranged above the medium substrate, hollow cross-shaped hole regions (12) with 1 axisymmetric structure are arranged on the copper-coated surface (11) of each FSS unit, and the cross-shaped hole regions (12) arranged on all the FSS units are the same.
2. The FP cover layer structure according to claim 1, characterized in that: the clearance H between the FP cover structure and the chip antenna (3) is determined by the following formula:
wherein the content of the first and second substances,
the phase is reflected by the PCB board where the chip antenna (3) is positioned,
reflecting phase for FP covering layer structure, N is random design parameter, N is integer, and its value ensures H>0 and lambda is the wavelength of the central working frequency of the chip antenna (3).
3. The FP cover layer structure according to claim 2, characterized in that: the random design parameter N takes 0.
4. The FP cover layer structure according to claim 1, characterized in that: the width a of each side of the cross in the cross hole region (12), the length b of each side of the cross in the cross hole region (12) and the side length p of the horizontal cross section of each FSS unit meet the condition that the reflection amplitude of each FSS unit is more than 0.9.
5. The FP cover layer structure for improving the antenna performance of a chip according to claim 4, wherein: the width a of each side of the cross in the cross hole area (12), the length b of each side of the cross in the cross hole area (12) and the side length p of the horizontal cross section of each FSS unit satisfy that: b is less than or equal to p-0.12mm, and a is less than or equal to 0.12mm and less than b.
6. The FP cover layer structure of claim 5, wherein the FP layer structure is characterized in that: the side length of the horizontal cross section of the FSS unit is 1/2 of the wavelength of the central working frequency of the chip antenna (3).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222014614.8U CN217934203U (en) | 2022-08-01 | 2022-08-01 | FP (Fabry-Perot) covering layer structure for improving antenna performance of chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222014614.8U CN217934203U (en) | 2022-08-01 | 2022-08-01 | FP (Fabry-Perot) covering layer structure for improving antenna performance of chip |
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| Publication Number | Publication Date |
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| CN217934203U true CN217934203U (en) | 2022-11-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202222014614.8U Active CN217934203U (en) | 2022-08-01 | 2022-08-01 | FP (Fabry-Perot) covering layer structure for improving antenna performance of chip |
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- 2022-08-01 CN CN202222014614.8U patent/CN217934203U/en active Active
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