CN217904098U - Equipment state monitoring device and state monitoring terminal - Google Patents

Equipment state monitoring device and state monitoring terminal Download PDF

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Publication number
CN217904098U
CN217904098U CN202221344387.9U CN202221344387U CN217904098U CN 217904098 U CN217904098 U CN 217904098U CN 202221344387 U CN202221344387 U CN 202221344387U CN 217904098 U CN217904098 U CN 217904098U
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power
circuit
state
interface
data acquisition
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CN202221344387.9U
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陈昱
陶金晶
佘芳
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GE Precision Healthcare LLC
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GE Precision Healthcare LLC
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Abstract

The embodiment of the application provides a device state monitoring device and a state monitoring terminal. The device includes: the power-on detection circuit is connected with a physical interface of the monitored equipment and detects the power-on state of the physical interface in real time; the control circuit is connected with the power-on detection circuit and is used for controlling the power supply of the equipment state monitoring device according to the power-on state; and the first power supply circuit is connected with the power-on detection circuit and the control circuit and is used for supplying power to the power-on detection circuit and the control circuit. According to the embodiment of the application, the integrity of the monitoring data of the equipment state monitoring device can be ensured, and the reliability of the equipment state monitoring device is improved.

Description

Equipment state monitoring device and state monitoring terminal
Technical Field
The embodiment of the application relates to the technical field of equipment monitoring, in particular to an equipment state monitoring device and a state monitoring terminal.
Background
During use of a device, it is necessary to monitor its use to analyze the use of the device to predict the maintenance needs of the device. When the monitoring device is used to monitor the state of the equipment, especially when the monitoring device is powered by a power supply such as a battery, the monitoring device needs to be powered on or off according to the power on/off state of the equipment in order to reduce power consumption.
Taking the monitored device as the medical device as an example, the monitoring apparatus may determine the power-on state or the power-off state of the medical device according to the video signal of the medical device. For example, when the medical device has video signal output, it is determined that the medical device is in a power-on state; and when the medical equipment does not output the video signal, judging that the medical equipment is in the power-off state. The monitoring device can perform the action of starting up or shutting down according to the on-off state of the medical equipment.
It should be noted that the above background description is only for the convenience of clear and complete description of the technical solutions of the present application and for the understanding of those skilled in the art.
SUMMERY OF THE UTILITY MODEL
The inventor finds that the scheme of judging the on-off state of the monitored device according to the video signal of the monitored device has some limitations. For example, after the monitoring device enters a shutdown process, its video driver is turned off. Therefore, the monitoring device cannot detect whether the monitored equipment outputs the video signal in the process, and therefore whether the on-off state of the monitored equipment is changed or not cannot be judged through the video signal. If the monitored device is restarted after the monitoring device enters the shutdown process, the monitoring device cannot enter the working state in time according to the restarting action of the monitored device, and accordingly monitoring data is lost.
In view of at least one of the above technical problems, an embodiment of the present application provides an apparatus state monitoring device and a state monitoring terminal.
According to an aspect of an embodiment of the present application, there is provided an apparatus for monitoring a device status, wherein the apparatus includes: the power-on detection circuit is connected with a physical interface of the monitored equipment and detects the power-on state of the physical interface in real time; the control circuit is connected with the power-on detection circuit and is used for controlling the power supply of the equipment state monitoring device according to the power-on state; and the first power supply circuit is connected with the power-on detection circuit and the control circuit and is used for supplying power to the power-on detection circuit and the control circuit.
In some embodiments, the physical interface is a USB interface or a network RJ-45 interface.
In some embodiments, the apparatus further comprises: the data acquisition terminal is connected with the monitored equipment and receives acquisition data from the monitored equipment; and the control circuit generates a first control signal for controlling power supply of the data acquisition terminal according to the power-on state.
In some embodiments, the apparatus further comprises: the second power supply circuit is connected with the data acquisition terminal and is used for supplying power to the data acquisition terminal; and the switching circuit is provided with a first terminal, a second terminal and a third terminal, the first terminal is connected with the second power supply circuit, the second terminal is connected with the control circuit, the third terminal is connected with the data acquisition terminal, and the switching circuit enables the first terminal and the third terminal to be connected or disconnected according to the first control signal.
In some embodiments, the apparatus further comprises: the switching circuit is provided with a first wiring end, a second wiring end and a third wiring end, the first wiring end is connected with the first power supply circuit, the second wiring end is connected with the control circuit, the third wiring end is connected with the data acquisition terminal, and the switching circuit enables the first wiring end and the third wiring end to be connected or disconnected according to the first control signal.
In some embodiments, the first power supply circuit is powered by a battery, and the second power supply circuit is powered by mains electricity; or, the first power supply circuit and the second power supply circuit are powered by a battery.
In some embodiments, the control circuit is provided with a first interface, a second interface, and a third interface, the first interface is connected to the power-on detection circuit to obtain the power-on state, the second interface is connected to the switch circuit to output the first control signal, and the third interface is connected to the first power supply circuit to obtain power.
In some embodiments, the control circuit comprises: the register stores timing duration information, the power-on state detected by the power-on detection circuit and timing switch information set by the data acquisition terminal; and the processor generates the first control signal according to the power-on state, the timing duration information and the timing switch information stored in the register.
In some embodiments, the processor starts timing according to the timing switch information, and generates the first control signal according to the power-on state after the timing reaches a time specified by the timing time information.
In some embodiments, in the case that the power-up state is power-up, the processor first puts the first control signal at a low level, and after a prescribed time, puts the first control signal at a high level; and under the condition that the power-on state is not power-on, the processor puts the first control signal at a low level.
In some embodiments, the control circuit is connected to the data acquisition terminal, generates a second control signal for controlling the data acquisition terminal to be turned on and off according to the power-on state, and outputs the second control signal to the data acquisition terminal.
In some embodiments, the monitored device is a medical device.
According to another aspect of the embodiments of the present application, there is provided a status monitoring terminal, including: the power-on detection circuit is connected with a physical interface of the monitored equipment and detects the power-on state of the physical interface in real time; and the processing circuit is connected with a data acquisition terminal for receiving acquired data from the monitored equipment and the power-on detection circuit, and controls the power supply of the data acquisition terminal according to the power-on state.
One of the beneficial effects of the embodiment of the application lies in: in the device state monitoring device, the power-on detection circuit detects the power-on state of the physical interface of the monitored device in real time, the control circuit controls the power supply of the device state monitoring device according to the power-on state, and the first power supply circuit supplies power to the power-on detection circuit and the control circuit, so that the power-on and power-off states of the monitored device can be known in real time at all times (namely all time including the working state or the non-working state of the monitored device), the power supply control can be accurately and reliably carried out even in the power-off process of the device state monitoring device, the integrity of monitoring data can be ensured, and the reliability of the device state monitoring device can be improved.
Specific embodiments of the present embodiments are disclosed in detail with reference to the following description and drawings, indicating the manner in which the principles of the embodiments may be employed. It should be understood that the embodiments of the present application are not so limited in scope. The embodiments of the application include many variations, modifications and equivalents within the spirit and scope of the appended claims.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only examples of the application, and that for a person skilled in the art, other embodiments can be obtained from these drawings without inventive effort. In the drawings:
FIG. 1 is a schematic view of a device status monitoring apparatus according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a device condition monitoring apparatus connected to a monitored device according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a power-on detection circuit according to an embodiment of the present application;
FIG. 4 is another schematic diagram of the configuration of the power-on detection circuit according to the embodiment of the present application;
FIG. 5 is another schematic view of the device status monitoring apparatus according to the embodiment of the present application;
FIG. 6 is a schematic view of a device status monitoring apparatus according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a control circuit configuration according to an embodiment of the present application;
FIG. 8 is another schematic diagram of the connection between the device condition monitoring apparatus and the monitored device according to the embodiment of the present application;
fig. 9 is a schematic diagram of a state monitoring terminal structure according to an embodiment of the present application.
Detailed Description
The foregoing and other features of embodiments of the present application will become apparent from the following description, taken in conjunction with the accompanying drawings. In the description and drawings, particular embodiments of the application are disclosed in detail as being indicative of some of the embodiments in which the principles of the embodiments of the application may be employed, it being understood that the application is not limited to the embodiments described, but, on the contrary, the embodiments of the application include all modifications, variations and equivalents falling within the scope of the appended claims.
In the embodiments of the present application, the terms "first", "second", and the like are used for distinguishing different elements by reference, but do not denote a spatial arrangement, a temporal order, or the like of the elements, and the elements should not be limited by the terms. The term "and/or" includes any and all combinations of one or more of the associated listed terms. The terms "comprising," "including," "having," and the like, refer to the presence of stated features, elements, components, and do not preclude the presence or addition of one or more other features, elements, components, and elements.
In the embodiments of the present application, the singular forms "a", "an", and the like include the plural forms and are to be construed broadly as "a" or "an" and not limited to the meaning of "a" or "an"; furthermore, the term "comprising" should be understood to include both the singular and the plural, unless the context clearly dictates otherwise. Furthermore, the term "according to" should be understood as "according at least in part to \8230;" based on "should be understood as" based at least in part on \8230; "unless the context clearly indicates otherwise.
In the description of the present application, it should be noted that, unless explicitly stated or limited otherwise, the terms "connected" and "connected" are to be interpreted broadly, e.g., as being fixed or detachable or integrally connected; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, and the two components can be communicated with each other; the specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art through specific cases.
In the description of the present application, it should be noted that, unless explicitly specified or limited otherwise, the term "circuit" is to be understood in a broad sense, and may be, for example, a circuit formed by connecting electronic components or the like, or a unit, a module, or the like; the specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art through specific situations.
Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments, in combination with or instead of the features of the other embodiments. The term "comprises/comprising" when used herein, is taken to specify the presence of stated features, integers, steps or components, but does not preclude the presence or addition of one or more other features, integers, steps or components.
The following specifically describes examples of the present application.
The embodiment of the application provides a device state monitoring device. Fig. 1 is a schematic diagram of the structure of the device state monitoring apparatus 100, and fig. 2 is a schematic diagram of the connection between the device state monitoring apparatus 100 and the monitored device 200. As shown in fig. 1 and 2, the device-state monitoring apparatus 100 includes: a power-up detection circuit 12, a control circuit 13 and a first power supply circuit 14.
The power-on detection circuit 12 is connected to the physical interface 21 (shown in fig. 2) of the monitored device 200, and detects the power-on state of the physical interface 21. The control circuit 13 is connected to the power-on detection circuit 12, and controls power supply to the device state monitoring apparatus 100 according to the power-on state. The first power supply circuit 14 is connected to the power-on detection circuit 12 and the control circuit 13, and supplies power to the power-on detection circuit 12 and the control circuit 13.
According to the above embodiment, in the device status monitoring apparatus 100, the power-on detection circuit 12 detects the power-on status of the physical interface 21 of the monitored device 200 in real time, and the first power supply circuit 14 supplies power to the power-on detection circuit 12, so that the power-on/off status of the monitored device 200 can be known in real time at each time (i.e., all time of the monitored device including the operating status or the non-operating status); the control circuit 13 controls the power supply of the device state monitoring apparatus 100 according to the power-on detection state, and the first power supply circuit 14 supplies power to the control circuit 13, so that the device state monitoring apparatus 100 can be timely controlled to supply power along with the change of the power-on/off state of the monitored device 200. Therefore, even in the shutdown process, the device status monitoring apparatus 100 can accurately detect the on/off status of the monitored device 200, and can perform the startup or shutdown operation in time according to the change of the on/off status of the monitored device 200, thereby ensuring the integrity of the monitoring data and improving the reliability of the device status monitoring apparatus 100.
In this embodiment, for convenience of description, the power-on operation state of the monitored device 200 and the device state monitoring apparatus 200 is referred to as an operating state; states other than the operating state, such as a power-off state, a standby state, a sleep state, a power-off state, etc., are referred to as non-operating states; the operating state and the non-operating state are collectively referred to as an operating state or a power-on state.
In some embodiments, monitored device 200 may be a variety of devices that have data collection requirements. For example, the monitored device may be a medical device, such as an ultrasound probe, a monitor, or the like. The data collected may be test data, examination data, vital signs monitoring data, etc. generated by the medical device, and/or operational data of the medical device itself, etc. By collecting the data of the medical equipment, the collected data can be analyzed, synthesized, stored and the like in the subsequent process, so that useful information can be provided for users conveniently. The present application is not limited thereto, and the monitored device 200 may also be other types of devices, such as industrial devices and the like.
In some embodiments, as shown in FIG. 2, the power-up detection circuit 12 may be connected to a physical interface 21 of the monitored device 200. The physical interface 21 may be any interface capable of reflecting the power-on state of the monitored device 200, such as an interface for powering on or powering off. The physical interface 21 is, for example, various USB interfaces (e.g., type-a interface, type-B interface, type-C interface, micro-a interface, micro-B interface, micro-AB interface, mini-a interface, mini-B interface, mini-AB interface, etc.), or the physical interface 21 is, for example, a network RJ-45 interface, etc.
Because the interface is powered on after the monitored device 200 is powered on and powered off after the monitored device 200 is powered off, the operation state of the monitored device 200 can be simply, accurately and timely determined by detecting the power-on state of the interface. In addition, the operation state of the monitored device 200 can be determined in this way, regardless of whether the monitored device 200 is powered by the commercial power or a mobile power source such as a battery. In addition, because such interfaces are generally disposed in the monitored device 200 (e.g., a medical device), such a manner has a certain universality, the power-on detection circuit 12 can be implemented in a uniform manner, the implementation manner has consistency, and is convenient for popularization and application and cost reduction, and the maintenance work in the later period can be reduced.
In some embodiments, when the physical interface is an RJ-45 interface, the power-on state of the interface may be detected according to the TX/RX level of the RJ-45 interface; when the physical interface is a USB interface, the power-on state of the interface can be detected according to the level of the voltage output ends USB + and USB-of the USB interface.
Hereinafter, the structure of the power-on detection circuit 12 will be described by way of example, taking the physical interface as the USB interface. It will be appreciated that the structure of the power-up detection circuit 12 described below is equally applicable to detecting power-up conditions of other types of physical interfaces.
Fig. 3 is a schematic diagram illustrating the configuration of the power-on detection circuit 12 according to the embodiment of the present application. As shown in fig. 3, the power-on detection circuit 12 may include a voltage reduction resistor R1, a current limiting resistor R2, and an isolation circuit IC (isolation circuit). The power-on detection circuit 12 is provided with connection terminals 121, 122, 123, 124. Wherein, the connecting end 121 and the connecting end 122 are respectively connected with a positive USB + and a negative USB-of the output end of the USB interface of the monitored device 200; the connection terminal 123 is connected to the control circuit 13 to output a signal indicating the power-on state of the USB interface to the control circuit 13, and the connection terminal 124 is connected to the first power supply circuit 14 to supply the direct current voltage VCC to the upper power detection circuit 12 through the first power supply circuit 14. One end of the voltage reduction resistor R1 is connected with the connecting end 121, and the other end is connected with the terminal 1 of the isolation circuit IC; terminal 2 of the isolation circuit IC is connected to connection terminal 122; one end of the current limiting resistor R2 is connected with the terminal 3 of the isolation circuit IC, and the other end is connected through the connecting end 123; terminal 4 of the isolation circuit IC is connected to connection terminal 124.
In some embodiments, when monitored device 200 is in the inactive state, the USB interface of monitored device 200 has no voltage output or the output voltage is less than a prescribed threshold. At this time, the isolation circuit IC is turned off, and the power-on detection circuit 12 outputs a first voltage value (for example, 0V) smaller than a first predetermined threshold value at the connection terminal 123.
When the monitored device 200 is powered on, the USB interface of the monitored device 200 outputs a prescribed voltage value (e.g., 5V). At this time, the isolation circuit IC is turned on, and the power-on detection circuit 12 outputs a second voltage value (for example, 3.3V or 5V) greater than a second prescribed threshold value at the connection terminal 123. Thus, the power-on state of the monitored device 200 can be represented by the voltage value output from the power-on detection circuit 12 at the connection terminal 123.
In some embodiments, the determination that the monitored device 200 is powered on may be made in other manners. Fig. 4 is another schematic diagram of the configuration of the power-on detection circuit 12 according to the embodiment of the present application. The circuit shown in fig. 4 differs from the circuit shown in fig. 3 in the connection terminal of the power-on detection circuit 12 and the connection manner thereof. For example, as shown in fig. 4, the power-on detection circuit 12 may include connection terminals 125, 126, 127 in addition to connection terminals 121 and 122. The connection terminal 125 is grounded, the connection terminal 126 is connected to the first power supply circuit 14, and the connection terminal 127 is connected to the control circuit 13. The terminal 4 of the isolation circuit IC is connected to the connection terminal 125; one end of the current limiting resistor R2 connected to the terminal 3 of the isolation circuit IC is connected to the connection terminal 127, and the other end of the current limiting resistor R2 is connected to the connection terminal 126.
In some embodiments, when monitored device 200 is in the inactive state, the USB interface of monitored device 200 has no voltage output or the output voltage is less than a prescribed threshold. At this time, the isolation circuit IC is turned off, and the power-on detection circuit 12 outputs a third voltage value (for example, 3.3V or 5V) greater than a third predetermined threshold value at the connection terminal 127.
When the monitored device 200 is powered on, the USB interface of the monitored device 200 outputs a prescribed voltage value (e.g., 5V). At this time, the isolation circuit IC is turned on, and the power-on detection circuit 12 outputs a fourth voltage value (for example, 0V) smaller than a fourth predetermined threshold value at the connection terminal 127. Thus, the power-on state of the monitored device 200 can be indicated by the voltage value output from the power-on detection circuit 12 at the connection terminal 127.
In some embodiments, as shown in fig. 3 and fig. 4, in the power-on detection circuit 12, the voltage reduction or the current limitation may be performed by using a voltage reduction resistor or a current limitation resistor, which is not limited in this application, and other circuits having the voltage reduction or the current limitation function may be used instead of the voltage reduction resistor R1 or the current limitation resistor R2.
In some embodiments, the isolation circuit IC may be an optocoupler circuit, including a photodiode; alternatively, it may be a magnetic coupling circuit, including an inductor. The present application is not limited thereto, and the isolation circuit IC may be other types of circuits.
In some embodiments, as shown in fig. 1 and fig. 2, the device state monitoring apparatus 100 may further include a data acquisition terminal 11. The data collecting terminal 11 may be connected to the monitored device 200 and receive collected data from the monitored device 200.
In some embodiments, as shown in fig. 2, the data collection terminal 11 is connected to the communication interface 22 of the monitored device 200. The data acquisition terminal 11 may receive the acquired data from the communication interface 22 in a wireless or wired manner.
For example, the communication interface 22 may be a wired interface conforming to various communication standards, and the data collection terminal 11 receives the collected data from the communication interface 22 through a wired connection. Taking the collected data as the video data as an example, the communication interface 22 may be an s-video interface, an RCA interface, a VGA interface, a DVI interface, an HDMI interface, a DP interface, or the like.
For another example, the communication interface 22 may be a wireless interface conforming to various communication standards, and the data collection terminal 11 receives the collected data from the communication interface 22 through a wireless connection. For example, the communication interface 22 may be an interface of the following communication standards or communication technologies, long Term Evolution (LTE), enhanced Long Term Evolution (LTE-a), wideband Code Division Multiple Access (WCDMA), high-Speed Packet Access (HSPA), bluetooth (Bluetooth), wireless local area network 802.11 (Wi-Fi), infrared data transmission (IrDA), zigBee, ultra Wide Band (Ultra Band), short range communication (NFC), and the like.
In some embodiments, the data collection terminal 11 may be implemented by a motherboard that supports various operating systems. For example, the data collection terminal 11 may be a Linux motherboard or an RTOS motherboard. The data acquisition terminal 11 may include a processor and a memory, wherein the memory may store data and programs and is coupled to the processor. In addition, the data acquisition terminal 11 may further include a communication module, an input unit, a display, and the like. The processor can control the communication module to receive the acquired data by executing the program in the memory, can process the acquired data according to a preset rule, and stores the acquired data and/or the processed data in the memory or uploads the acquired data through the communication module. The data acquisition terminal 11 may be implemented in a manner that is not specifically described herein.
In some embodiments, as shown in fig. 1 and fig. 2, the first power supply circuit 14 may continuously supply power to the power-on detection circuit 12 and the control circuit 13 at various times (i.e., at all times of the device state acquisition apparatus 100 including the working state and the non-working state), so that even when the device state acquisition apparatus 100 enters a shutdown process, the power-on detection circuit 12 and the control circuit 13 can have power input without being turned off, and thus, the power-on state of the physical interface 21 of the monitored device 200 can be ascertained at various times, and the device state acquisition apparatus 100 is controlled to supply power according to the power-on state.
In some embodiments, the first power supply circuit 14 may provide 3.3V or 5V dc power to the control circuit 13 and the power-on detection circuit 12 according to the input voltage of the control circuit 13. The present application is not limited thereto, and the first power supply circuit 14 may also provide voltages of other values.
In some embodiments, the first power supply circuit 14 may supply power to other components of the device state acquisition apparatus 100 in addition to the power-on detection circuit 12 and the control circuit 13. For example, the first power supply circuit 14 may also supply power to the data acquisition terminal 11. The present application is not limited to this, and as shown in fig. 1, a second power supply circuit 15 may be provided in the device state monitoring apparatus 100, and the data acquisition terminal 11 may be powered by the second power supply circuit 15.
In some embodiments, the first power supply circuit 14 and/or the second power supply circuit 15 may be powered by a battery. By providing the first power supply circuit 14 and/or the second power supply circuit 15 in a removable form including a battery, the device state monitoring apparatus 100 can be easily carried, enabling the device state monitoring apparatus 100 to be suitable for various application scenarios. However, the present application is not limited to this, and the first power supply circuit 14 and/or the second power supply circuit 15 may be supplied with power by commercial power.
In some embodiments, the first power supply circuit 14 and/or the second power supply circuit 15 may be an uninterruptible power supply system UPS. For example, it may be a miniature UPS system comprising, for example, a circuit board and a battery of around 3000 mA. On the one hand, by adopting the UPS system, a stable power supply can be provided for the apparatus state monitoring device 100, and on the other hand, by adopting the micro UPS system, the apparatus state monitoring device 100 is advantageously miniaturized, and the convenience of use is improved.
In some embodiments, the first and/or second power supply circuits 14, 15 may provide automatic switching of power, e.g., it may switch between a battery and mains; or when the electric supply is connected, the battery can be automatically charged through the electric supply; alternatively, information such as the state of external power and the state of remaining battery power may be provided to the device state monitoring apparatus 100.
In some embodiments, the second power supply circuit 15 may be a UPS system of the apparatus state monitoring device 100 itself. Alternatively, the UPS system may be the monitored device 200, and in this case, the device state monitoring apparatus 100 may be provided between the UPS system and the monitored device 200.
In some embodiments, the control circuit 13 may generate a first control signal for controlling power supply to the data acquisition terminal 11 according to the power-on state of the monitored device 200 detected by the power-on detection circuit 12, so as to control on/off of a power supply line between the data acquisition terminal 11 and the first power supply circuit 14 and/or the second power supply circuit 15 that supply power to the data acquisition terminal 11.
In some embodiments, as shown in fig. 1, in the device state monitoring apparatus 100, the control circuit 13 may be connected to the data acquisition terminal 11, and control the data acquisition terminal 11 to be powered on or powered off through the first control signal. The present application is not limited to this, and in the device status monitoring apparatus 100, a switch circuit may also be provided, and the control circuit 13 is connected to the switch circuit, and controls the switch circuit to be turned on or turned off through the first control signal, so as to achieve the purpose of controlling the data acquisition terminal 11 to be turned on or turned off.
Fig. 5 is another schematic diagram of the configuration of the device state monitoring apparatus 100 according to the embodiment of the present application, which illustrates a case where power is supplied to the data acquisition terminal 11 through the first power supply circuit 14. As shown in fig. 5, the device state monitoring apparatus 100 further includes a switch circuit 16. The switching circuit 16 is provided with a first terminal 161, a second terminal 162, and a third terminal 163. The first terminal 161 is connected to the first power supply circuit 14, the second terminal 162 is connected to the control circuit 13, and the third terminal 163 is connected to the data acquisition terminal 11. The switch circuit 16 may turn on or off the first terminal 161 and the third terminal 163 according to the first control signal output from the control circuit 13.
Fig. 6 is another schematic diagram of the configuration of the device state monitoring apparatus 100 according to the embodiment of the present application, and illustrates a case where power is supplied to the data acquisition terminal 11 through the second power supply circuit 15. As shown in fig. 6, the first terminal 161 of the switch circuit 16 is connected to the second power supply circuit 15, the second terminal 162 is connected to the control circuit 13, and the third terminal 163 is connected to the data acquisition terminal 11. The switch circuit 16 may turn on or off the first terminal 161 and the third terminal 163 according to the first control signal output from the control circuit 13.
In some embodiments, switching circuitry 16 may include various devices having power-on and power-off functionality. For example, the switching circuit may include a transistor, a relay, a MOS transistor, and the like. Taking a transistor as an example, the first terminal 161 of the switch circuit 16 may be a collector of the transistor, the second terminal 162 may be a base of the transistor, and the third terminal 163 may be an emitter of the transistor. The control circuit 13 controls the on/off of the collector and emitter of the triode by adjusting the high and low levels of the first control signal.
In some embodiments, as shown in fig. 1, 2, 5 and 6, the control circuit 13 may be provided with a first interface IO1, a second interface IO2 and a third interface IO3. The first interface IO1 is connected to the power-on detection circuit 12 to obtain a power-on state of the monitored device 200, the second interface IO2 is connected to the switch circuit 16 to output a first control signal to control on/off of the switch circuit 16, and the third interface IO3 may be connected to the first power supply circuit 14 to obtain power supply.
The first interface IO1, the second interface IO2, and the third interface IO3 may be three different interfaces, or any two or all of the first interface IO1, the second interface IO2, and the third interface IO3 may be integrated into the same interface. The present application does not specifically limit the implementation of various interfaces.
In some embodiments, the control circuit 13 may generate the first control signal for controlling the power supply to the data acquisition terminal 11 in various ways.
For example, the monitored device 200 is turned off, and the data acquisition terminal 11 determines to turn off after completing corresponding processes of processing, storing, uploading, and the like of the acquired data. In the process of turning off the data acquisition terminal 11, the power-on detection circuit 12 detects the operation state of the monitored device 200 at all times. If during or after the shutdown of the data acquisition terminal 11, it is detected that the monitored device 200 is powered on again, the first control signal is output, so that the data acquisition terminal 11 is kept powered on (for example, the first control signal is at a high level) or powered off first temporarily and then powered on (for example, the first control signal is at a low level and then at a high level), so that the data acquisition terminal 11 enters the working state again. Therefore, even in the shutdown process of the device state monitoring apparatus 100, the startup operation of the monitored device 200 can be ascertained, the device can be started in time according to the running state of the monitored device 200, and the integrity of the collected data can be ensured.
For another example, the monitored device 200 is powered off, and the data acquisition terminal 11 determines to be powered off after completing corresponding processes such as processing, storing, uploading, and the like of the acquired data. After the data acquisition terminal 11 is turned off, the first control signal is output to power off the data acquisition terminal 11 (for example, the first control signal is at a low level). If the monitored device 200 is detected to be powered on in the process of turning off the data acquisition terminal 11, an alarm message may be prompted to the user, so that the user knows that the monitored device 200 cannot acquire the data of the current operation because the device status monitoring apparatus 100 is in the process of turning off the apparatus. Alternatively, the monitored device 200 may be notified to be powered on after a prescribed time has elapsed.
For another example, when the power-on detection circuit 12 detects that the monitored device 200 is powered on, the first control signal is output to power on and turn on the data acquisition terminal 11. The present application is not limited to this, and the control circuit 13 may also generate the first control signal in other manners as long as power supply or power off to the data acquisition terminal 11 can be controlled.
In some embodiments, the control circuit 13 may also be referred to as a processor or a master or an operation control, and may be a Micro Controller Unit (MCU), a microprocessor or a microcontroller or other processor device and/or a logic device. The function of the control circuit 13 may be integrated on a motherboard of the device status monitoring apparatus 100 or the data collection terminal 11 (for example, the control circuit 13 is configured as a chip connected to a motherboard processor (CPU)), or may be provided independently of the motherboard of the device status monitoring apparatus 100 or the data collection terminal 11, which is not limited in this embodiment of the application.
The implementation of the control circuit 13 is exemplarily described below with reference to the drawings. Fig. 7 is a schematic diagram of the configuration of the control circuit 13 according to the embodiment of the present application. As shown in fig. 7, the control circuit 13 may include a register 130 and a processor 134. The register 130 may store timing duration information, a power-on state detected by the power-on detection circuit 12, and timing switch information set by the data acquisition terminal 11. Processor 134 generates the first control signal based on the power-on state, the timing duration information, and the timing switch information stored in register 130.
In some embodiments, the power-on status of the monitored device 200 may be represented by 1 bit (bit). For example, 1 represents power up and 0 represents power down.
In some embodiments, the timing duration information may be information related to the duration required for the data acquisition terminal 11 to turn itself off. For example, the timing duration information may be 0-30s.
In some embodiments, the timing duration information may be slightly longer than the duration required for turning off the data acquisition terminal 11 itself, so that it can be ensured that the power is cut off after the data acquisition terminal 11 is completely turned off, which is beneficial to prolonging the service life of the data acquisition terminal 11. For example, if the time period required for the data collection terminal 11 to turn off itself is about 6s, the timing period information may be set to about 10s.
In some embodiments, the time duration information may be a fixed value or a predetermined value, for example, the time duration information may be set at the time of factory shipment of the device, or the time duration information may be set according to an instruction input by a user.
In some embodiments, the timing duration information may also be determined by the data acquisition terminal 11 according to the duration required for self-shutdown, and sent to the control circuit 13 in a specified protocol format through a communication interface such as a serial port. For example, the data acquisition terminal 11 may set the timing duration information once according to the duration required for its own shutdown at each startup or at every prescribed time.
In some embodiments, the time switch information may be information for indicating the start of timing, the timing length being a length specified by the timing length information. The timing switch information can be represented by 1 bit (bit). For example, a 1 in the timer switch information indicates that the time measurement is started, and a 0 indicates that the time measurement is not started.
In some embodiments, the timer switch information may be set by the data collection terminal 11, for example, the timer switch information is set to 1 when the data collection terminal 11 decides that it needs to be turned off.
In some embodiments, as shown in fig. 7, the register 130 may include a first register 131, a second register 132, and a third register 133, and the power-on state, the timing duration information, and the timing switch information are stored through the first register 131, the second register 132, and the third register 133, respectively. The present application is not limited to this, and the above information may be stored in other ways.
In some embodiments, the processor 134 may start timing according to the timing switch information, and generate the first control signal according to the current power-on state of the monitored device 200 after the timing reaches the time specified by the timing duration information.
For example, in the case where the detection result of the power-on detection circuit 12 (i.e., the power-on state of the monitored device 200) is power-on, the processor 134 first sets the first control signal to the low level, and then sets the first control signal to the high level after a prescribed time has elapsed. That is, the data collection terminal 11 is powered off and then powered on temporarily, so that the data collection terminal 11 can be smoothly turned on regardless of which operating system the data collection terminal 11 uses, and this method has a certain universality. Alternatively, the present application is not limited to this, and when the detection result is power-on, the processor 134 may always set the first control signal to a high level, and notify the data acquisition terminal 11 of turning on through a second control signal described later.
For another example, in the case where the detection result of the power-on detection circuit 12 (i.e., the power-on state of the monitored device 200) is power-off, the processor 134 places the first control signal at a low level. Thereby, the data collection terminal 11 is completely powered off.
In some embodiments, the control circuit 13 may further generate a second control signal for controlling the on/off of the data acquisition terminal 11 according to the power-on state. For example, as shown in fig. 1, the control circuit 13 may further provide a fourth interface IO4. The fourth interface IO4 may be connected to the data acquisition terminal 11, and output the second control signal to the data acquisition terminal 11. The data acquisition terminal 11 can be powered on and turned on to enter the working state through the first control signal and the second control signal. However, the present application is not limited thereto, and the second control signal may be omitted when the control circuit 13 can energize the data collection terminal 11 and enter the operating state by the first control signal.
In some embodiments, the control circuit 13 may generate the second control signal in various ways. For example, when the power-on detection circuit 12 detects that the monitored device 200 is powered on, a second control signal is output to notify the data acquisition terminal 11 that the monitored device 200 is powered on, and the data acquisition terminal 11 can be powered on according to the second control signal.
For another example, when the power-on detection circuit 12 detects that the monitored device 200 is powered off, the second control signal is output to notify the data acquisition terminal 11 that the monitored device 200 is powered off, and the ending operation may be started or the monitored device may be powered off.
For another example, the monitored device 200 is powered off, the data acquisition terminal 11 determines to be powered off after completing corresponding processes such as processing and/or storing and/or uploading of acquired data, the power-on detection circuit 12 detects the working state of the monitored device 200 at all times in the process of powering off the data acquisition terminal 11, and if the monitored device 200 is powered on in the process of powering off the data acquisition terminal 11 or after powering off the data acquisition terminal 11, a second control signal is output to notify the data acquisition terminal 11 to be powered on again. The present application is not limited to this, and the control circuit 13 may also generate the second control signal in other manners as long as the control circuit can control the power on or power off of the data acquisition terminal 11.
Fig. 8 is another schematic diagram of the connection between the device state monitoring apparatus 100 and the monitored device 200 according to the embodiment of the present application. Hereinafter, the operation of the device state monitoring apparatus 100 will be described by way of example with reference to fig. 8.
As shown in fig. 8, by detecting the USB port 22 of the monitored device 200 by the power-on detection circuit 12, the mcu (control circuit 13) determines the power-on state of the monitored device 200. The MCU provides four interfaces to the outside, a first interface IO1 is used to receive the power-on state of the monitored device 200, a second interface IO2 is used to output a first control signal for controlling the switching circuit 16 to power on or off the Linux motherboard (data acquisition terminal 11) by the UPS system (second power supply circuit 15), a third interface IO3 is used to input the power provided by the battery (first power supply circuit 14) to the MCU, and a fourth interface IO4 is a communication interface for outputting a second control signal to control the Linux motherboard to be turned on or turned off.
Each time the Linux system running in the Linux motherboard is started, the timing duration information in the second register (not shown) of the MCU may be set once, for example, 10s, according to its own shutdown time. When the monitored device 200 is turned off and the Linux motherboard completes processing of data and uploads the data to the server, the Linux system determines that it needs to turn off, sets the timer switch information in the third register (not shown) to 1, and simultaneously issues a shutdown command to turn off the Linux system within 10s.
The shutdown command of the Linux system may be various shutdown commands. For example, sudo Shutdown now. After the Linux system issues the command, the following processes are executed: sending a notification message to the login account, quitting all login account control consoles, and freezing the login consoles; changing the running OS state to 0 (e.g., including disconnecting all external links, closing all services, closing all open files and handles of the system); after the countdown is finished, the power supply is disconnected.
However, the present application is not limited thereto, and the Linux system may also shut down through other commands, or perform other forms of shutdown processes.
When the MCU detects that the timing switch information is 1, the counting down of 10s is started. At the end of the countdown, two processing paths are determined based on the power-up status in a first register (not shown):
if the power-on state is 0, the second port IO2 of the MCU outputs a low level to completely power off the Linux mainboard, and only when the monitored equipment 200 is started next time, the second port IO2 and the fourth port IO4 of the MCU output a high level to power on the Linux mainboard and start the system;
if the power-on state is 1, the second port IO2 of the MCU outputs a low level and then outputs a high level, and along with the high level of the second port IO2, the third port IO3 also outputs a high level, namely, the Linux mainboard is completely powered off, then the Linux mainboard is powered on again, and the system is started again.
It should be noted that, the above description only describes the components or modules related to the present embodiment, but the present application is not limited thereto. The device state monitoring apparatus 100 may further include other components or modules, and reference may be made to related technologies regarding the details of the components or modules.
In addition, for the sake of simplicity, fig. 1 to 8 only exemplarily show connection relationships or signal directions between respective components or modules, but it should be apparent to those skilled in the art that various related technologies such as bus connection and the like may be employed. The various components or modules described above may be implemented by hardware facilities such as electronics, processors, memory, transmitters, receivers, etc.; the present application is not so limited.
As can be seen from the foregoing embodiment, in the device state monitoring apparatus 100, the power-on detection circuit 12 detects the power-on state of the physical interface 21 of the monitored device 200 in real time, and the first power supply circuit 14 supplies power to the power-on detection circuit 12, so that the power-on/off state of the monitored device 200 can be known in real time at each time; the control circuit 13 controls the power supply of the device state monitoring apparatus 100 according to the power-on detection state, and the first power supply circuit 14 supplies power to the control circuit 13, so that the device state monitoring apparatus 100 can be timely controlled to supply power along with the change of the power-on/off state of the monitored device 200. Therefore, even in the shutdown process, the device status monitoring apparatus 100 can accurately detect the on/off status of the monitored device 200, and can perform the startup or shutdown operation in time according to the change of the on/off status of the monitored device 200, thereby ensuring the integrity of the monitoring data and improving the reliability of the device status monitoring apparatus 100.
The embodiment of the application also provides a state monitoring terminal. Fig. 9 is a schematic diagram of the configuration of the state monitoring terminal 300. As shown in fig. 9, the condition monitoring terminal 300 includes: a power-up detection circuit 301 and a processing circuit 302. The power-on detection circuit 301 is connected to a physical interface of the monitored device, and detects a power-on state of the physical interface in real time. The processing circuit 302 is connected to the data acquisition terminal and the power-on detection circuit 301, and controls power supply of the data acquisition terminal according to the power-on state. The data acquisition terminal is used for acquiring data of the monitored equipment, namely receiving acquired data from the monitored equipment.
According to the embodiment, the power-on state of the physical interface of the monitored equipment is detected in real time through the power-on detection circuit 301, so that the power-on and power-off state of the monitored equipment can be timely and accurately detected; the processing circuit 302 controls the power supply of the data acquisition terminal according to the power-on state, so that the power supply of the device state monitoring apparatus 100 can be timely controlled along with the change of the power-on/off state of the monitored device 200.
In some embodiments, the condition monitoring terminal 300 may be a module independent from the data collection terminal, and the condition monitoring terminal 300 may be disposed between the physical interface of the monitored device and the data collection terminal.
In some embodiments, the state monitoring terminal 300 may supply power to the power-on detection circuit 301 and the processing circuit 302 through a physical interface of the monitored device, so that after the monitored device is powered on, the state monitoring terminal 300 may also have power input, and may detect the power-on/off state of the monitored device in time. Further, the power supply of the data collection terminal can be controlled at each time. The application is not limited to this, and the state monitoring terminal 300 may also set a power supply module to supply power to the power-on detection circuit 301 and the processing circuit 302; alternatively, the condition monitoring terminal 300 may be powered by a data collection terminal connected thereto, and so on.
In some embodiments, the power-up detection circuit 301 may be the same as or similar to the power-up detection circuit 11 in the previous embodiments, and the processing circuit 302 may be the same as or similar to the control circuit 13 in the previous embodiments, which are not specifically described herein.
It should be noted that, the above description only describes the components or modules related to the present embodiment, but the present application is not limited thereto. The condition monitoring terminal 300 may further include other components or modules, and reference may be made to the related art regarding the specific contents of the components or modules.
In addition, for the sake of simplicity, fig. 9 only illustrates the connection relationship or signal direction between the respective components or modules, but it should be clear to those skilled in the art that various related technologies such as bus connection and the like may be adopted. The various components or modules described above may be implemented by hardware facilities such as electronics, processors, memory, transmitters, receivers, etc.; the present application is not so limited.
The above embodiments are merely illustrative of the embodiments of the present application, but the present application is not limited thereto, and appropriate modifications may be made on the basis of the above embodiments. For example, the above embodiments may be used alone, or one or more of the above embodiments may be combined.
The present application has been described in conjunction with specific embodiments, but it should be understood that these descriptions are exemplary and not intended to limit the scope of the present application. Various modifications and adaptations of the present application may occur to those skilled in the art based on the spirit and principles of the application and are within the scope of the application.
Preferred embodiments of the present application are described above with reference to the accompanying drawings. The many features and advantages of the embodiments are apparent from the detailed specification, and thus, it is intended by the appended claims to cover all such features and advantages of the embodiments that fall within the true spirit and scope thereof. Further, since numerous modifications and variations will readily occur to those skilled in the art, it is not desired to limit the embodiments of the present application to the exact construction and operation illustrated and described, and accordingly, all suitable modifications, variations and equivalents may be resorted to, falling within the scope thereof.

Claims (13)

1. An apparatus for monitoring the condition of a device, the apparatus comprising:
the power-on detection circuit is connected with a physical interface of the monitored equipment and detects the power-on state of the physical interface in real time;
the control circuit is connected with the power-on detection circuit and controls the power supply of the equipment state monitoring device according to the power-on state; and
and the first power supply circuit is connected with the power-on detection circuit and the control circuit and is used for supplying power to the power-on detection circuit and the control circuit.
2. The apparatus of claim 1,
the physical interface is a USB interface or a network RJ-45 interface.
3. The apparatus of claim 1, further comprising:
the data acquisition terminal is connected with the monitored equipment and receives acquisition data from the monitored equipment;
and the control circuit generates a first control signal for controlling power supply of the data acquisition terminal according to the power-on state.
4. The apparatus of claim 3, further comprising:
the second power supply circuit is connected with the data acquisition terminal and used for supplying power to the data acquisition terminal; and
the switching circuit is provided with a first wiring end, a second wiring end and a third wiring end, the first wiring end is connected with the second power supply circuit, the second wiring end is connected with the control circuit, the third wiring end is connected with the data acquisition terminal, and the switching circuit enables the first wiring end and the third wiring end to be connected or disconnected according to the first control signal.
5. The apparatus of claim 3, further comprising:
the switching circuit is provided with a first wiring end, a second wiring end and a third wiring end, the first wiring end is connected with the first power supply circuit, the second wiring end is connected with the control circuit, the third wiring end is connected with the data acquisition terminal, and the switching circuit enables the first wiring end and the third wiring end to be connected or disconnected according to the first control signal.
6. The apparatus of claim 4,
the first power supply circuit supplies power through a battery, and the second power supply circuit supplies power through commercial power; or, the first power supply circuit and the second power supply circuit are powered by a battery.
7. The apparatus of claim 4 or 5,
the control circuit is provided with a first interface, a second interface and a third interface, the first interface is connected with the power-on detection circuit to obtain the power-on state, the second interface is connected with the switch circuit to output the first control signal, and the third interface is connected with the first power supply circuit to obtain electric power.
8. The apparatus of claim 3, wherein the control circuit comprises:
the register stores timing duration information, the power-on state detected by the power-on detection circuit and timing switch information set by the data acquisition terminal; and
and the processor generates the first control signal according to the power-on state, the timing duration information and the timing switch information stored in the register.
9. The apparatus of claim 8,
and the processor starts timing according to the timing switch information, and generates the first control signal according to the power-on state after the timing reaches the time specified by the timing time information.
10. The apparatus of claim 9,
when the power-on state is power-on, the processor firstly sets the first control signal at a low level, and sets the first control signal at a high level after a specified time; and under the condition that the power-on state is not power-on, the processor places the first control signal at a low level.
11. The apparatus of claim 3,
the control circuit is connected with the data acquisition terminal, generates a second control signal for controlling the on-off of the data acquisition terminal according to the power-on state, and outputs the second control signal to the data acquisition terminal.
12. The apparatus of claim 1,
the monitored device is a medical device.
13. A condition monitoring terminal, characterized in that the terminal comprises:
the power-on detection circuit is connected with a physical interface of the monitored equipment and detects the power-on state of the physical interface in real time; and
and the processing circuit is connected with a data acquisition terminal for receiving acquired data from the monitored equipment and the power-on detection circuit, and controls the power supply of the data acquisition terminal according to the power-on state.
CN202221344387.9U 2022-05-31 2022-05-31 Equipment state monitoring device and state monitoring terminal Active CN217904098U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221344387.9U CN217904098U (en) 2022-05-31 2022-05-31 Equipment state monitoring device and state monitoring terminal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221344387.9U CN217904098U (en) 2022-05-31 2022-05-31 Equipment state monitoring device and state monitoring terminal

Publications (1)

Publication Number Publication Date
CN217904098U true CN217904098U (en) 2022-11-25

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Application Number Title Priority Date Filing Date
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