CN217883966U

CN217883966U - Component carrier comprising at least two components

Info

Publication number: CN217883966U
Application number: CN202221185133.7U
Authority: CN
Inventors: 多米尼克·维尔丁
Original assignee: AT&S Austria Technologie und Systemtechnik AG
Current assignee: AT&S Austria Technologie und Systemtechnik AG
Priority date: 2022-05-16
Filing date: 2022-05-16
Publication date: 2022-11-22
Anticipated expiration: 2032-05-16

Abstract

The utility model relates to a part holds carrier (100) including at least two parts. The component carrier (100) comprises: a stack (102), the stack (102) comprising at least one electrically conductive layer structure and a plurality of electrically insulating layer structures; a first component (110); a second component (116); a central core (134), the first component (110) and the second component (116) both being embedded in the core (134); a first electrically insulating structure (130), the first electrically insulating structure (130) encapsulating the first component (110); a second electrically insulating structure (132), the second electrically insulating structure (132) encapsulating the second component. The first part (110) and the second part (116) are electrically connected to the external electrically conductive structure (1) by at least one electrically conductive contact (2) passing through the first electrically insulating structure (130) and/or the second electrically insulating structure (132).

Description

Component carrier comprising at least two components

Technical Field

The utility model relates to a part holds carrier, this part holds carrier and includes two at least parts of embedding in this part holds carrier.

Background

In the context of the ever increasing product functionality of component carriers equipped with one or more electronic components and the increasing miniaturization of such components and the increasing number of components to be mounted on or embedded in the component carrier, such as a printed circuit board, increasingly larger array-like components or packages with a plurality of components are being employed, which have a plurality of contact or connection portions, wherein the spacing between these contact portions is increasingly smaller. At the same time, the component carrier should be mechanically robust and electrically reliable in order to be able to operate even under severe conditions.

In particular, embedding the component in the component carrier with reasonable manufacturing effort and a suitable electrical connection is a problem. In particular, it is challenging to embed the component in the component carrier without causing significant warpage.

There may be a need for a component carrier that can be manufactured in a simple manner and has a low warpage.

SUMMERY OF THE UTILITY MODEL

According to an exemplary embodiment of the present invention, a component carrier is provided. The component carrier includes: a stack comprising at least one electrically conductive layer structure and a plurality of electrically insulating layer structures; a first member; a second component; a central core in which both the first and second components are embedded; a first electrically insulating structure encapsulating the first component; a second electrically insulating structure encapsulating the second component. The first and second components are electrically connected to the external electrically conductive structure by at least one electrically conductive contact passing through the first and/or second electrically insulating structure.

In an embodiment, each of the first and second components comprises at least one pad disposed on the first major surface of the first or second component, the at least one pad being electrically connected to the external electrically conductive structure and passing through the first and/or second electrically insulating structure.

In an embodiment, at least one of the first and second components comprises at least one further pad disposed on an opposite second major surface of the respective first or second component, the at least one further pad being electrically connected to a further external electrically conductive structure and passing through the first and/or second electrically insulating structure.

In an embodiment, the outer electrically conductive structure and the further outer electrically conductive structure are electrically connected to each other.

In an embodiment, the entire vertical extension of the first and second components is arranged within the core.

In an embodiment, neither the first part nor the second part protrudes upwards beyond the core.

In an embodiment, the height of the core is greater than the height of the first component and greater than the height of the second component.

In an embodiment, the bottom of the first part and the bottom of the second part are arranged at different vertical levels.

In an embodiment, a thickness of the first electrically insulating structure below the first part is greater than a thickness of the second electrically insulating structure below the second part.

In an embodiment, the thickness of the first electrically insulating structure over the first part is different from the thickness of the second electrically insulating structure over the second part, in particular the thickness of the first electrically insulating structure over the first part is smaller than the thickness of the second electrically insulating structure over the second part.

In an embodiment, there is no second electrically insulating structure at the bottom of the second part.

In an embodiment, the second electrically insulating structure at least partially surrounds the first electrically insulating structure.

In an embodiment, the first and second parts are embedded on first and second holes, respectively, wherein at least one of the first and second holes is a through hole extending through the entire stack.

In an embodiment, the first and second components are embedded within a common single core of the stack.

In an embodiment, the component carrier is configured as a laminate-type component carrier.

In an embodiment, at least one of the first component and the second component is directly connected to an electronic periphery of the component carrier.

In an embodiment, the at least one electrically conductive contact comprises or is the at least one pad and/or the at least one further pad.

In an embodiment, the at least one pad and/or the at least one further pad of the first and second component, respectively, are directly exposed to the electronic periphery of the component carrier and/or the further electronic periphery of the component carrier.

In an embodiment, each of the first and second components is directly connected to an electronic periphery of the component carrier and/or to a further electronic periphery of the component carrier, respectively.

In an embodiment, the electronics enclosure of the component carrier includes an enclosure major surface corresponding to or facing the first major surface of the stack, the first and second components being directly connected to the enclosure major surface of the electronics enclosure.

In an embodiment, the electronics enclosure of the component carrier comprises an enclosure major surface corresponding to or facing the first major surface of the stack, and the further electronics enclosure of the component carrier comprises an enclosure major surface corresponding to or facing the second major surface of the stack, the first component being directly connected to the enclosure major surface of the electronics enclosure, and the second component being directly connected to the enclosure major surface of the further electronics enclosure.

In an embodiment, at least one of the first and second components is connected to a further electronic peripheral of the component carrier, different and opposite to the electronic peripheral, wherein the first and/or second component is directly connected to the further electronic peripheral through the at least one electrically conductive contact or through a further external electrically conductive structure.

In the context of the present application, the term "component carrier" may particularly denote any support structure capable of accommodating one or more components thereon and/or therein to provide mechanical support and/or electrical connection. In other words, the component carrier can be designed as a mechanical carrier and/or as an electronic carrier for the components. The component carrier may comprise a laminate layer stack. In particular, the component carrier may be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. The component carrier may also be a hybrid board combining different types of component carriers of the above-described types of component carriers.

In the context of the present application, the term "stack" may particularly denote an arrangement of a plurality of planar layer structures mounted parallel to each other.

In the context of the present application, the term "layer structure" may particularly denote a continuous layer, a patterned layer or a plurality of non-continuous islands in a common plane.

In the context of the present application, the term "electronic component" may particularly denote a component that carries out an electronic task. Such an electronic component may be, for example, a semiconductor chip comprising a semiconductor material, in particular as a main or base material. The semiconductor material may be, for example, a type IV semiconductor such as silicon or germanium, or may be a type III-V semiconductor material such as gallium arsenide. In particular, the semiconductor component may be a semiconductor chip, such as a bare wafer or a molded wafer.

In an embodiment, the component carrier comprises a stack of at least one electrically insulating layer structure and at least one electrically conductive layer structure. For example, the component carrier may be a laminate of the mentioned electrically insulating layer structure and electrically conductive layer structure, in particular a laminate formed by applying mechanical pressure and/or thermal energy. The mentioned stack may provide a plate-like component carrier which is able to provide a large mounting surface for other components and which is still very thin and compact.

In an embodiment, the component carrier is shaped as a plate. This contributes to a compact design, wherein the component carrier nevertheless provides a large base for the mounting components on the component carrier. Further, in particular, a bare chip as an example of an embedded electronic component can be easily embedded in a thin plate such as a printed circuit board because the thickness of the bare chip is small.

In an embodiment, the component carrier is configured as a printed circuit board, a substrate (in particular an IC substrate) and/or an interposer.

In the context of the present application, the term "Printed Circuit Board (PCB)" may particularly denote a plate-like component carrier formed by laminating a plurality of electrically conductive layer structures with a plurality of electrically insulating layer structures, for example by applying pressure and/or by supplying thermal energy. As a preferred material for PCB technology, the electrically conductive layer structure is made of copper, while the electrically insulating layer structure may comprise resin and/or glass fibres, so-called prepreg, or FR4 material. The individual electrically conductive layer structures can be connected to each other in a desired manner by forming holes through the laminate, for example by laser drilling or mechanical drilling, and by filling these holes partially or completely with an electrically conductive material, in particular copper, so as to form vias or any other through-hole connections. A filled hole connects the entire stack, (a through-hole connection extends through multiple layers or the entire stack), or a filled hole connects at least two electrically conductive layers, which filled hole is called a via. Similarly, optical interconnects may be formed through the layers of the stack to receive an electro-optical circuit board (EOCB). In addition to one or more components that may be embedded in a printed circuit board, printed circuit boards are typically configured for housing one or more components on one surface or both opposing surfaces of a plate-like printed circuit board. The one or more components may be attached to the respective major surfaces by welding. The dielectric portion of the PCB may include a resin with reinforcing fibers (e.g., glass fibers).

In the context of the present application, the term "substrate" may particularly denote a small component carrier. The substrate may be a relatively small component carrier with respect to the PCB, on which one or more components may be mounted and which may serve as a connection medium between the one or more chips and the further PCB. For example, the substrate may have substantially the same size as a component (particularly an electronic component) to be mounted on the substrate (for example, in the case of a Chip Scale Package (CSP)). More specifically, a substrate can be understood as a carrier: carriers for electrical connections or grids and component carriers comparable to Printed Circuit Boards (PCBs) but with a relatively high density of laterally and/or vertically arranged connections. The lateral connections are, for example, conduction channels, while the vertical connections may be, for example, bores. These lateral and/or vertical connections are arranged within the base plate and can be used to provide electrical, thermal and/or mechanical connection of accommodated or not accommodated components (such as bare wafers), in particular IC chips, to a printed circuit board or an intermediate printed circuit board. Thus, the term "substrate" also includes "IC substrates". The dielectric portion of the substrate may include a resin with reinforcing particles (e.g., reinforcing spheres, particularly glass spheres).

The substrate or interposer may comprise or consist of at least one layer of: glass; silicon (Si); and/or a photosensitive or dry-etchable organic material, such as an epoxy-based laminate material (e.g., an epoxy-based laminate film); or a polymer compound (which may or may not include photosensitive and/or thermosensitive molecules), such as polyimide or polybenzoxazole.

In an embodiment, the at least one electrically insulating layer structure comprises: resins and/or polymers such as epoxy resins, cyanate resins, benzocyclobutene resins, bis-maleimide-triazine resins; polyphenylene derivatives (e.g. based on polyphenylene ether, PPE); polyimide (PI); polyamide (PA); liquid Crystal Polymers (LCP); polytetrafluoroethylene (PTFE); and/or combinations thereof. Reinforcing structures, for example made of glass (multiple layer glass), such as meshes, fibres, spheres or other kinds of filler particles may also be used to form the composite. Semi-cured resins in combination with reinforcing agents, such as fibers impregnated with the above-mentioned resins, are referred to as prepregs. These prepregs are generally named for their properties that describe the flame retardant properties of the prepreg, for example FR4 or FR5. Although prepreg, particularly FR4, is generally preferred for rigid PCBs, other materials, particularly epoxy-based build-up materials (such as build-up films) or photosensitive dielectric materials, may also be used. For high frequency applications, high frequency materials such as polytetrafluoroethylene, liquid crystal polymers, and/or cyanate ester resins may be preferred. In addition to these polymers, low temperature co-fired ceramics (LTCC) or other low, very low, or ultra low DK materials can be applied as electrically insulating structures in component carriers.

In an embodiment, the at least one electronically conductive layer structure comprises: copper, aluminum, nickel, silver, gold, palladium, tungsten, and/or magnesium. Although copper is generally preferred, other materials or coated versions thereof, in particular coated with superconducting materials or conductive polymers, such as graphene or poly (3,4-ethylenedioxythiophene) (PEDOT), respectively, are also possible.

The at least one component may be embedded in the component carrier and/or may be surface mounted on the component carrier. Such components may be: a non-electrically conductive inlay, an electrically conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (e.g., a heat pipe), a light directing element (e.g., an optical waveguide or optical conductor connector), an electronic component, or a combination thereof. The inlay may be, for example, a metal block with or without an insulating material coating (IMS-inlay), which may be embedded or surface mounted for the purpose of promoting heat dissipation. Suitable materials are defined in terms of the thermal conductivity of the material, which should be at least 2W/mK. Such materials are generally based on, but not limited to, metals, metal oxides and/or ceramics, such as copper, alumina (Al) ₂ O ₃ ) Or aluminum nitride (AlN). Other geometries with increased surface area are also often used in order to increase the heat exchange capacity. Further, the component may be: active electronic components (implementing at least one pn-junction), passive electronic components such as resistors, inductors, or capacitors, electronic chips, memory devices (e.g., DRAM or other data storage), filters, integrated circuits (such as Field Programmable Gate Arrays (FPGA), programmable Array Logic (PAL), generic Array Logic (GAL), and Complex Programmable Logic Devices (CPLD)), signal processing components, power management components (such as Field Effect Transistors (FET), metal Oxide Semiconductor Field Effect Transistors (MOSFET), complementary Metal Oxide Semiconductor (CMOS), junction Field Effect Transistors (JFET), or Insulated Gate Field Effect Transistors (IGFET)), all based on, for example, carbonSilicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga) ₂ O ₃ ) Semiconductor material of indium gallium arsenide (InGaAs), and/or any other suitable inorganic compound), optoelectronic interface elements, light emitting diodes, optocouplers, voltage converters (e.g., DC/DC converters or AC/DC converters), cryptographic components, transmitters and/or receivers, electromechanical transducers, sensors, actuators, micro-electro-mechanical systems (MEMS), microprocessors, capacitors, resistors, inductors, batteries, switches, cameras, antennas, logic chips, energy harvesting units. However, other components may also be embedded in the component carrier. For example, a magnetic element may be used as the component. Such a magnetic element may be a permanent magnetic element (e.g. a ferromagnetic element, an antiferromagnetic element, a multiferroic element or a ferrimagnetic element, e.g. a ferrite core) or may be a paramagnetic element. However, the component may also be an IC substrate, an interposer or another component carrier, for example in a board-in-board configuration. The component may be surface mounted on the component carrier and/or may be embedded in the interior of the component carrier. Furthermore, other components, in particular those which generate and emit electromagnetic radiation and/or which are sensitive to electromagnetic radiation propagating from the environment, may also be used as components.

In an embodiment, the component carrier is a laminate type component carrier. In such an embodiment, the component carrier is a composite of a multilayer structure that is stacked and joined together by the application of pressure and/or heat.

After the processing of the inner layer structure of the component carrier, one main surface or the two opposite main surfaces of the processed layer structure may be covered symmetrically or asymmetrically (in particular by lamination) with one or more further electrically insulating layer structures and/or electrically conductive layer structures. In other words, stacking may continue until a desired number of layers is obtained.

After the formation of the stack with the electrically insulating layer structure and the electrically conductive layer structure is completed, the resulting layer structure or component carrier may be subjected to a surface treatment.

In particular, in terms of surface treatment, an electrically insulating solder resist may be applied to one main surface or to both opposite main surfaces of the layer laminate or the component carrier. For example, such a solder resist may be formed over the entire major surface and then a layer of the solder resist is patterned to expose one or more electrically conductive surface portions that will be used to electrically couple the component carrier to the electronic periphery. The surface portion of the component carrier which remains covered with the solder resist, in particular the surface portion which comprises copper, can be effectively protected against oxidation or corrosion.

In terms of surface treatment, it is also possible to apply a surface treatment selectively to exposed electrically conductive surface portions of the component carrier. Such a surface treatment may be an electrically conductive covering material on an exposed electrically conductive layer structure (such as a pad, conductive trace or the like, in particular comprising or consisting of copper) on the surface of the component carrier. If such an exposed electrically conductive layer structure is not protected, the exposed electrically conductive component carrier material (in particular copper) may be oxidized, thereby making the component carrier less reliable. Then, the surface treatment portion may be formed as, for example, a joint portion between the surface mounting component and the component carrier. The surface treatment has the function of protecting the exposed electrically conductive layer structure, in particular the copper circuit, and the surface treatment may effect a bonding process with one or more components, for example by soldering. Examples of suitable materials for the surface treatment are Organic Solderability Preservative (OSP), electroless Nickel Immersion Gold (ENIG), electroless Nickel Immersion Palladium Immersion Gold (ENIPIG), gold (especially hard gold), chemical tin, nickel gold, nickel palladium and the like.

According to an exemplary embodiment of the invention, a component carrier is provided having at least two components embedded in a stack thereof, wherein embedding of a second component is not started until embedding of a first component is completed. If the third component (or a plurality of further components) is embedded in the same component carrier, this may be done after the embedding of the first and second components is completed. By taking this measure, a multi-embedded manufacturing architecture is provided that has very advantageous properties in terms of warpage suppression. By dividing the embedding process into two or more separate processing stages to thereby prevent multiple holes from being formed in the same stack at the same time, the conventional risk of warpage can be mitigated, particularly at high wafer packaging ratios.

When the wafer package ratio is very high (e.g., 0.5 or more), high warpage may occur due to the low rigidity of the board. Such warping, which occurs at the panel level, may cause the manufacturing process to stop or become inaccurate. Dividing the embedding process into two or more stages may allow for less deformation during the thermocompression process, resulting in better warpage behavior, performance, and capability. Due to this separation of the different embedding stages, the components embedded in the same stack may not be at the same lower level, but may have a height difference of, for example, 0.7 μm to 7 μm. The reason for this is that a protective layer of adhesive material is applied from the lower side on the already embedded component.

Advantageously, high die package ratio embedded packages can be fabricated without giving up extensive material selection to achieve the target desired performance. This embodiment also has the advantage that material limitations are relaxed, such as less limitations in the young's modulus, CTE behaviour etc. of the materials involved.

According to an exemplary embodiment of the present invention, a component carrier can be manufactured having at least two embedded components located (in particular substantially completely) within the same core layer of the stack. Thus, the same stack of layers may be used to interconnect two (or more than two) embedded components. In particular, the laser process for forming the electrically conductive contacts of the embedded component may only be started after the second (or last) embedding is completed. It may therefore be advantageous not to have to increase the height to reach the next layer for a subsequent (e.g. second) embedding.

The above-defined and other aspects of the present invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.

Drawings

Fig. 1 shows a cross-sectional view of a component carrier according to an exemplary embodiment of the present invention.

Fig. 2 shows a cross-sectional view of a modified component carrier according to an exemplary embodiment of the present invention.

Fig. 3 shows a cross-sectional view of a modified component carrier according to an exemplary embodiment of the present invention.

Fig. 4 shows a method of manufacturing a component carrier according to an embodiment.

The illustration in the drawings is schematically. In different drawings, similar or identical elements are provided with the same reference signs.

Detailed Description

Fig. 1 shows a cross-sectional view of a component carrier according to an exemplary embodiment of the present invention. The component carrier 100 is configured as a laminate-type component carrier.

The component carrier 100 comprises a stack 102, the stack 102 comprising at least one electrically conductive layer structure and a plurality of electrically insulating layer structures and comprising a first component 110 and a second component 116. The stack 102 includes: a central core 134, both the first and

second components

110, 116 being embedded in the central core 134; a first electrically insulating structure 130, the first electrically insulating structure 130 encapsulating the first component 110; and a second electrically insulating structure 132, the second electrically insulating structure 132 encapsulating the second component. The first and second electrically insulating

structures

130, 132 may be a first and second dielectric material. The first component 110 and the second component 116 are embedded within a common single core 134 of the stack 102. The first part 110 and the second part 116 are electrically connected to the external electrically conductive structure 1 by at least one electrically conductive contact 2 passing through the first electrically insulating structure 130 and the second electrically insulating structure 132, respectively.

The first and

second components

110, 116 preferably comprise two pads 11 disposed on the respective first major surfaces 4 of the first and

second components

110, 116, respectively. The pad 11 is electrically connected to the external electrically conductive structure 1 and passes through the first and second electrically insulating

structures

130 and 132, respectively. In the embodiment of fig. 1, the pads 11 form electrically conductive contacts 2. Alternatively, the electrically conductive contact 2 comprises an additional via between the pad 11 and the outer electrically conductive structure 1, such that the pad 11 forms part of the electrically conductive contact 2. In other words, the electrically conductive contact 2 comprises a pad 11, or the electrically conductive contact 2 is a pad 11.

The first component 110 and the second component 116 each comprise a further pad 12 disposed on the opposite second major surface 5 of the respective first component 110 or second component 116. The further pad 12 is electrically connected to the further outer electrically conductive structure 6 and passes through the first and second electrically insulating

structures

130 and 132, respectively. The outer electrically conductive structure 1 and the further outer electrically conductive structure 6 are preferably electrically connected to each other by vias 10.

In the embodiment of fig. 1, substantially the entire vertical extension of the first and

second components

110, 116 is preferably arranged within the core 134. Neither the first member 110 nor the second member 116 protrudes upwardly beyond the core 134. The height B of the core is preferably greater than the height L1 of the first component 110 and greater than the height L2 of the second component 116.

The bottom of the first part 110 and the bottom of the second part 116 are arranged at different vertical levels. The thickness D + D of the first electrically insulating structure 130 below the first part 110 is preferably greater than the thickness D of the second electrically insulating structure 132 below the second part 116.

The thickness H of the first electrically insulating structure 130 above the first component 110 is preferably different from, in particular smaller than, the thickness H of the second electrically insulating structure 132 above the second component 116.

The first component 110 and the second component 116 are preferably directly connected to the electronic periphery 200 of the component carrier 100. The electronics enclosure 200 may be formed from additional stacked layers or from additional component carriers. The electronic periphery 200 is depicted schematically in the figures and may be a simple connection structure, such as an exposed connection surface and/or solder balls; in other words, the electronic periphery 200 will not be limited to the fact that additional entities, such as stacked/built-in layers or another carrier, must be present. The component carrier 100 may be assembled to another component carrier, such as a PCB, by means of solder balls, or the component carrier 100 may also be stacked with additional stacked layers and used as a PCB with integrated components. The pads 11 of the first component 110 and the further pads 12 of the second component 116 are preferably directly exposed to the electronic periphery 200 of the component carrier 100.

The first component 110 and the second component 116 are preferably also directly connected to a further electronic peripheral 300 of the component carrier 100. Further electronic peripherals 300 may be formed by further stacked layers or by another component carrier. Further electronic peripherals 300 are schematically depicted in the figures and may be simple connection structures, such as exposed connection surfaces and/or solder balls; in other words, the further electronic periphery 300 will not be limited to the fact that additional entities, such as stacked/built-in layers or another carrier, have to be present. The component carrier 100 may be assembled to another component carrier, such as a PCB, by means of solder balls, or the component carrier 100 may also be stacked with additional stacked layers and used as a PCB with integrated components. The pads 11 of the second component 116 and the further pads 12 of the first component 110 are preferably directly exposed to the further electronic peripherals 300 of the component carrier 100.

Each of the first and

second components

110, 116 is preferably directly connected to the electronic peripheral 200 of the component carrier 100 and the further electronic peripheral 300 of the component carrier 100, respectively.

The electronics enclosure 200 of the component carrier 100 preferably comprises an enclosure major surface 201, the enclosure major surface 201 corresponding to or facing the first major surface 202 of the stack 102, wherein the first component 110 and the second component 116 are directly connected to the enclosure major surface 201 of the electronics enclosure 200. The further electronic periphery 300 of the component carrier 100 preferably comprises a periphery main surface 301, the periphery main surface 301 corresponding to or facing the second main surface 103 of the stack 102, wherein the first component 110 and the second component 116 are directly connected to the periphery main surface 301 of the further electronic periphery 300. Further, the further electronic periphery 300 of the component carrier 100 preferably comprises a periphery main surface 301, wherein the first component 110 and the second component 116 are directly connected to the periphery main surface 301 of the further electronic periphery 300. The first component 110 and the second component 116 are preferably connected to a further electronic peripheral 300 of the component carrier, which is different and opposite to the electronic peripheral 200, wherein the first component 110 and the second component 116 are directly connected to the further electronic peripheral 300 by the electrically conductive contacts 2 and the further pads 12, respectively.

Fig. 2 shows a cross-sectional view of a modified component carrier 100 according to an exemplary embodiment of the present invention. There is no second electrically insulating structure 132 at the bottom of second component 116. This means that: there is preferably no second electrically insulating structure 132 at the second main surface 5 of the second component 116. Furthermore, the bottom or second main surface 5 of the second component 116 is preferably covered by a material other than the second electrically insulating structure 132, for example by the electrically conductive material 10.

In the same way, there is preferably no first electrically insulating structure 130 at the bottom of the first part 110. This means that: there is no first electrically insulating structure 130 at the second main surface 5 of the first part 110. Furthermore, the bottom or second main surface 5 of the first component 110 is covered by a material other than the first electrically insulating structure 130, for example by an electrically conductive material 11.

Fig. 3 shows a cross-sectional view of a modified component carrier 100 according to an exemplary embodiment of the present invention. The second electrically insulating structure 132 at least partially surrounds the first electrically insulating structure 130.

Fig. 4 shows a method of manufacturing a component carrier 100 according to an embodiment. In step S1, a core 134 is provided, the core 134 may comprise a copper layer. The copper layer may optionally be patterned by etching. In step S2, a first hole 7 is formed in the core 134, for example by laser drilling the first hole 7 in the core 134. The first hole 7 is a through hole extending through the entire core 134. Then, a first temporary carrier 15, for example an adhesive tape, is attached to the core 134. In step S3, the first component 110 is inserted and embedded face down into the first hole 7 and the first component 110 is attached to the first temporary carrier 15. A high level of accuracy can be achieved. In step S4, the first electrically insulating structure 130 is formed by filling the space between the first hole 7 and the first part 110 with the first electrically insulating structure 130, the first electrically insulating structure 130 may be a first dielectric material. Thereafter, the first temporary carrier 15 is removed. In step S5, the obtained intermediate product is planarized, for example by grinding.

In step S6, the resulting intermediate product is turned over. In step S7, a second hole 8 is formed in the core 134, for example by laser drilling the second hole 8 in the core 134. The second hole 8 is a through hole extending through the entire core 134. Then, a second temporary carrier 13, for example an adhesive tape, is attached to the core 134. In step S8, the second component 116 is inserted and inserted face down into the second hole 8 and the second component 116 is attached to the second temporary carrier 13. A high level of accuracy can be achieved. In step S9, a second electrically insulating structure 132 is formed by filling the space between the second hole 8 and the second component 116 with the first electrically insulating structure 132, the second electrically insulating structure 132 may be a second dielectric material. Thereafter, the second temporary carrier 13 is removed. In step S10, the resulting intermediate product is planarized, for example by grinding.

In step S11 holes are formed in the resulting intermediate product, for example by laser drilling or by mechanical drilling, and in step S12 the holes are filled by the electrically conductive structure, for example by PVD or copper plating, so that a patterned structure is formed.

It should also be noted that reference signs in the claims shall not be construed as limiting the scope of the claims.

The implementation of the present invention is not limited to the preferred embodiments shown in the figures and described above. Rather, even in the case of fundamentally different embodiments, it is possible to use the solution shown and a plurality of variants according to the principles of the invention.

Claims

1. A component carrier (100), characterized in that the component carrier (100) comprises:

a stack (102), the stack (102) comprising at least one electrically conductive layer structure and a plurality of electrically insulating layer structures;

a first component (110);

a second component (116);

a central core (134), the first and second components (110, 116) both being embedded in the core (134);

a first electrically insulating structure (130), the first electrically insulating structure (130) encapsulating the first component (110);

a second electrically insulating structure (132), the second electrically insulating structure (132) encapsulating the second component;

wherein the first part (110) and the second part (116) are electrically connected to an external electrically conductive structure (1) by passing through at least one electrically conductive contact (2) of the first electrically insulating structure (130) and/or the second electrically insulating structure (132).

2. The component carrier (100) according to claim 1, wherein each of the first component (110) and the second component (116) comprises at least one pad (11) provided on a first main surface (4) of the first component (110) or the second component (116), the at least one pad (11) being electrically connected to the outer electrically conductive structure (1) and passing through the first electrically insulating structure (130) and/or the second electrically insulating structure (132).

3. The component carrier (100) according to claim 2, wherein at least one of the first component (110) and the second component (116) comprises at least one further pad (12) provided on an opposite second main surface (5) of the respective first component (110) or second component (116), the at least one further pad (12) being electrically connected to a further outer electrically conductive structure (6) and passing through the first electrically insulating structure (130) and/or the second electrically insulating structure (132).

4. The component carrier (100) according to claim 3, wherein the outer electrically conductive structure (1) and the further outer electrically conductive structure (6) are electrically connected to each other.

5. The component carrier (100) according to any of claims 1 to 4, wherein the entire vertical extension of the first component (110) and the second component (116) is arranged within the core (134).

6. The component carrier (100) according to any of claims 1 to 4, wherein neither the first component (110) nor the second component (116) protrudes upwardly beyond the core (134).

7. The component carrier (100) according to any of claims 1 to 4, wherein the height (B) of the core is greater than the height of the first component (110) and greater than the height of the second component (116).

8. The component carrier (100) according to any of claims 1 to 4, wherein a bottom of the first component (110) and a bottom of the second component (116) are arranged at different vertical levels.

9. The component carrier (100) according to any of claims 1 to 4,

the thickness (D + D) of the first electrically insulating structure (130) below the first component (110) is greater than the thickness of the second electrically insulating structure (132) below the second component (116).

10. The component carrier (100) according to any of claims 1 to 4,

a thickness of the first electrically insulating structure (130) over the first component (110) is different than a thickness of the second electrically insulating structure (132) over the second component (116).

11. The component carrier (100) according to any of claims 1 to 4,

a thickness of the first electrically insulating structure (130) over the first component (110) is less than a thickness of the second electrically insulating structure (132) over the second component (116).

12. The component carrier (100) according to any of claims 1 to 4, wherein the second electrically insulating structure (132) is absent at a bottom of the second component (116).

13. The component carrier (100) according to any of claims 1 to 4, wherein the second electrically insulating structure (132) at least partially surrounds the first electrically insulating structure (130).

14. The component carrier (100) according to any of claims 1 to 4, wherein the first component (110) and the second component (116) are embedded on a first hole (7) and a second hole (8), respectively, wherein at least one of the first hole (7) and the second hole (8) is a through hole extending through the entire stack (102).

15. The component carrier (100) according to any of claims 1 to 4, wherein the first component (110) and the second component (116) are embedded within a common single core (134) of the stack (102).

16. The component carrier (100) according to any of claims 1 to 4, characterized in that the component carrier (100) is configured as a laminate-type component carrier.

17. The component carrier (100) according to claim 3 or 4, wherein at least one of the first component (110) and the second component (116) is directly connected to an electronics peripheral (200) of the component carrier (100).

18. The component carrier (100) according to claim 17, wherein the at least one electrically conductive contact (2) comprises the at least one pad (11) and/or the at least one further pad (12), or wherein the at least one electrically conductive contact (2) is the at least one pad (11) and/or the at least one further pad (12).

19. The component carrier (100) according to claim 18, wherein the at least one pad (11) and/or the at least one further pad (12) of the first component (110) and the second component (116) are directly exposed to an electronic periphery (200) of the component carrier (100) and/or a further electronic periphery (300) of the component carrier (100), respectively.

20. The component carrier (100) according to claim 17, wherein each of the first component (110) and the second component (116) is directly connected to the electronics enclosure (200) of the component carrier (100) and/or to a further electronics enclosure (300) of the component carrier (100), respectively.

21. The component carrier (100) according to claim 20, wherein the electronics enclosure (200) of the component carrier (100) comprises an enclosure main surface (201), the enclosure main surface (201) corresponding to or facing a first main surface (202) of the stack (102), the first component (110) and the second component (116) being directly connected to the enclosure main surface (201) of the electronics enclosure (200).

22. The component carrier (100) according to claim 20, wherein the electronics enclosure (200) of the component carrier (100) comprises an enclosure main surface (201) corresponding to or facing a first main surface (202) of the stack (102), and the further electronics enclosure (300) of the component carrier (100) comprises an enclosure main surface (301) corresponding to or facing a second main surface (103) of the stack (102), the first component (110) being directly connected to the enclosure main surface (201) of the electronics enclosure (200), and the second component (116) being directly connected to the enclosure main surface (301) of the further electronics enclosure (300).

23. The component carrier according to claim 17, wherein at least one of the first component (110) and the second component (116) is connected to a further electronic peripheral (300) of the component carrier, which is different and opposite to the electronic peripheral (200), wherein the first component (110) and/or the second component (116) is directly connected to the further electronic peripheral (300) through the at least one electrically conductive contact (2) or through the further outer electrically conductive structure (6).